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1996-09-20 * gencode.c (process_instructions): Call build_endian_shift whenIan Lance Taylor1-0/+1
expanding STORE RIGHT, to fix swr. * support.h (SIGNEXTEND): If the sign bit is not set, explicitly clear the high bits. * interp.c (Convert): Fix fmt_single to fmt_long to not truncate. Fix float to int conversions to produce signed values.
1996-09-20Fix multiplication, ldxc1, and floating point conversion. See ChangeLog.Ian Lance Taylor1-11/+45
1996-09-19 * gencode.c (process_instructions): Correct shift count for 32Ian Lance Taylor1-3/+6
bit shift instructions. Correct sign extension for arithmetic shifts to not shift the number of bits in the type.
1996-09-19 * gencode.c (process_instructions): Correct handling of norIan Lance Taylor1-1/+1
instruction.
1996-09-16Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>Jackie Smith Cashion1-4/+4
* interp.c (sim_monitor): Improved monitor printf simulation. Tidied up simulator warnings, and added "--log" option for directing warning message output. * gencode.c: Use sim_warning() rather than WARNING macro.
1996-08-22 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, andIan Lance Taylor1-26/+114
getopt1.o, rather than on gencode.c. Link objects together. Don't link against -liberty. (gencode.o, getopt.o, getopt1.o): New targets. * gencode.c: Include <ctype.h> and "ansidecl.h". (AND): Undefine after including "ansidecl.h". (ULONG_MAX): Define if not defined. (OP_*): Don't define macros; now defined in opcode/mips.h. (main): Call my_strtoul rather than strtoul. (my_strtoul): New static function.
1996-07-18 * gencode.c (process_instructions): Generate word64 and uword64Stu Grossman1-7/+11
instead of `long long' and `unsigned long long' data types. * interp.c: #include sysdep.h to get signals, and define default for SIGBUS. * (Convert): Work around for Visual-C++ compiler bug with type conversion. * support.h: Make things compile under Visual-C++ by using __int64 instead of `long long'. Change many refs to long long into word64/uword64 typedefs.
1996-06-05Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>Jackie Smith Cashion1-4/+24
* configure.in: Define @SIMCONF@ depending on mips target. * configure: Rebuild. * Makefile.in (run): Add @SIMCONF@ to control simulator construction. * gencode.c: Change LOADDRMASK to 64bit memory model only. * interp.c: Remove some debugging, provide more detailed error messages, update memory accesses to use LOADDRMASK.
1996-04-19Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>Jackie Smith Cashion1-2/+2
* gencode.c (process_instructions): Ensure FP ABS instruction recognised. * interp.c (AbsoluteValue): Add routine. Also provide simple PMON system call support.
1996-03-27Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>Jackie Smith Cashion1-14/+50
* interp.c, gencode.c: Some more (TODO) tidying.
1996-03-07Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>Jackie Smith Cashion1-35/+47
* gencode.c, interp.c: Replaced explicit long long references with WORD64HI, WORD64LO, SET64HI and SET64LO macro calls. * support.h (SET64LO, SET64HI): Macros added. This is an intermediate checkin. The work of removing "long long" usage is not yet finished. These changes are clean, and have been sitting on my machine for a while (whilst doing other work), and it is safer for them to be checked in.
1995-12-01* gencode.c: Tidied instruction decoding, and added FP instructionJackie Smith Cashion1-509/+776
support. * interp.c: Added dineroIII, and BSD profiling support. Also run-time FP handling. At the moment the options are still mostly build-time controlled, rather than run-time. Also work still needs to be done to remove (long long) usage (However this is trivial, just time-consuming). The out-standing instruction work to be done is in supporting round and trunc for FP operations, and providing better exception support.
1995-11-08Initial check-in of the MIPS simulator. Work still needs to be done onJackie Smith Cashion1-0/+2027
the run-time support code (interp.c) to provide better tracing, and also to add profiling and architecture specific support. At the moment the simulator has a fixed size, fixed address memory area, and simulates a subset of the IDT monitor calls (enough to execute test programs). The other major feature (could even be a bug) is that the simulator makes use of the GCC "long long" extension. Work has been started to make this a build configuration option... but there is still a lot of this to be done.