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2023-01-11sim: build: drop subdir Makefile.in filesMike Frysinger1-14/+0
These aren't used anymore, so punt them all.
2023-01-10sim: build: drop support for creating libsim.a in subdirsMike Frysinger1-2/+0
Now that all ports have moved to creating libsim.a in the top-level, drop all the support code to create it in a subdir.
2023-01-10sim: mips: move libsim.a creation to top-levelMike Frysinger1-43/+1
The objects are still compiled in the subdir, but the creation of the archive itself is in the top-level. This is a required step before we can move compilation itself up, and makes it easier to review. The downside is that each object compile is a recursive make instead of a single one. On my 4 core system, it adds ~100msec to the build per port, so it's not great, but it shouldn't be a big deal. This will go away of course once the top-level compiles objects. The mips code is a little more tricky than others because, for multi-run targets, it generates the list of sources & objects on the fly in the configure script.
2022-12-27sim: mips: hoist "multi" igen rules up to common buildsMike Frysinger1-124/+0
Since these are the last mips igen rules, we can clean up a number of bits in the local Makefile.in.
2022-12-27sim: mips: hoist "m16" igen rules up to common buildsMike Frysinger1-82/+1
2022-12-27sim: mips: hoist "single" igen rules up to common buildsMike Frysinger1-48/+1
2022-12-27sim: mips: rename "igen" generation mode to "single"Mike Frysinger1-9/+9
The naming in here has grown organically and is confusing to follow. Originally there was only one set of rules for generating code from the igen sources, so calling it "tmp-igen" and such made sense. But when other multigen modes were added ("m16" & "multi") which also used igen, it's not clear what's common igen and what's specific to this generation mode. So rename the set of rules from "igen" to "single" so it's easier to follow.
2022-12-27sim: mips: hoist itable igen rules up to common buildsMike Frysinger1-32/+1
Since this rule is pretty simple, hoist it up to the common build.
2022-12-27sim: mips: unify itable generation (a bit)Mike Frysinger1-34/+20
The m16 & multi targets generate itable once even when all the other modules are generated multiple times. The default igen target will generate itable with everything else out of convenience. This means flags are passed which don't affect the generated itable there. We can unify the itable generation by making sure the right -F/-M filter variables are passed down. Since there's already a dedicated rule & variable in the multi build mode, generalize that and switch the m16 & igen builds over too. I spent a lot of time staring at this code, building for diff mips targets, and exploring all the shell code paths. I think this is safe, but only time (and users) will really tell.
2022-12-27sim: mips: rename multi_flags to igen_itable_flagsMike Frysinger1-2/+2
This variable is only used to generate the itable files. In preparation for merging the itable logic among all ports, rename "multi_flags" to a more appropriate "igen_itable_flags" variable. There should be no real chagnes here otherwise.
2022-12-27sim: mips: drop unused micromips igen logicMike Frysinger1-151/+0
This code appears to be unused since it was first merged. When micromips was enabled, it was via the "MULTI" config, not the "MICROMIPS" config, and the multi configs have sep vars. Since nothing sets SIM_MIPS_GEN=MICROMIPS in the config, all of this should be unreachable, so punt it to simplify. Further, the SIM_MIPS_MICROMIPS16_FLAGS & SIM_MIPS_MICROMIPS_FLAGS settings rely on sim_mips_micromips{,16}_{filter,machine} variables that are never set in the configure script.
2022-12-25sim: mips: move distclean settings to common buildMike Frysinger1-4/+0
This was missed when mips/configure was merged into the top-level.
2022-12-25sim: smp: plumb igen flag down to all usersMike Frysinger1-2/+0
While mips has respected sim_igen_smp at configure time (which was always empty since it defaulted smp to off), no other igen port did. Move this to a makefile variable and plumb it through the common IGEN_RUN variable instead so everyone gets it by default. We also clean up some redundant -N0 setting with multirun mips.
2022-12-24sim: mips: clean up a bit after mips/configure removalMike Frysinger1-3/+3
Now that there is no subdir configure script, we can clean up some logic that was spread between the files.
2022-12-24sim: mips: namespace igen configure varsMike Frysinger1-17/+26
To prepare moving this logic to the top-level configure, the vars need to be namespaced. Do that here to make it easier to review. Basically sim_xxx -> SIM_MIPS_XXX when a var is exported from the configure script to the Makefile, and sim_xxx -> sim_mips_xxx when the var is internal in the configure script.
2022-12-24sim: igen: drop move-if-changed usageMike Frysinger1-178/+83
Now that igen itself has this logic, drop these custom build rules to greatly simplify.
2022-12-21sim: mips: move fpu bitsize defines to top-level configureMike Frysinger1-0/+1
This drops support for the --enable-sim-float configure option, but it's not clear anyone ever actually used that. Eventually we'll want this to be a runtime option anyways.
2022-12-21sim: mips: move bitsize defines to top-level configureMike Frysinger1-0/+2
Since the msb value is always defined as the wordsize-1, stop hardcoding that value directly, and use a CPP value instead.
2022-12-21sim: mips: move subtarget defines to top-level configureMike Frysinger1-2/+1
We want to kill off mips/configure entirely. Move this small part out now to get started.
2022-12-21sim: build: hoist lists of hw devices upMike Frysinger1-2/+2
We need these in the top-level to generate libsim.a, but also in the subdirs to generate hw-config.h. Move it to the local.mk, and pass it down when running recursive make. This avoids duplication, and makes it available to both. We can simplify this once we move the various steps up to the top-level too.
2022-02-04sim: mips: Add simulator support for mips32r6/mips64r6Faraz Shahbazker1-0/+1
2022-02-01 Ali Lown <ali.lown@imgtec.com> Andrew Bennett <andrew.bennett@imgtec.com> Dragan Mladjenovic <dragan.mladjenovic@rt-rk.com> Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-bits.h (EXTEND9, EXTEND18 ,EXTEND19, EXTEND21, EXTEND26): New macros. sim/mips/ChangeLog: * Makefile.in (IGEN_INCLUDE): Add mips3264r6.igen. * configure: Regenerate. * configure.ac: Support mipsisa32r6 and mipsisa64r6. (sim_engine_run): Pick simulator model from processor specified in e_flags. * cp1.c (value_fpr): Handle fmt_dc32. (fp_unary, fp_binary): Zero initialize locals. (update_fcsr, fp_classify, fp_rint, fp_r6_cmp, inner_fmac, fp_fmac, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New functions. (sim_fpu_class_mips_mapping): New. * cp1.h (fcsr_ABS2008_mask, fcsr_ABS2008_shift): New define. * interp.c (MIPSR6_P): New. (load_word): Allow unaligned memory access for MIPSR6. * micromips.igen (sc, scd): Adapt to new do_sc* helper signature. * mips.igen: Add *r6 models. (signal_if_cti, forbiddenslot32): New helpers. (delayslot32): Use signal_if_cti. (do_sc, do_scd); Add store_ll_bit parameter. (sc, scd): Adapt to previous change. (nal, beq, bal): New definitions for *r6. (sll): Split nop and ssnop cases into ... (nop, ssnop): New definitions. (loadstore_ea): Use the 32-bit compatibility adressing. (cache): Split logic into ... (do_cache): New helper. (check_fpu): Select IEEE 754-2008 mode for R6. (not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_multi_hilo, check_div_hilo, check_u64, do_dmfc1b, add, li, addu, and, andi, bgez, bgtz, blez, bltz, bne, break, dadd, daddiu, daddu, dror, dror32, drorv, dsll, dsll32, dsllv, dsra, dsra32, dsrav, dsrl, dsrl32, dsub, dsubu, j, jal, jalr, jalr.hb, lb, lbu, ld, lh, lhu, lui, lw, lwu, nor, or, ori, ror, rorv, sb, sd, sh, sll, sllv, slt, slti, sltiu, sltu, sra, srav, srl, srlv, sub, subu, sw, sync, syscall, teq, tge, tgeu, tlt, tltu, tne, xor, xori, check_fmt_p, do_load_double, do_store_double, abs.FMT, add.FMT, ceil.l.FMT, ceil.w.FMT, cfc1, ctc1, cvt.d.FMT, cvt.l.FMT, cvt.w.FMT, div.FMT, dfmc1, dmtc1, floor.l.FMT, floor.w.FMT, ldc1, lwc1, mfc1, mov.FMT, mtc1, mul.FMT, recip.FMT, round.l.FMT, round.w.FMT, rsqrt.FMT, sdc1, sqrt.FMT, sub.FMT, swc1, trunc.l.FMT, trunc.w.FMT, bc0f, bc0fl, bc0t, bc0tl, dmfc0, dmtc0, eret, mfc0, mtc0, cop, tlbp, tlbr, tlbwi, tlbwr): Enable on *r6 models. * mips3264r2.igen (dext, dextm, dextu, di, dins, dinsm, dinsu, dsbh, dshd, ei, ext, mfhc1, mthc1, ins, seb, seh, synci, rdhwr, wsbh): Likewise. * mips3264r6.igen: New file. * sim-main.h (FP_formats): Add fmt_dc32. (FORBIDDEN_SLOT): New macros. (simFORBIDDENSLOT, FP_R6CMP_*, FP_R6CLASS_*): New defines. (fp_r6_cmp, fp_classify, fp_rint, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New declarations. (R6Compare, Classify, RoundToIntegralExact, Min, Max, MinA, MaxA, FusedMultiplyAdd, FusedMultiplySub): New macros. Wrapping previous declarations. sim/testsuite/mips/ChangeLog: * basic.exp: Add r6-*.s tests. (run_r6_removed_test): New function. (run_endian_tests): New function. * hilo-hazard-3.s: Skip for mips*r6. * r2-fpu.s: New test. * r6-64.s: New test. * r6-branch.s: New test. * r6-forbidden.s: New test. * r6-fpu.s: New test. * r6-llsc-dp.s: New test. * r6-llsc-wp.s: New test. * r6-removed.csv: New test. * r6-removed.s: New test. * r6.s: New test. * utils-r6.inc: New inc.
2021-11-28sim: drop unused gentmap & nltvals.def logicMike Frysinger1-1/+1
Now that all ports have switched to target-newlib-* files, there's no need for these files & generating things at build time. So punt the logic and make target-newlib-syscall a hard requirement.
2021-11-06sim: mips: use sim_fpu_to{32,64}u to fix build warningsTiezhu Yang1-3/+0
Since the first argument type is unsigned32 or unsigned64, just use sim_fpu_to{32,64}u instead of sim_fpu_to{32,64}i to fix the following build warnings: CC cp1.o .../sim/mips/cp1.c: In function 'convert': .../sim/mips/cp1.c:1425:32: warning: pointer targets in passing argument 1 of 'sim_fpu_to32i' differ in signedness [-Wpointer-sign] status |= sim_fpu_to32i (&result32, &wop, round); ^~~~~~~~~ In file included from .../sim/mips/sim-main.h:67, from .../sim/mips/cp1.c:46: .../sim/mips/../common/sim-fpu.h:270:22: note: expected 'signed32 *' {aka 'int *'} but argument is of type 'unsigned32 *' {aka 'unsigned int *'} INLINE_SIM_FPU (int) sim_fpu_to32i (signed32 *i, const sim_fpu *f, ^~~~~~~~~~~~~ .../sim/mips/cp1.c:1429:32: warning: pointer targets in passing argument 1 of 'sim_fpu_to64i' differ in signedness [-Wpointer-sign] status |= sim_fpu_to64i (&result64, &wop, round); ^~~~~~~~~ In file included from .../sim/mips/sim-main.h:67, from .../sim/mips/cp1.c:46: .../sim/mips/../common/sim-fpu.h:274:22: note: expected 'signed64 *' {aka 'long int *'} but argument is of type 'unsigned64 *' {aka 'long unsigned int *'} INLINE_SIM_FPU (int) sim_fpu_to64i (signed64 *i, const sim_fpu *f, ^~~~~~~~~~~~~ .../sim/mips/cp1.c: In function 'convert_ps': .../sim/mips/cp1.c:1528:34: warning: pointer targets in passing argument 1 of 'sim_fpu_to32i' differ in signedness [-Wpointer-sign] status_u |= sim_fpu_to32i (&res_u, &wop_u, round); ^~~~~~ In file included from .../sim/mips/sim-main.h:67, from .../sim/mips/cp1.c:46: .../sim/mips/../common/sim-fpu.h:270:22: note: expected 'signed32 *' {aka 'int *'} but argument is of type 'unsigned32 *' {aka 'unsigned int *'} INLINE_SIM_FPU (int) sim_fpu_to32i (signed32 *i, const sim_fpu *f, ^~~~~~~~~~~~~ .../sim/mips/cp1.c:1529:34: warning: pointer targets in passing argument 1 of 'sim_fpu_to32i' differ in signedness [-Wpointer-sign] status_l |= sim_fpu_to32i (&res_l, &wop_l, round); ^~~~~~ In file included from .../sim/mips/sim-main.h:67, from .../sim/mips/cp1.c:46: .../sim/mips/../common/sim-fpu.h:270:22: note: expected 'signed32 *' {aka 'int *'} but argument is of type 'unsigned32 *' {aka 'unsigned int *'} INLINE_SIM_FPU (int) sim_fpu_to32i (signed32 *i, const sim_fpu *f, ^~~~~~~~~~~~~ Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
2021-11-03sim: mips: fix missing prototype in multi-run generationMike Frysinger1-0/+3
The multi-run logic for mips involves a bit of codegen and rewriting of files to include per-architecture prefixes. That can result in files with missing prototypes which cause compiler errors. In the case of mips-sde-elf targets, we have: $srcdir/m16run.c -> $builddir/m16mips64r2_run.c sim_engine_run -> m16mips64r2_engine_run $srcdir/micromipsrun.c -> micromipsmicromips_run.c sim_engine_run -> micromips64micromips_engine_run micromipsmicromips_run.c:80:1: error: no previous prototype for 'micromips64micromips_engine_run' [-Werror=missing-prototypes] 80 | micromips64micromips_engine_run (SIM_DESC sd, int next_cpu_nr, int nr_cpus, We generate headers for those prototypes in the configure script, but only include them in the generated multi-run.c file. Update the rewrite logic to turn the sim-engine.h include into the relevant generated engine include so these files also have their prototypes. $srcdir/m16run.c -> $builddir/m16mips64r2_run.c sim-engine.h -> m16mips64r2_engine.h $srcdir/micromipsrun.c -> micromipsmicromips_run.c sim-engine.h -> micromips64micromips_engine.h
2021-11-01sim: mips: reduce -Wno-error scopeMike Frysinger1-2/+2
Fix a few printf warnings in sim-main.c, and then we're left with only one file in here still generating warnings, so reduce the -Werror disable to that alone now that we require GNU make and can set variables on a per-object basis.
2021-10-31sim: igen: tighten up build outputMike Frysinger1-9/+9
Add a new stamp helper for quiet builds, and don't dump the command line options when it runs. That isn't standard tool behavior, and doesn't really seem necessary in any way.
2021-10-31sim: silence stamp touch rulesMike Frysinger1-6/+6
We pretty much never care about these stamp touches, so silence them. Also switch to using $@ when it makes sense.
2021-10-31sim: standardize move-if-change rulesMike Frysinger1-103/+71
Use the srcroot path and make them all silent.
2021-10-31sim: mips/v850: remove redundant variable setupMike Frysinger1-5/+0
The common/Make-common.in fragment already provides these variables.
2021-06-21sim: hw: rework configure option & device selectionMike Frysinger1-0/+1
The sim-hardware configure option allows builders to select a set of device models to enable. But this seems like unnecessary overkill: the existence of individual device models doesn't affect performance at all as they are only enabled at runtime if the config uses them, and individually these are all <5KB a piece. Stripping off a total of ~50KB from a ~1MB binary doesn't seem useful, and it's extremely unlikely anyone will ever bother. So let's simplify the configure/make logic by turning sim-hardware into a boolean option like many of the other sim options. Any ports that have unique device models will declare them in their Makefile instead of at configure time. This will allow us to (eventually) unify the setting into the common dir.
2021-06-18sim: move -Werror disabling to MakefileMike Frysinger1-0/+2
For the ports that still don't build with -Werror, rather than disable the flag at configure time, do it at make time. This will allow us to unify these tests in the common sim configure script.
2021-06-08sim: igen: harmonize tool variablesMike Frysinger1-15/+15
Separate the name of the igen program from the options used to run it. This allows us to avoid duplicating ../igen/igen in Makefiles and reuse the existing setting in the common Makefile. This also allows us to easily harmonize the use of EXEEXT between igen/local.mk and the common makefiles when cross-compiling for e.g. Windows.
2021-05-04sim: mips: delete unused constant variablesMike Frysinger1-5/+1
Since these never change, inline and delete them.
2021-04-22Remove and modernize dependencies in simTom Tromey1-9/+2
Some spots in the sim build used manual dependencies, and some spots did a compilation by hand but did not use the automatic dependency tracking code. This patch fixes these spots. I didn't touch ppc, because it doesn't use the common Makefile code. I also didn't touch objects that are for the build machine, because automatic dependencies don't work for those. sim/arm/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (armemu26.o, armemu32.o): Use COMPILE and POSTCOMPILE. sim/bpf/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (arch.o, cpu.o, sim-if.o, traps.o): Remove. (mloop-le.o, mloop-be.o, decode-le.o, decode-be.o, sim-le.o) (sim-be.o): Use COMPILE and POSTCOMPILE. (SIM_EXTRA_DEPS): Add eng-le.h, eng-be.h. sim/cr16/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (SIM_EXTRA_DEPS): New variable. (simops.o): Remove. sim/cris/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (sim-if.o, dv-cris.o, dv-rv.o, arch.o, traps.o) (devices.o, crisv10f.o, mloopv10f.o, cpuv10.o, decodev10.o) (modelv10.o, crisv32f.o, mloopv32f.o, cpuv32.o, decodev32.o) (modelv32.o): Remove. (SIM_EXTRA_DEPS): Add engv10.h. sim/d10v/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (SIM_EXTRA_DEPS): New variable. (simops.o): Remove. sim/frv/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (arch.o, devices.o, frv.o, traps.o, pipeline.o) (interrupts.o, memory.o, cache.o, options.o, reset.o) (registers.o, profile.o, profile-fr400.o, profile-fr450.o) (profile-fr500.o, profile-fr550.o, sim-if.o, mloop.o, cpu.o) (decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/iq2000/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (sim-if.o): Remove. (arch.o): Use COMPILE and POSTCOMPILE. (devices.o, iq2000.o, mloop.o, cpu.o, decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/lm32/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (arch.o, traps.o, sim-if.o, lm32.o, mloop.o) (cpu.o, decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/m32r/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (sim-if.o, arch.o, traps.o, traps-linux.o) (devices.o, m32r.o, mloop.o, cpu.o, decode.o, sem.o, model.o) (m32rx.o, mloopx.o, cpux.o, decodex.o, semx.o, modelx.o) (m32r2.o, mloop2.o, cpu2.o, decode2.o, sem2.o, model2.o): Remove. (SIM_EXTRA_DEPS): Add eng.h, engx.h, eng2.h. sim/m68hc11/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o): Remove. sim/mips/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o): Remove. (SIM_EXTRA_DEPS): New variable. sim/mn10300/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o): Remove. (idecode.o op_utils.o semantics.o): Remove. sim/or1k/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (mloop.o, arch.o, cpu.o, decode.o, sem.o) (sem-switch.o, model.o): Remove. sim/rl78/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o) (reg.o, rl78.o): Remove. sim/rx/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o) (misc.o, reg.o, rx.o, syscalls.o, trace.o): Remove. sim/sh/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (SIM_EXTRA_DEPS): New variable. (interp.o): Remove. sim/v850/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o, simops.o, semantics.o): Remove.
2021-04-08sim: set ASAN_OPTIONS=detect_leaks=0 when running igen and opc2cSimon Marchi1-10/+10
The igen/dgen and opc2c tools leak their heap-allocated memory (on purpose) at program exit, which makes AddressSanitizer fail the tool execution. This breaks the build, as it makes the tool return a non-zero exit code. Fix that by disabling leak detection through the setting of that environment variable. I also changed the opc2c rules for m32c to go through a temporary file. What happened is that the failing opc2c would produce an incomplete file (probably because ASan exits the process before stdout is flushed). This meant that further make attempts didn't try to re-create the file, as it already existed. A "clean" was therefore necessary. This can also happen in regular builds if the user interrupts the build (^C) in the middle of the opc2c execution and tries to resume it. Going to a temporary file avoids this issue. sim/m32c/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running opc2c. sim/mips/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/mn10300/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/ppc/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/v850/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. Change-Id: I00f21d4dc1aff0ef73471925d41ce7c23e83e082
2021-04-02sim: igen: merge build into top levelMike Frysinger1-7/+0
This simplifies the build a bit (especially for deps in port subdirs), and avoids recursive make. This in turn speeds up the build, and sets us up for multi-target.
2021-02-27sim: delete redundant SIM_EXTRA_ALLMike Frysinger1-1/+1
We don't need a variable to add a dependency to the "all" target, and having one doesn't really add value. Switch to the target directly for the few ports that actually use this.
2015-12-27sim: unify sim-hloadMike Frysinger1-1/+0
Pretty much all targets are using this module already, so add it to the common list of objects. The only oddball out here is cris and that's because it supports loading via an offset for all the phdrs. We drop support for that.
2015-11-16sim: sim-stop/sim-reason/sim-reg: move to common obj listMike Frysinger1-2/+0
Now that all arches (for the most part) have moved over, move sim-stop.o, sim-reason.o, and sim-reg.o to the common object list and out of all the arch ports.
2015-09-25[PATCH] Add micromips support to the MIPS simulatorAndrew Bennett1-40/+284
2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com> Ali Lown <ali.lown@imgtec.com> sim/common/ * sim-bits.h (EXTEND6): New macro. (EXTEND12): New macro. (EXTEND25): New macro. sim/mips/ * Makefile.in (tmp-micromips): New rule. (tmp-mach-multi): Add support for micromips. * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim that works for both mips64 and micromips64. (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and micromips32. Add build support for micromips. * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc, do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv, do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu, do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv, do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append, do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions. Refactored instruction code to use these functions. * dsp2.igen: Refactored instruction code to use the new functions. * interp.c (decode_coproc): Refactored to work with any instruction encoding. (isa_mode): New variable (RSVD_INSTRUCTION): Changed to 0x00000039. * m16.igen (BREAK16): Refactored instruction to use do_break16. (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models. * micromips.dc: New file. * micromips.igen: New file. * micromips16.dc: New file. * micromipsdsp.igen: New file. * micromipsrun.c: New file. * mips.igen (do_swc1): Changed to work with any instruction encoding. (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc, do_scd do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu, do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt, do_add_fmt do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1, do_cvt_d_fmt do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl, do_cvt_s_pu do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt, do_luxc1_32 do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b, do_mov_fmt, do_movtf do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt, do_mtc1b, do_mul_fmt do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps, do_plu_ps, do_pul_ps do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt, do_prefx, do_sdc1 do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt, do_swc1, do_swxc1 do_trunc_fmt): New functions, refactored from existing instructions. Refactored instruction code to use these functions. (RSVD): Changed to use new reserved instruction. (loadstore_ea, not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32, do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double, do_store_double): Added micromips32 and micromips64 models. Added include for micromips.igen and micromipsdsp.igen Add micromips32 and micromips64 models. (DecodeCoproc): Updated to use new macro definition. * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di, do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu, do_seb, do_seh do_rdhwr, do_wsbh): New functions. Refactored instruction code to use these functions. * sim-main.h (CP0_operation): New enum. (DecodeCoproc): Updated macro. (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE, MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16, MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and ISA_MODE_MICROMIPS): New defines. (sim_state): Add isa_mode field. sim/testsuite/sim/mips/ * basic.exp (run_micromips_test, run_sim_tests): New functions Add support for micromips tests. * hilo-hazard-4.s: New file. * testutils.inc (_dowrite): Changed reserved instruction encoding. (writemsg): Moved the la and li instructions before the data they are assigned to, which prevents a bug where MIPS32 relocations are used instead of micromips relocations when building for micromips.
2015-04-15sim: unify sim-cpu usageMike Frysinger1-1/+0
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the cpu state is multicore, and the STATE_CPU defines match, we can move it all to the common code.
2015-04-13sim: mips: convert to sim-cpuMike Frysinger1-0/+1
Make cpu allocation fully dynamic so we can leverage the common sim-cpu and its APIs.
2015-04-12sim: arm/mips: fix sim_read/sim_write linkage errorsMike Frysinger1-1/+1
With sim-hrw.o being built & linked in the common list, some people are getting linking errors now for these targets. Move the main objects that provide these functions before the common list to avoid that.
2015-04-06sim: move sim-engine.o/sim-hrw.o to the common listMike Frysinger1-1/+0
This makes these two objects available to all sims by default.
2015-03-23sim: dv-sockser: move build to common dirMike Frysinger1-2/+0
If dv-sockser is available, lets add it to the common SIM_HW_OBJS variable so it is always included automatically. Now ports do not have to shoe horn it in directly themselves. It does mean it will be compiled for targets that don't explicitly use it, but that's really what we want anyways.
2015-03-14sim: make nrun the default run programMike Frysinger1-4/+0
We want people to stop using the run.c frontend, but it's hard to notice when it's still set as the default. Lets flip things so nrun.c is the default, and users of run.c will get an error by default. We turn that error into a warning for existing sims so we don't break them -- this is mostly meant for people starting new ports.
2011-07-08 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.hHans-Peter Nilsson1-0/+2
$(SIM_EXTRA_DEPS).
2011-07-08 * Makefile.in (tmp-mach-multi): Exit early when igen fails.Hans-Peter Nilsson1-1/+1
2007-06-25sim/mips/Richard Sandiford1-0/+1
* Makefile.in (m16_run.o): New rule.
2007-02-20 [ gas/ChangeLog ]Thiemo Seufer1-0/+1
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2, ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support. (macro_build): Add case '2'. (macro): Expand M_BALIGN to nop, packrl.ph or balign. (validate_mips_insn): Add support for balign instruction. (mips_ip): Handle DSP R2 instructions. Support balign instruction. (OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE, md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2 command line options. (s_mipsset): Add support for .set dspr2 and .set nodspr2 directives. (md_show_usage): Add -mdspr2 and -mno-dspr2 help output. * doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2, .set dspr2, .set nodspr2. [ gas/testsuite/ChangeLog ] * gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for DSP R2. * gas/mips/mips.exp: Run new test. [ include/opcode/Changelog ] * mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction. (INSN_DSPR2): Add flag for DSP R2 instructions. (M_BALIGN): New macro. [ opcodes/ChangeLog ] * mips-dis.c (mips_arch_choices): Add DSP R2 support. (print_insn_args): Add support for balign instruction. * mips-opc.c (D33): New shortcut for DSP R2 instructions. (mips_builtin_opcodes): Add DSP R2 instructions. [ sim/mips/ChangeLog ] * Makefile.in (IGEN_INCLUDE): Add dsp2.igen. * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add dsp2 to sim_igen_machine. * configure: Regenerate. * dsp.igen (do_ph_op): Add MUL support when op = 2. (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph. (mulq_rs.ph): Use do_ph_mulq. (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen. * mips.igen: Add dsp2 model and include dsp2.igen. (MFHI, MFLO, MTHI, MTLO): Extend these instructions for for *mips32r2, *mips64r2, *dsp. (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions for *mips32r2, *mips64r2, *dsp2. * dsp2.igen: New file for MIPS DSP REV 2 ASE. [ sim/testsuite/sim/mips/ChangeLog ] * basic.exp: Run the dsp2 test. * utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro. * mips32-dsp2.s: New test.
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