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path: root/sim/m32r/Makefile.in
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2004-05-18 * Makefile.in (stamp-xmloop, stamp-2mloop): Use -outfile-suffix.Daniel Jacobowitz1-7/+10
2003-12-19Add support for m32r-linux target, including a RELA ABI and PIC.Nick Clifton1-2/+5
2003-12-11Add support for the m32r2 processorNick Clifton1-2/+38
2003-12-07Revert last commit, build problems.Andrew Cagney1-38/+1
2003-12-072003-12-02 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>Andrew Cagney1-1/+38
* Makefile.in : Add new machine m32r2. * m32r2.c : New file for m32r2. * mloop2.in : Ditto * model2.c : Ditto * sem2-switch.c : Ditto * m32r-sim.h : Add EVB register. * sim-if.h : Ditto * sim-main.h : Ditto * traps.c : Ditto
2003-09-082003-09-08 Dave Brolley <brolley@redhat.com>Dave Brolley1-1/+6
On behalf of Doug Evans <dje@sebabeach.org> * Makefile.in (stamp-arch,stamp-cpu,stamp-xcpu): Pass archfile to cgen.
2001-07-052001-07-05 Ben Elliston <bje@redhat.com>Ben Elliston1-3/+3
* Make-common.in (srccgen): Remove. (CGEN_CPU_DIR): Define. (CGEN_READ_SCM): Redefine without $(srccgen). (CGEN_ARCH_SCM): Ditto. (CGEN_CPU_SCM): Ditto. (CGEN_DECODE_SCM): Ditto. (CGEN_DESC_SCM): Ditto. * $arch/Makefile.in: Use $(CGEN_CPU_DIR) where applicable.
2000-11-18 * Makefile.in: remove `@true' commands for rules that haveGreg McGary1-4/+1
$(CGEN_MAINT) as a prerequisite.
2000-08-282000-08-28 Dave Brolley <brolley@redhat.com>Dave Brolley1-3/+3
* Makefile.in: Use of @true confuses VPATH. Remove it. * cpu.h: Regenerated. * cpux.h: Regenerated. * decode.c: Regenerated. * decodex.c: Regenerated. * model.c: Regenerated. * modelx.c: Regenerated. * sem-switch.c: Regenerated. * sem.c: Regenerated. * semx-switch.c: Regenerated.
2000-08-21* Contribute CGEN simulator build support code.Frank Ch. Eigler1-0/+28
* Patch was posted by bje@redhat.com.
1999-12-08import gdb-1999-12-07 snapshotJason Molenda1-32/+0
1999-10-12import gdb-1999-10-11 snapshotJason Molenda1-1/+58
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+95
1999-04-16Initial creation of sourceware repositoryStan Shebs1-159/+0
1999-02-10 * Makefile.in (SIM_EXTRA_DEPS): Add m32r-desc.h, delete cpu-opc.h.Doug Evans1-17/+17
(stamp-arch,stamp-cpu): Update FLAGS variable, option syntax changed. (stamp-xmloop): s/-parallel/-parallel-write/. (stamp-xcpu): Update FLAGS variable, option syntax changed. * configure.in (sim_link_files,sim_link_links): Delete. * configure: Rebuild. * decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. * decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild. * mloop.in (execute): CGEN_INSN_ATTR renamed to CGEN_INSN_ATTR_VALUE. * sim-if.c (sim_open): m32r_cgen_cpu_open renamed from m32r_cgen_opcode_open. Set disassembler. (sim_close): m32r_cgen_cpu_open renamed from m32r_cgen_opcode_open. * sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include m32r-desc.h,m32r-opc.h,m32r-sim.h.
1999-01-12 * Makefile.in (m32r-clean): rm eng.h.Doug Evans1-2/+3
1999-01-06 * Makefile.in (MAIN_INCLUDE_DEPS): Delete.Doug Evans1-57/+53
(INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete. (sim-if.o): Use SIM_MAIN_DEPS. (arch.o,traps.o,devices.o): Ditto. (M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS. (m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies. (m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto. (stamp-arch): Pass mach=all to cgen-arch. * cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate. * m32r-sim.h (fr30bf_h_cr_[gs]et_handler): Declare. ([GS]ET_H_CR): Define. (fr30bf_h_psw_[gs]et_handler): Declare. ([GS]ET_H_PSW): Define. (fr30bf_h_accum_[gs]et_handler): Declare. ([GS]ET_H_ACCUM): Define. (fr30xf_h_{cr,psw,accum}_[gs]et_handler): Declare. (fr30bf_h_accums_[gs]et_handler): Declare. ([GS]ET_H_ACCUMS): Define. * sim-if.c (sim_open): Model probing code moved to sim-model.c. * m32r.c (WANT_CPU): Define as m32rbf. (all register access fns): Rename to ..._handler. * cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate. * m32rx.c (WANT_CPU): Define as m32rxf. (all register access fns): Rename to ..._handler.
1998-10-09 Add pseudo-basic-block execution support.Doug Evans1-43/+26
* Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o. (SIM_EXTRA_DEPS): Add include/opcode/cgen.h. (INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h. (mloop.c): Build pseudo-basic-block version. Depend on stamp-cpu. (stamp-decode): Delete, build decode files with other cpu files. * arch.c,arch.h,cpuall.h: Regenerate. * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate. * sem-switch.c,sem.c: Regenerate. * m32r-sim.h (M32R_MISC_PROFILE): New members load_regs, load_regs_pending. * m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register. (m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set, m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get, m32rbf_h_accum_set): Likewise. (m32r_model_{init,update}_insn_cycles): Delete. (m32rbf_model_insn_{before,after}): New fns. (m32r_model_record_cti,m32r_model_record_cycles): Delete. (m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete. (m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete. (check_load_stall): New fn. (m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns. (m32rbf_model_test_u_exec): New fn. * mloop.in: Rewrite, use pbb support. * sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete. (sim_fetch_register,sim_store_register): Delete. * sim-main.h (CIA_GET,CIA_SET): Fix. (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete. * tconfig.in (WITH_SCACHE_PBB): Define. (WITH_SCACHE_PBB_M32RBF): Define. * traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_.... (m32r_trap): Pass pc to sim_engine_halt. * configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384. * configure: Regenerate. start-sanitize-m32rx * Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o. (mloopx.c): Build pseudo-basic-block version. Depend on stamp-xcpu. (semx.o): Delete. (extractx.o): Add. (stamp-xdecode): Delete, build decode files with other cpu files. * cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate. * readx.c: Delete. * semx.c: Delete. * extractx.c: New file. * semx-switch.c: New file. * m32r-sim.h (BRANCH_NEW_PC): Delete. (SEM_SKIP_INSN): New macro. * m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register. (m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set, m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get, m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise. (m32rxf_model_insn_{before,after}): New fns. (m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete. (m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete. (check_load_stall): New fn. (m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns. * mloopx.in: Rewrite, use pbb support. * tconfig.in (WITH_SCACHE_PBB_M32RXF): Define. (WITH_SEM_SWITCH_FULL): Change from 0 to 1. end-sanitize-m32rx
1998-08-03 * Makefile.in (INCLUDE_DEPS): Add include/opcode/cgen.h.Doug Evans1-7/+12
* sim-if.c (sim_open): Open opcode table. (sim_close): Close it.
1998-06-11 * Makefile.in (SIM_OBJS): Add traps.oDoug Evans1-1/+4
1998-05-06 * Makefile.in (m32r.o,mloop.o,cpu.o,model.o): Add decode.h dependency.Doug Evans1-23/+29
(m32rx.o,mloopx.o,cpux.o,modelx.o): Add decodex.h dependency. * decode.c,decode.h: Regenerate, introduces IDESC table. * mloop.in (extract16,extract32): Add IDESC support. Update names of semantic handler member names. (execute): Ditto. Delete call to PROFILE_COUNT_INSN. * decodex.c,decodex.h: Regenerate, introduces IDESC table. * mloopx.in: Add IDESC support. Update names of semantic handler member names. Delete call to PROFILE_COUNT_INSN.
1998-03-04 * Makefile.in (SIM_EXTRA_DEPS): Add cpu-opc.h.Doug Evans1-6/+6
(arch.o): Delete cpu-opc.h dependency. (decode.o,model.o): Likewise. (decodex.o,modelx.o): Likewise.
1998-02-28Add generic sim-info.c:sim_info() function using module mechanism.Andrew Cagney1-4/+14
Clean up compile probs in mips/vr5400.
1998-02-05 * Makefile.in (m32r.o): Depend on cpu.hDoug Evans1-15/+14
(extract.o): Pass -DSCACHE_P. * mloop.in (extract{16,32}): Update call to m32r_decode. * arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate. * extract.c,model.c,sem-switch.c,sem.c: Regenerate. * sim-main.h: #include "ansidecl.h". Don't include cpu-opc.h, done by arch.h. start-sanitize-m32rx * Makefile.in (M32RX_OBJS): Build m32rx support now. (m32rx.o): New rule. * m32r-sim.h (m32rx_h_cr_[gs]et): Define. * m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC. (m32rx_h_accums_get): New function. * mloopx.in: Update call to m32rx_decode. Rewrite exec loop. * cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate. end-sanitize-m32rx
1998-01-20 * Makefile.in: Add m32rx objs, and rules to build them.Doug Evans1-4/+7
* cpux.h, decodex.h, decodex.c, readx.c, semx.c, modelx.c: New files. * m32rx.c, mloopx.in: New files.
1998-01-20 * arch.c, arch.h, cpuall.h: New files.Doug Evans1-30/+97
* arch-defs.h: Deleted. * mloop.in: Renamed from mainloop.in. * sem.c: Renamed from semantics.c. * Makefile.in: Update. * sem-ops.h: Deleted. * mem-ops.h: Deleted. start-sanitize-cygnus Add cgen support for generating files. end-sanitize-cygnus (arch): Renamed from CPU. * decode.c: Redone. * decode.h: Redone. * extract.c: Redone. * model.c: Redone. * sem-switch.c: Redone. * sem.c: Renamed from semantics.c, and redone. * m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update. (GETTWI,SETTWI,BRANCH_NEW_PC): Define. * m32r.c (WANT_CPU,WANT_CPU_M32R): Define. (m32r_{fetch,store}_register): New functions. (model_mark_{get,set}_h_gr): Prefix with m32r_. (m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_. (h_cr_{get,set}): Prefix with m32r_. (do_trap): Fetch state from current_cpu, not current_state. Call sim_engine_halt instead of engine_halt. * sim-if.c (alloc_cpu): New function. (free_state): New function. (sim_open): Call sim_state_alloc, and malloc space for selected cpu type. Call sim_analyze_program. (sim_create_inferior): Handle selected cpu type when setting PC. start-sanitize-m32rx (sim_resume): Handle m32rx. end-sanitize-m32rx (sim_stop_reason): Deleted. (print_m32r_misc_cpu): Update. start-sanitize-m32rx (sim_{fetch,store}_register): Handle m32rx. end-sanitize-m32rx (sim_{read,write}): Deleted. (sim_engine_illegal_insn): New function. * sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h. Include arch.h,cpuall.h. Include cpu.h,decode.h if m32r. start-sanitize-m32rx Include cpux.h,decodex.h if m32rx. end-sanitize-m32rx (_sim_cpu): Include member appropriate cpu_data member for the cpu. (M32R_MISC_PROFILE): Renamed from M32R_PROFILE. (sim_state): Delete members core,events,halt_jmp_buf. Change `cpu' member to be a pointer to the cpu's struct, rather than record inside the state struct. * tconfig.in (WITH_DEVICES): Define here. (WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu.
1997-08-27Add ABFD argument to sim_create_inferior. Document.Andrew Cagney1-0/+86
Add file sim-hload.c - generic load for hardware only simulators. Review each simulators sim_open, sim_load, sim_create_inferior so that they more closely match required behavour.
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