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AgeCommit message (Expand)AuthorFilesLines
2016-01-04sim: parse_args: polish getopt error messageMike Frysinger1-0/+4
2016-01-04sim: punt x86-specific bswap logicMike Frysinger1-0/+9
2016-01-03sim: parse_args: display getopt error ourselvesMike Frysinger1-0/+6
2016-01-03sim: clean up some more device detritusMike Frysinger1-0/+5
2016-01-03sim: use libiberty countargv in more placesMike Frysinger1-0/+5
2016-01-03sim: nrun: use lbasenameMike Frysinger1-0/+6
2016-01-03sim: drop host endian configure optionMike Frysinger1-0/+28
2016-01-03sim: convert to bfd_endianMike Frysinger1-0/+41
2016-01-02sim: delete dead current_state globalsMike Frysinger1-0/+6
2015-12-30sim: simplify STATE_MY_NAME setupMike Frysinger1-0/+5
2015-12-27sim: unify sim-hloadMike Frysinger1-0/+4
2015-12-26sim: punt WITH_DEVICES & tconfig.h supportMike Frysinger1-0/+19
2015-12-26sim: sim-core: pass down cpu to hw accesses when availableMike Frysinger1-0/+7
2015-12-25sim: hw-properties: delete trace callsMike Frysinger1-0/+8
2015-12-25sim: drop WITH_ENGINE defineMike Frysinger1-0/+5
2015-12-25sim: sim-model: build for everyoneMike Frysinger1-0/+15
2015-12-25sim: move MACH/MODEL types into SIM_xxx namespaceMike Frysinger1-0/+7
2015-12-25sim: device_error: puntMike Frysinger1-0/+10
2015-12-25sim: always enable callback memoryMike Frysinger1-0/+7
2015-12-25sim: dv-pal: always use CPU_INDEXMike Frysinger1-0/+5
2015-12-24sim: make LMA loading the default for all targetsMike Frysinger1-0/+6
2015-12-24sim: cris: move option install to sim_openMike Frysinger1-0/+4
2015-12-24sim: h8300: move h8300-specific options out of common codeMike Frysinger1-0/+7
2015-12-24sim: enable watchpoint module everywhereMike Frysinger1-0/+5
2015-12-24sim: delete SIM_HAVE_FLATMEM supportMike Frysinger1-0/+9
2015-12-24sim: delete SIM_HAVE_SIMCACHEMike Frysinger1-0/+4
2015-11-22sim: common: set up CPPFLAGS/CXXFLAGS/LDFLAGS from configure [PR sim/18762]Mike Frysinger1-0/+5
2015-11-22sim: sim_do_commandf: fix call to va_end [PR sim/19273]Mike Frysinger1-0/+6
2015-11-22sim: common: add PRI printf definesMike Frysinger1-0/+8
2015-11-17sim: always enable modulo memoryMike Frysinger1-0/+8
2015-11-17sim: sim-close: use XCONCAT2 helperMike Frysinger1-0/+5
2015-11-16sim: sim-stop/sim-reason/sim-reg: move to common obj listMike Frysinger1-0/+5
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger1-0/+5
2015-09-25[PATCH] Add micromips support to the MIPS simulatorAndrew Bennett1-0/+7
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu1-160/+160
2015-06-24sim: trace: drop unused trace_one_insnMike Frysinger1-0/+5
2015-06-24sim: trace: rename debug_printf fullyMike Frysinger1-0/+8
2015-06-24sim: trace: add a basic cpu register classMike Frysinger1-0/+10
2015-06-24sim: trace: add set of system helpersMike Frysinger1-0/+7
2015-06-24sim: trace: document alu/fpu/vpu trace options betterMike Frysinger1-0/+7
2015-06-23sim: common: replace SIM_FILTER_PATH with lbasenameMike Frysinger1-0/+10
2015-06-23sim: use AS_HELP_STRING everywhereMike Frysinger1-0/+27
2015-06-23sim: trace: do not enable internal debug by defaultMike Frysinger1-0/+4
2015-06-23sim: assume recentish compiler/systemsMike Frysinger1-0/+5
2015-06-21sim: common: add basic model assertMike Frysinger1-0/+4
2015-06-21sim: common: use standard intXX_t types for signedXXMike Frysinger1-0/+6
2015-06-21sim: common: standardize multiple include definesMike Frysinger1-0/+13
2015-06-18sim: syscall: simplify unknown syscall traceMike Frysinger1-0/+5
2015-06-18sim: callback: fix sentinel testing when walking mapsMike Frysinger1-0/+5
2015-06-17sim: syscall: add common sim_syscall helpersMike Frysinger1-0/+7
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