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2018-01-22MAINTAINERS: Update my company e-mail addressMaciej W. Rozycki1-0/+4
Following my recent transition from Imagination Technologies to the reincarnated MIPS company update MAINTAINERS entries accordingly. binutils/ * MAINTAINERS: Update my company e-mail address. gdb/ * MAINTAINERS: Update my company e-mail address. sim/ * MAINTAINERS: Update my company e-mail address.
2017-12-12sim: or1k: add autoconf generated filesStafford Horne1-0/+8
These are separted out to make the patch easier to read and smaller. sim/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Peter Gavin <pgavin@gmail.com> * configure: Regenerated. * or1k/aclocal.m4: Generated. * or1k/config.in: Generated. * or1k/configure: Generated.
2017-12-12sim: or1k: add cgen generated filesStafford Horne1-0/+14
These are the simulator files generated by cgen. These are split out from the main sim patch to make the patch easier to review and smaller. sim/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Peter Gavin <pgavin@gmail.com> * or1k/arch.c: Generated. * or1k/arch.h: Generated. * or1k/cpu.c: Generated. * or1k/cpu.h: Generated. * or1k/cpuall.h: Generated. * or1k/decode.c: Generated. * or1k/decode.h: Generated. * or1k/model.c: Generated. * or1k/sem-switch.c: Generated. * or1k/sem.c: Generated.
2017-12-12sim: or1k: add or1k target to simStafford Horne1-0/+14
This adds the OpenRISC 32-bit sim target. The OpenRISC sim is a CGEN based sim so the bulk of the code is generated from the .cpu files by CGEN. The engine decode and execute logic in mloop uses scache with pseudo-basic-block extraction and supports both full and fast (switch) modes. The sim does not implement an mmu at the moment. The sim does implement fpu instructions via the common sim-fpu implementation. sim/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Peter Gavin <pgavin@gmail.com> * configure.tgt: Add or1k sim. * or1k/README: New file. * or1k/Makefile.in: New file. * or1k/configure.ac: New file. * or1k/mloop.in: New file. * or1k/or1k-sim.h: New file. * or1k/or1k.c: New file. * or1k/sim-if.c: New file. * or1k/sim-main.h: New file. * or1k/traps.c: New file.
2017-11-01FT32: support for FT32B processor - part 2/2James Bowman1-0/+4
FT32B is a new FT32 family member. This patch adds support for the compressed instructions to gdb and sim. gdb/ChangeLog: * ft32-tdep.c (ft32_fetch_instruction): New function. (ft32_analyze_prologue): Use ft32_fetch_instruction(). sim/ChangeLog: * ft32/interp.c (step_once): Add ft32 shortcode decoder.
2017-10-12FT32: support for FT32B processor - part 1James Bowman1-0/+4
FT32B is a new FT32 family member. It has a code compression scheme, which requires the use of linker relaxations. The change is quite large, so submission is in several parts. Part 1 adds a 15-bit instruction field, and CPU-specific functions for the code compression that are used in binutils and GDB. bfd/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf32-ft32.c: Add HOWTO R_FT32_15. * reloc.c: Add BFD_RELOC_FT32_15. gas/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with K15. (md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15. include/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * elf/ft32.h: Add R_FT32_15. * opcode/ft32.h: Replace FT32_FLD_K8 with K15. (ft32_shortcode, sc_compar, ft32_split_shortcode, ft32_merge_shortcode, ft32_merge_shortcode): New functions. opcodes/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15. * opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with K15. Add jmpix pattern. sim/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
2017-10-12Add myself as ft32 maintainer for sim.James Bowman1-0/+4
sim/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * MAINTAINERS (ft32): Add myself.
2017-10-03Update my email address.Jim Wilson1-0/+4
sim/ * MAINTAINERS (aarch64): Update my email address.
2017-09-06Honor an existing CC_FOR_BUILD in the environment for sim.John Baldwin1-0/+5
This matches the equivalent bits in bfd/acinclude.m4 sim/ChangeLog: * configure.ac: Honor existing CC_FOR_BUILD in environment. * configure: Regenerate. sim/aarch64/ChangeLog: * configure: Regenerate. sim/arm/ChangeLog: * configure: Regenerate. sim/avr/ChangeLog: * configure: Regenerate. sim/bfin/ChangeLog: * configure: Regenerate. sim/common/ChangeLog: * acinclude.m4 (SIM_AC_COMMON) Honor existing CC_FOR_BUILD in environment. sim/cr16/ChangeLog: * configure: Regenerate. sim/cris/ChangeLog: * configure: Regenerate. sim/d10v/ChangeLog: * configure: Regenerate. sim/erc32/ChangeLog: * configure: Regenerate. sim/frv/ChangeLog: * configure: Regenerate. sim/ft32/ChangeLog: * configure: Regenerate. sim/h8300/ChangeLog: * configure: Regenerate. sim/iq2000/ChangeLog: * configure: Regenerate. sim/lm32/ChangeLog: * configure: Regenerate. sim/m32c/ChangeLog: * configure: Regenerate. sim/m32r/ChangeLog: * configure: Regenerate. sim/m68hc11/ChangeLog: * configure: Regenerate. sim/mcore/ChangeLog: * configure: Regenerate. sim/microblaze/ChangeLog: * configure: Regenerate. sim/mips/ChangeLog: * configure: Regenerate. sim/mn10300/ChangeLog: * configure: Regenerate. sim/moxie/ChangeLog: * configure: Regenerate. sim/msp430/ChangeLog: * configure: Regenerate. sim/rl78/ChangeLog: * configure: Regenerate. sim/rx/ChangeLog: * configure: Regenerate. sim/sh/ChangeLog: * configure: Regenerate. sim/sh64/ChangeLog: * configure: Regenerate. sim/v850/ChangeLog: * configure: Regenerate.
2017-02-14Add self to aarch64 maintainers. Fix mla instruction.Jim Wilson1-0/+4
sim/ * MAINTAINTERS (aarch64): Add myself. sim/aarch64/ * simulator.c (do_vec_MLA): Rewrite switch body. sim/testsuite/sim/aarch64/ * mla.s: New.
2016-12-14MAINTAINERS: Add myself as a MIPS maintainerMaciej W. Rozycki1-0/+5
* MAINTAINERS (Maintainers for particular sims): Add myself as a MIPS maintainer.
2016-10-18sim: avr: move changelog entries to subdirMike Frysinger1-7/+0
2016-07-19 Update PC when simulate break instruction.Denis Chertykov1-0/+7
PR target/ 19401 * avr/interp.c (step_once): Pass break instruction address to sim_engine_halt function which writes that to PC. Remove code that follows that function call as it is unreachable.
2016-04-10Move ChangeLog entries from sim/ChangeLog to sim/sh/ChangeLog.Oleg Endo1-5/+0
2016-04-09Adjust default memory size and stack base address for SH simulator.Oleg Endo1-0/+5
ld/ChangeLog: * sh/interp.c (sim_memory_size): Default init to 30. (parse_and_set_memory_size): Adjust upper bound to 31. sim/ChangeLog: * sh/interp.c (sim_memory_size): Default init to 30. (parse_and_set_memory_size): Adjust upper bound to 31.
2016-02-03MAINTAINERS: Add Thiemo Seufer back, as a past maintainerMaciej W. Rozycki1-0/+4
Complement commit 26e0f8dbd817 ("* MAINTAINERS: Remove Thiemo Seufer."). * MAINTAINERS (Past sim maintainers): Add Thiemo Seufer.
2016-01-09sim: stop configuring common subdirMike Frysinger1-0/+7
Now that cconfig.h doesn't exist, there's no need to build in the common subdir anymore. We leave the configure/Makefile files in there as there is a helper for developers to generate the nltvals.def file. Once that gets cleaned up in the future though, we can drop the build logic too.
2016-01-09sim: drop common/cconfig.h in favor of a single config.hMike Frysinger1-0/+4
The common subdir sets up a cconfig.h file to hold checks for the common code. In practice, most files still end up using config.h instead which just leads to confusion. Merge all the configure checks that went into cconfig.h into SIM_AC_COMMON so we can drop the cconfig.h file altogether. Now there is only a single config.h file like normal.
2016-01-05Add myself as the maintainer for the AArch64.Nick Clifton1-0/+4
2016-01-04sim: aarch64: drop syscall.h include to fix buildTristan Gingold1-0/+4
The simulator is including syscall.h which is not standard and apparently not required (builds correctly without it on my machine).
2015-12-26sim: punt WITH_DEVICES & tconfig.h supportMike Frysinger1-0/+4
No arch is using this anymore, and we want all new ports using the hardware framework instead. Punt WITH_DEVICES and the two callbacks device_io_{read,write}_buffer. We can also punt the tconfig.h file as no port is using it anymore. This fixes in-tree builds that get confused by picking up the wrong one (common/ vs <port>/) caused by commit ae7d0cac8ce971f7108d270c. Any port that needs to set up a global define can use their own sim-main.h file that they must provide regardless.
2015-12-26sim: aarch64: move ChangeLog contentMike Frysinger1-26/+0
2015-12-15Add support for the MRS instruction to the AArch64 simulator.Nick Clifton1-0/+8
* aarch64/simulator.c (system_get): New function. Provides read access to the dczid system register. (do_mrs): New function - implements the MRS instruction. (dexSystem): Call do_mrs for the MRS instruction. Halt on unimplemented system instructions.
2015-11-24Add an AArch64 simulator to GDB.Nick Clifton1-0/+23
sim * configure.tgt: Add aarch64 entry. * configure: Regenerate. * sim/aarch64/configure.ac: New configure template. * sim/aarch64/aclocal.m4: Generate. * sim/aarch64/config.in: Generate. * sim/aarch64/configure: Generate. * sim/aarch64/cpustate.c: New file - functions for accessing AArch64 registers. * sim/aarch64/cpustate.h: New header. * sim/aarch64/decode.h: New header. * sim/aarch64/interp.c: New file - interface between GDB and simulator. * sim/aarch64/Makefile.in: New makefile template. * sim/aarch64/memory.c: New file - functions for simulating aarch64 memory accesses. * sim/aarch64/memory.h: New header. * sim/aarch64/sim-main.h: New header. * sim/aarch64/simulator.c: New file - aarch64 simulator functions. * sim/aarch64/simulator.h: New header. include/gdb * sim-aarch64.h: New file. sim/test * configure: Regenerate. * sim/aarch64: New directory.
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu1-17/+17
2015-06-23sim: use AS_HELP_STRING everywhereMike Frysinger1-0/+5
This helps standardize the configure --help output.
2015-06-12sim: update configure.in->configure.ac docsMike Frysinger1-0/+4
A few places still refer to the configure.in file; update them.
2015-04-02Regenerate configure in simH.J. Lu1-0/+32
* arm/configure: Regenerated. * avr/configure: Likewise. * bfin/configure: Likewise. * common/configure: Likewise. * cr16/configure: Likewise. * cris/configure: Likewise. * d10v/configure: Likewise. * erc32/configure: Likewise. * frv/configure: Likewise. * ft32/configure: Likewise. * h8300/configure: Likewise. * igen/configure: Likewise. * iq2000/configure: Likewise. * lm32/configure: Likewise. * m32c/configure: Likewise. * m32r/configure: Likewise. * m68hc11/configure: Likewise. * mcore/configure: Likewise. * microblaze/configure: Likewise. * mips/configure: Likewise. * mn10300/configure: Likewise. * moxie/configure: Likewise. * msp430/configure: Likewise. * ppc/configure: Likewise. * rl78/configure: Likewise. * rx/configure: Likewise. * sh/configure: Likewise. * sh64/configure: Likewise. * v850/configure: Likewise.
2015-04-01Fix sim buildH.J. Lu1-0/+9
* common/Make-common.in (CSEARCH): Remove $(ZLIBINC). (BFD_LIB): Remove $(ZLIB). (CONFIG_LIBS): Add $(ZLIB). * ppc/Makefile.in (ZLIBINC): Removed. (INCLUDES): Remove $(ZLIBINC). (BFD_LIB): Remove $(ZLIB).
2015-04-01Regenerate configure in simH.J. Lu1-0/+32
* arm/configure: Regenerated. * avr/configure: Likewise. * bfin/configure: Likewise. * common/configure: Likewise. * cr16/configure: Likewise. * cris/configure: Likewise. * d10v/configure: Likewise. * erc32/configure: Likewise. * frv/configure: Likewise. * ft32/configure: Likewise. * h8300/configure: Likewise. * igen/configure: Likewise. * iq2000/configure: Likewise. * lm32/configure: Likewise. * m32c/configure: Likewise. * m32r/configure: Likewise. * m68hc11/configure: Likewise. * mcore/configure: Likewise. * microblaze/configure: Likewise. * mips/configure: Likewise. * mn10300/configure: Likewise. * moxie/configure: Likewise. * msp430/configure: Likewise. * ppc/configure: Likewise. * rl78/configure: Likewise. * rx/configure: Likewise. * sh/configure: Likewise. * sh64/configure: Likewise. * v850/configure: Likewise.
2015-03-29sim: testsuite: make subdir unconditionalMike Frysinger1-0/+6
Since the testsuite subdir has to handle dynamic arch values already, there's no real value in requiring arches to opt in to it. Most have a testsuite now anyways, and we're requiring it in the future.
2015-03-28sim: avr: start a basic testsuiteMike Frysinger1-0/+5
Just enough to know the sim isn't totally broken.
2015-03-28sim: ft32: new portJames Bowman1-0/+5
FT32 is a new high performance 32-bit RISC core developed by FTDI for embedded applications.
2015-03-16sim: rename tconfig.in to tconfig.hMike Frysinger1-0/+5
Rather than manually include tconfig.h when we think we'll need it (which is error prone as it can define symbols we expect from config.h), have it be included directly by config.h. Since we know we have to include that header everywhere already, this will make sure tconfig.h isn't missed. It should also be fine as tconfig.h is supposed to be simple and only set up a few core defines for the target. This allows us to stop symlinking it in place all the time and just use it straight out of the respective source directory.
2015-02-20sim: ChangeLog: Correct the related items position and format.Chen Gang1-19/+0
Move several items from sim/ChangeLog to sim/*/ChangeLog. Also remove the incorrect white space in sim/common/ChangeLog.
2015-02-03sim: Be sure of calling freeargv() after successfully call buildargv().Chen Gang1-0/+5
Or there will be memory leak. 2015-02-02 Chen Gang <gang.chen.5i5j@gmail.com> * microblaze/interp.c (sim_do_command): Call freeargv() before return.
2015-02-03sim: Be sure of calling freeargv() after successfully call buildargv().Chen Gang1-0/+4
Or there will be memory leak. 2015-02-02 Chen Gang <gang.chen.5i5j@gmail.com> * mcore/interp.c (sim_do_command): Call freeargv() before return.
2015-02-03sim: Call freeargv() when failure occursChen Gang1-0/+5
After successfully call buildargv(), the code need to be sure of calling freeargv() in any cases. 2015-02-02 Chen Gang <gang.chen.5i5j@gmail.com> * common/sim-options.c (sim_args_command): Call freeargv() when failure occurs.
2014-06-30Sim - Use long int format instead of int to avoid compiling warningMichael Eager1-0/+5
2014-07-01 Chen Gang <gang.chen.5i5j@gmail.com> * sim/microblaze/interp.c: Use long int format instead of int format to avoid compiling warnings.
2014-03-12Add myself as the maintainer for the MSP430 sim.Nick Clifton1-0/+4
2014-03-10sim: msp430: start a test frameworkMike Frysinger1-0/+5
The current sim lacks any sort of tests. Start a basic framework and add a simple one to test the add insn.
2014-01-07remove VA_* macros from simTom Tromey1-0/+6
Remove the obsolete VA_* macros from sim. 2014-01-06 Tom Tromey <tromey@redhat.com> * common/cgen-trace.c: Don't use old VA_* macros. * common/sim-load.c (xprintf): Likewise. * common/sim-trace.c (trace_printf, debug_printf): Likewise.
2014-01-07remove PARAMS from simTom Tromey1-0/+35
This removes the last uses of PARAMS from sim. 2014-01-06 Tom Tromey <tromey@redhat.com> * README-HACKING: Don't use PARAMS. * arm/wrapper.c: Don't use PARAMS. * bfin/sim-main.h: Don't use PARAMS. * common/callback.c: Don't use PARAMS. * common/cgen-trace.c: Don't use PARAMS. * common/run-sim.h: Don't use PARAMS. * common/run.c: Don't use PARAMS. * common/sim-base.h: Don't use PARAMS. * common/sim-load.c: Don't use PARAMS. * common/sim-options.h: Don't use PARAMS. * common/sim-trace.c: Don't use PARAMS. * common/sim-trace.h: Don't use PARAMS. * common/sim-utils.h: Don't use PARAMS. * cr16/cr16_sim.h: Don't use PARAMS. * cr16/gencode.c: Don't use PARAMS. * cr16/interp.c: Don't use PARAMS. * cr16/simops.c: Don't use PARAMS. * d10v/d10v_sim.h: Don't use PARAMS. * d10v/gencode.c: Don't use PARAMS. * d10v/interp.c: Don't use PARAMS. * d10v/simops.c: Don't use PARAMS. * erc32/erc32.c: Don't use PARAMS. * erc32/exec.c: Don't use PARAMS. * erc32/float.c: Don't use PARAMS. * erc32/func.c: Don't use PARAMS. * erc32/sis.c: Don't use PARAMS. * erc32/sis.h: Don't use PARAMS. * mips/interp.c: Don't use PARAMS. * mips/sim-main.h: Don't use PARAMS. * sh/interp.c: Don't use PARAMS. * v850/sim-main.h: Don't use PARAMS. * v850/v850_sim.h: Don't use PARAMS.
2013-11-07sim/ChangeLog: Correct bug number in previous commit.Will Newton1-1/+1
2013-11-07sim/arm: Prevent crash when running sim with no binary.Will Newton1-0/+6
2013-11-07 Will Newton <will.newton@linaro.org> PR gdb/15508 * arm/wrapper.c (sim_create_inferior): Call init before accessing STATE.
2013-11-07sim/arm: Prevent NULL pointer dereference in sim_create_inferior.Will Newton1-0/+6
2013-11-07 Will Newton <will.newton@linaro.org> PR gdb/9195 * arm/wrapper.c (sim_create_inferior): Avoid calling bfd_get_mach with a NULL bfd.
2013-06-21 * msp430: New Directory.Nick Clifton1-0/+6
* configure.tgt: Add it. * configure: Regenerate. * gennltvals.sh: Add msp430 support. * nltvals.def: Regenerate. * Makefile.in: New. * aclocal.m4: Generate. * config.in: Generate. * configure.ac: New. * configure: Generate. * msp430-sim.c: New. * msp430-sim.h: New. * sim-main.h: New. * trace.c: New. * trace.h: New.
2013-05-06Move ChangeLog entry from sim/ to sim/ppc/...Joel Brobecker1-4/+0
... where it belongs.
2013-04-192013-04-19 Nathan Froyd <froydnj@codesourcery.com>Hafiz Abid Qadeer1-0/+4
* ppc-instructions (isel): New instruction.
2013-03-15gdb:Steve Ellcey1-0/+14
2013-03-15 Steve Ellcey <sellcey@mips.com> * remote-sim.c (sim_command_completer): Make char arguments const. include: 2013-03-15 Steve Ellcey <sellcey@mips.com> * gdb/remote-sim.h (sim_command_completer): Make char arguments const. sim: 2013-03-15 Steve Ellcey <sellcey@mips.com> * arm/wrapper.c (sim_complete_command): Make char arguments const. * avr/interp.c (sim_complete_command): Ditto. * common/sim-options.c (sim_complete_command): Ditto. * cr16/interp.c (sim_complete_command): Ditto. * erc32/interf.c (sim_complete_command): Ditto. * m32c/gdb-if.c (sim_complete_command): Ditto. * microblaze/interp.c (sim_complete_command): Ditto. * ppc/sim_calls.c (sim_complete_command): Ditto. * rl78/gdb-if.c (sim_complete_command): Ditto. * rx/gdb-if.c (sim_complete_command): Ditto. * sh/interp.c (sim_complete_command): Ditto.
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