| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2019-09-19 | bfd_section_* macros | Alan Modra | 2 | -1/+5 |
| 2019-09-18 | Re-generate many configure and Makefile.in files | Simon Marchi | 3 | -16/+8 |
| 2019-09-17 | RISC-V: Gate opcode tables by enum rather than string. | Jim Wilson | 2 | -658/+664 |
| 2019-09-16 | Update version to 2.33.50 and regenerate configure scripts. | Phil Blundell | 2 | -10/+14 |
| 2019-09-10 | Use the correct alias for the M68K tdiv instruction. | Miod Vallat | 2 | -2/+7 |
| 2019-09-09 | Add markers for 2.33 branch to NEWS and ChangeLog files. | Phil Blundell | 1 | -0/+4 |
| 2019-09-03 | Fix buffer underrun bug in the TI C30 disassembler. | Nick Clifton | 2 | -1/+9 |
| 2019-09-03 | Fix a potential buffer overrun in the MMIX disassembler when processing a cor... | Nick Clifton | 2 | -37/+66 |
| 2019-08-27 | Add support for the MVE VMOV instruction to the ARM assembler. This instruct... | Srinath Parvathaneni | 2 | -0/+29 |
| 2019-08-22 | [AArch64][gas] Update MTE system register encodings | Kyrylo Tkachov | 2 | -10/+16 |
| 2019-08-12 | Modify the ARM encoding and decoding of SQRSHRL and UQRSHLL MVE instructions. | Srinath Parvathaneni | 2 | -4/+17 |
| 2019-08-07 | Prevent objdump from aborting when asked to disassemble an unknown type of AR... | Phillipe Antoine | 2 | -6/+19 |
| 2019-08-07 | x86: drop stray FloatMF | Jan Beulich | 3 | -14/+21 |
| 2019-08-05 | Removes support in the ARM assembler for the unsigned variants of the VQ(R)DM... | Barnaby Wilks | 2 | -4/+9 |
| 2019-07-30 | RISC-V: Fix minor issues with FP csr instructions. | Jim Wilson | 2 | -16/+24 |
| 2019-07-24 | [ARC] Update disassembler opcode selection | Claudiu Zissulescu | 2 | -1/+30 |
| 2019-07-24 | [ARC] Update ARC opcode table | Claudiu Zissulescu | 4 | -1461/+2256 |
| 2019-07-23 | [AArch64] Add support for GMID_EL1 register for +memtag | Kyrylo Tkachov | 2 | -1/+8 |
| 2019-07-23 | Add Changelog entry missing from previous delta. | Nick Clifton | 1 | -0/+5 |
| 2019-07-22 | This patch addresses the change in the June Armv8.1-M Mainline specification,... | Barnaby Wilks | 1 | -4/+0 |
| 2019-07-19 | cpu,opcodes,gas: use %r0 and %r6 instead of %a and %ctf in eBPF disassembler | Jose E. Marchesi | 2 | -4/+8 |
| 2019-07-17 | x86: drop stale Mem enumerator | Jan Beulich | 3 | -4/+24 |
| 2019-07-16 | x86: make RegMem an opcode modifier | Jan Beulich | 6 | -16487/+20423 |
| 2019-07-16 | x86: fold SReg{2,3} | Jan Beulich | 7 | -23935/+13937 |
| 2019-07-15 | cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructions | Jose E. Marchesi | 4 | -82/+47 |
| 2019-07-14 | cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructions | Jose E. Marchesi | 3 | -48/+53 |
| 2019-07-10 | arm-dis.c (print_insn_coprocessor): Rename index to index_operand. | Hans-Peter Nilsson | 2 | -5/+10 |
| 2019-07-05 | Kito's 5-part patch set to improve .insn support. | Jim Wilson | 2 | -4/+35 |
| 2019-07-02 | [AArch64] Allow MOVPRFX to be used with FMOV | Richard Sandiford | 2 | -1/+6 |
| 2019-07-02 | [AArch64] Add missing C_MAX_ELEM flags for SVE conversions | Richard Sandiford | 2 | -28/+33 |
| 2019-07-02 | [AArch64] Fix bogus MOVPRFX warning for GPR form of CPY | Richard Sandiford | 2 | -5/+5 |
| 2019-07-01 | [gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AES | Matthew Malcomson | 5 | -301/+340 |
| 2019-07-01 | x86: drop Vec_Imm4 | Jan Beulich | 6 | -9985/+9983 |
| 2019-07-01 | x86: limit ImmExt abuse | Jan Beulich | 3 | -126/+136 |
| 2019-07-01 | x86: optimize AND/OR with twice the same register | Jan Beulich | 3 | -4/+10 |
| 2019-07-01 | x86-64: optimize certain commutative VEX-encoded insns | Jan Beulich | 3 | -334/+371 |
| 2019-07-01 | x86: optimize EVEX packed integer logical instructions | Jan Beulich | 3 | -8/+14 |
| 2019-07-01 | x86: add missing pseudo ops for VPCLMULQDQ ISA extension | Jan Beulich | 4 | -1/+168 |
| 2019-07-01 | x86: drop bogus Disp8MemShift attributes | Jan Beulich | 3 | -6/+12 |
| 2019-07-01 | x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D} | Jan Beulich | 5 | -63/+35 |
| 2019-07-01 | x86: drop a few dead macros | Jan Beulich | 2 | -5/+5 |
| 2019-06-27 | i386: Check vector length for scatter/gather prefetch instructions | H.J. Lu | 5 | -12/+132 |
| 2019-06-27 | x86: fold AVX scalar to/from int conversion insns | Jan Beulich | 2 | -48/+15 |
| 2019-06-27 | x86: allow VEX et al encodings in 16-bit (protected) mode | Jan Beulich | 2 | -33/+42 |
| 2019-06-26 | RISC-V: Make objdump disassembly work right for binary files. | Jim Wilson | 2 | -2/+12 |
| 2019-06-25 | x86: correct / adjust debug printing | Jan Beulich | 3 | -14/+29 |
| 2019-06-25 | x86: drop dqa_mode | Jan Beulich | 4 | -24/+15 |
| 2019-06-25 | x86: simplify OP_I64() | Jan Beulich | 2 | -40/+8 |
| 2019-06-25 | x86: fix (dis)assembly of certain SSE2 insns in 16-bit mode | Jan Beulich | 4 | -9/+17 |
| 2019-06-25 | x86-64: also optimize ANDQ with immediate fitting in 7 bits | Jan Beulich | 3 | -2/+7 |
