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2011-09-10Add PR markersAndreas Schwab1-0/+1
2011-09-08opcodes/David S. Miller2-0/+4
2011-09-08opcodes/David S. Miller2-5/+35
2011-09-08opcodes/David S. Miller2-1/+5
2011-09-07* gas/testsuite/gas/m68k/all.exp: Run "mode5" test also with -mcpu=5200.Andreas Schwab2-10/+9
2011-08-26Updated Spanish translations.Nick Clifton2-163/+168
2011-08-22Move cpu files from cgen/cpu to top level cpu directory.Nick Clifton3-46/+59
2011-08-09 gas/Maciej W. Rozycki4-2/+49
2011-08-09 include/opcode/Maciej W. Rozycki2-82/+103
2011-08-05include/opcode/David S. Miller3-3/+113
2011-08-02opcodes/Quentin Neill2-1/+5
2011-08-01Check R_X86_64_32 overflow and allow R_X86_64_64 for x32.H.J. Lu2-33/+16
2011-08-01Add Disp32S to 64bit call.H.J. Lu3-2/+8
2011-07-24Fix misapplied patch.Richard Sandiford1-24/+25
2011-07-24bfd/Richard Sandiford7-14/+1821
2011-07-24include/opcode/Richard Sandiford3-31/+47
2011-07-22Add initial Intel K1OM support.H.J. Lu9-3114/+3151
2011-07-12 * arm-dis.c (print_insn_arm): Revert previous, undocumented,Nick Clifton2-3/+5
2011-07-01 PR binutils/12329Nick Clifton3-1/+11
2011-07-01Update rorxS.H.J. Lu2-1/+5
2011-06-30Fix rorx in BMI2.H.J. Lu4-7/+12
2011-06-29Replace "index" with "i".H.J. Lu3-8/+13
2011-06-29gas/Richard Sandiford2-4/+11
2011-06-21Re-indent prefix_table.H.J. Lu2-2/+7
2011-06-17* Makefile.am (MAINTAINERCLEANFILES): Move s390-opc.tab ...Andreas Schwab3-5/+11
2011-06-14 * Makefile.in: Regenerate.Alan Modra2-0/+6
2011-06-13 * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.Nick Clifton11-1/+18650
2011-06-10Support AVX Programming Reference (June, 2011).H.J. Lu7-6387/+9478
2011-06-03Add CpuF16C to CPU_BDVER2_FLAGS.Quentin Neill3-2/+7
2011-06-03 PR binutils/12752Nick Clifton2-8/+24
2011-06-02 gas/Nathan Sidwell2-37/+55
2011-06-02Fix spelling mistakes.Nick Clifton3-63/+69
2011-05-242011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel3-16/+22
2011-05-242011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel3-205/+329
2011-05-19 * v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2Nick Clifton2-4/+9
2011-05-112011-05-10 Quentin Neill <quentin.neill@amd.com>Quentin Neill3-0/+12
2011-04-27Updated Danish, Esperanto and French translations.Nick Clifton2-140/+113
2011-04-25 * ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7.Alan Modra2-2/+6
2011-04-21* rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs.DJ Delorie3-585/+594
2011-04-20Regenerate i386-init.h.H.J. Lu2-1/+5
2011-04-19 * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bitsQuentin Neill2-1/+6
2011-04-19 * config/tc-arm.c (v7m_psrs): Revert previous delta.Nick Clifton2-5/+1
2011-04-19 * gas/arm/arch7.s: Fix typo basepri_max should be basepri_mask.Nick Clifton2-10/+5
2011-04-13 * v850-dis.c (disassemble): Always print a closing square brace ifNick Clifton2-3/+15
2011-04-12 PR binutils/12534Nick Clifton2-4/+27
2011-04-11 gas/Julian Brown2-1/+15
2011-04-082011-04-07 Paul Carroll<pcarroll@codesourcery.com>Paul Brook2-18/+27
2011-03-24opcodes: blackfin: ignore (M) on MAC0-only dsp mac funcsMike Frysinger2-1/+8
2011-03-22/bfd:Eric B. Weddington2-8/+30
2011-03-14include/elf/Richard Sandiford2-1/+5
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