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path: root/opcodes/i386-opc.tbl
AgeCommit message (Expand)AuthorFilesLines
2011-08-01Add Disp32S to 64bit call.H.J. Lu1-1/+1
2011-06-30Fix rorx in BMI2.H.J. Lu1-1/+1
2011-06-10Support AVX Programming Reference (June, 2011).H.J. Lu1-1/+195
2011-01-17Add support for TBM instructions.Quentin Neill1-0/+12
2011-01-05Implement BMI instructions.H.J. Lu1-0/+9
2010-10-14Remove CheckRegSize from movq.H.J. Lu1-2/+2
2010-10-14Remove CheckRegSize from instructions with 0, 1 or fixed operands.H.J. Lu1-34/+34
2010-10-14Add CheckRegSize to instructions which require register size check.H.J. Lu1-184/+184
2010-08-06Don't generate multi-byte NOPs for i686.H.J. Lu1-1/+1
2010-08-06Add Cpu186 to ud1/ud2/ud2a/ud2b.H.J. Lu1-4/+4
2010-08-06Add ud1 to x86.H.J. Lu1-3/+5
2010-07-05Replace rdrnd with rdrand.H.J. Lu1-1/+1
2010-07-01Support AVX Programming Reference (June, 2010)H.J. Lu1-0/+16
2010-03-232010-03-22 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-8/+4
2010-02-11Update copyright.H.J. Lu1-1/+1
2010-02-112010-02-10 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-0/+10
2010-01-24Replace "Vex" with "Vex=3" on AVX scalar instructions.H.J. Lu1-208/+208
2010-01-21Add xsave64 and xrstor64.H.J. Lu1-0/+2
2010-01-152010-01-15 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-0/+64
2009-12-19Replace VexNDS, VexNDD and VexLWP with VexVVVV.H.J. Lu1-844/+844
2009-12-16Remove ByteOkIntel.H.J. Lu1-6/+6
2009-12-16Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.H.J. Lu1-1154/+1154
2009-12-16Replace Vex2Sources and Vex3Sources with VexSources.H.J. Lu1-121/+121
2009-12-16Remove VexW0 and VexW1. Add VexW.H.J. Lu1-1101/+1101
2009-12-15Add USE_VEX_W_TABLE, VEX_W_TABLE and VEX_W_XXX.H.J. Lu1-869/+869
2009-12-04Support fxsave64 and fxrstor64.H.J. Lu1-0/+2
2009-11-19Allow lock on cmpxch16b.H.J. Lu1-1/+1
2009-11-182009-11-18 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-7/+0
2009-11-182009-11-17 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-0/+85
2009-11-122009-11-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-11/+11
2009-11-12gas/H.J. Lu1-47/+47
2009-11-052009-11-05 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-0/+15
2009-10-022009-10-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-38/+38
2009-09-24gas/H.J. Lu1-222/+222
2009-07-24gas/Jan Beulich1-204/+217
2009-07-06<gas changes>Dwarakanath Rajagopal1-0/+67
2009-05-22<gas changes>Dwarakanath Rajagopal1-264/+5
2009-04-15gas/testsuite/Jan Beulich1-8/+8
2009-02-23gas/H.J. Lu1-3/+0
2009-02-04gas/H.J. Lu1-0/+13
2009-01-13gas/testsuite/H.J. Lu1-3/+3
2009-01-10gas/H.J. Lu1-7/+8
2009-01-09gas/H.J. Lu1-1/+1
2009-01-06gas/testsuite/H.J. Lu1-0/+3
2009-01-06gas/H.J. Lu1-97/+97
2008-12-23gas/H.J. Lu1-12/+16
2008-12-20gas/H.J. Lu1-28/+28
2008-11-03gas/testsuite/H.J. Lu1-0/+2
2008-09-11gas/testsuite/H.J. Lu1-16/+16
2008-08-28gas/testsuite/Jan Beulich1-0/+4
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