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2005-03-03update copyright datesAlan Modra1-1/+1
2005-03-02gas/Jan Beulich1-4/+13
2005-03-02 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (build_modrm_byte): Add lock prefix for cr8...15 accesses. (parse_register): Allow cr8...15 in all modes. gas/testsuite/ 2005-03-02 Jan Beulich <jbeulich@novell.com> * gas/i386/cr-err.[ls]: New. * gas/i386/crx.[ds]: New. * gas/i386/i386.exp: Run new tests. opcodes/ 2005-03-02 Jan Beulich <jbeulich@novell.com> * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15 accesses. (OP_C): Consider lock prefix in non-64-bit modes.
2005-01-122005-01-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+2
* i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
2005-01-12gas/testsuite/H.J. Lu1-1/+3
2005-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386/i386.exp: Run "sib". * gas/i386/sib.d: New file. * gas/i386/sib.s: Likewise. opcodes/ 2005-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
2004-11-04gas/Jan Beulich1-71/+171
2004-11-04 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (set_intel_syntax): Allow % in symbol names when intel syntax and no register prefix, allow $ in symbol names when intel syntax. (set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX. (intel_float_operand): Add fourth return value indicating math control operations. Make classification more precise. (md_assemble): Complain if memory operand of mov[sz]x has no size specified. (parse_insn): Translate word operands to floating point instructions operating on integers as well as control instructions to short ones as expected by AT&T syntax. Translate 'd' suffix to short one only for floating point instructions operating on non-integer operands. (match_template): Remove fldcw special case. Adjust q-suffix handling to permit it on fild/fistp/fisttp in AT&T mode. (process_suffix): Don't guess DefaultSize insns' suffix from stackop_size for certain floating point control instructions. Guess suffix for branch and [ls][gi]dt based on flag_code. Split error messages for Intel and AT&T syntax, and make the condition more strict for the former. Adjust suppressing of generation of operand size overrides. (intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE, OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add more error checking. * config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines. gas/testsuite/ 2004-11-04 Jan Beulich <jbeulich@novell.com> * gas/i386/i386.exp: Execute new tests intelbad and intelok. * gas/i386/intelbad.[sl]: New test to check for various things not permitted in Intel mode. * gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d: Adjust for change to segment register store. * gas/i386/intelok.[sd]: New test to check various Intel mode specific things get handled correctly. * gas/i386/x86_64.[sd]: Remove unsupported constructs referring to 'high' and 'low' parts of an operand, which the parser previously accepted while neither telling that it's not supported nor that it ignored the remainder of the line following these supposed keywords. include/opcode/ 2004-11-04 Jan Beulich <jbeulich@novell.com> * i386.h (sldx_Suf): Remove. (FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize. (q_FP): Define, implying no REX64. (x_FP, sl_FP): Imply FloatMF. (i386_optab): Split reg and mem forms of moving from segment registers so that the memory forms can ignore the 16-/32-bit operand size distinction. Adjust a few others for Intel mode. Remove *FP uses from all non-floating-point instructions. Unite 32- and 64-bit forms of movsx, movzx, and movd. Adjust floating point operations for the above changes to the *FP macros. Add DefaultSize to floating point control insns operating on larger memory ranges. Remove left over comments hinting at certain insns being Intel-syntax ones where the ones actually meant are already gone. opcodes/ 2004-11-04 Jan Beulich <jbeulich@novell.com> * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define. (indirEb): Remove. (Mp): Use f_mode rather than none at all. (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode replaces what previously was x_mode; x_mode now means 128-bit SSE operands. (dis386): Make far jumps and calls have an 'l' prefix only in AT&T mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq. pinsrw's second operand is Edqw. (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt, fldenv, frstor, fsave, fstenv all should also have suffixes in Intel mode when an operand size override is present or always suffixing. More instructions will need to be added to this group. (putop): Handle new macro chars 'C' (short/long suffix selector), 'I' (Intel mode override for following macro char), and 'J' (for adding the 'l' prefix to far branches in AT&T mode). When an alternative was specified in the template, honor macro character when specified for Intel mode. (OP_E): Handle new *_mode values. Correct pointer specifications for memory operands. Consolidate output of index register. (OP_G): Handle new *_mode values. (OP_I): Handle const_1_mode. (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate respective opcode prefix bits have been consumed. (OP_EM, OP_EX): Provide some default handling for generating pointer specifications.
2004-07-30Added new instructions for next version of VIA PadLock core.Michal Ludvig1-5/+17
2004-07-21Corrections for x86_64 assembly.Nick Clifton1-47/+48
2004-06-23include/opcode/Alan Modra1-25/+106
* i386.h (i386_optab): Remove fildd, fistpd and fisttpd. opcodes/ * i386-dis.c (x_mode): Comment. (two_source_ops): File scope. (float_mem): Correct fisttpll and fistpll. (float_mem_mode): New table. (dofloat): Use it. (OP_E): Correct intel mode PTR output. (ptr_reg): Use open_char and close_char. (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for operands. Set two_source_ops. gas/testsuite/ * gas/i386/prescott.s: Remove fisttpd and fisttpq. * gas/i386/prescott.d: Update.
2004-03-122004-03-12 Michal Ludvig <mludvig@suse.cz>Michal Ludvig1-13/+1
* i386-dis.c (GRPPLOCK): Delete. (grps): Detele GRPPLOCK entry.
2004-03-12 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.Alan Modra1-43/+73
(M, Mp): Use OP_M. (None, PADLOCK_SPECIAL, PADLOCK_0): Delete. (GRPPADLCK): Define. (dis386): Use NOP_Fixup on "nop". (dis386_twobyte): Use GRPPADLCK on opcode 0xa7. (twobyte_has_modrm): Set for 0xa7. (padlock_table): Delete. Move to.. (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence and clflush. (print_insn): Revert PADLOCK_SPECIAL code. (OP_E): Delete sfence, lfence, mfence checks. * gas/i386/katmai.d: Revert last change.
2004-03-12 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.Jakub Jelinek1-2/+18
(INVLPG_Fixup): New function. (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag. * opcode/i386.h (i386_optab): Remove CpuNo64 from sysenter and sysexit.
2004-03-122004-03-12 Michal Ludvig <mludvig@suse.cz>Michal Ludvig1-2/+37
* gas/config/tc-i386.c (output_insn): Handle PadLock instructions. * gas/config/tc-i386.h (CpuPadLock): New define. (CpuUnknownFlags): Added CpuPadLock. * include/opcode/i386.h (i386_optab): Added xstore/xcrypt insns. * opcodes/i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines. (dis386_twobyte): Opcode 0xa7 is PADLOCK_0. (padlock_table): New struct with PadLock instructions. (print_insn): Handle PADLOCK_SPECIAL.
2004-03-12opcodes/Alan Modra1-5/+11
* i386-dis.c (grps): Use clflush by default for 0x0fae/7. (OP_E): Twiddle clflush to sfence here. gas/testsuite/ * gas/i386/katmai.d: Adjust for clflush change.
2004-01-18 * i386-dis.c (OP_E): Print scale factor on intel mode sib when notAlan Modra1-5/+1
1. Don't print scale factor on AT&T mode when index missing.
2003-09-14 * i386-dis.c: Convert to ISO C90 prototypes.Andreas Jaeger1-183/+98
* i370-dis.c: Likewise. * i370-opc.c: Likewiwse. * i960-dis.c: Likewise. * ia64-opc.c: Likewise.
2003-06-23gas/H.J. Lu1-17/+93
2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (md_assemble): Support Intel Precott New Instructions. * gas/config/tc-i386.h (CpuPNI): New. (CpuUnknownFlags): Add CpuPNI. gas/testsuite/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add prescott. * gas/i386/prescott.d: New file. * gas/i386/prescott.s: Likewise. include/opcode/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel Precott New Instructions. opcodes/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in Intel Precott New Instructions. (PREGRP27): New. Added for "addsubpd" and "addsubps". (PREGRP28): New. Added for "haddpd" and "haddps". (PREGRP29): New. Added for "hsubpd" and "hsubps". (PREGRP30): New. Added for "movsldup" and "movddup". (PREGRP31): New. Added for "movshdup" and "movhpd". (PREGRP32): New. Added for "lddqu". (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry. Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for entry 0xd0. Use PREGRP32 for entry 0xf0. (twobyte_has_modrm): Updated. (twobyte_uses_SSE_prefix): Likewise. (grps): Use PNI_Fixup in the "sidtQ" entry. (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30, PREGRP31 and PREGRP32. (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb. Use "fisttpll" in entry 1 in opcode 0xdd. Use "fisttp" in entry 1 in opcode 0xdf.
2003-05-09 * i386-dis.c (print_insn): Test intel_syntax against (char) -1 inAlan Modra1-1/+1
case char is unsigned.
2003-03-22 * i386-dis.c (dis386): Recognize icebp (0xf1).Doug Evans1-1/+1
2003-02-06 * i386-dis.c (dq_mode, Edq): Define.Alan Modra1-121/+123
(dis386_twobyte): Correct movd operands. (OP_E): Handle dq_mode case.
2002-11-182002-11-18 Klee Dienes <kdienes@apple.com>Klee Dienes1-1/+1
* arc.h (arc_ext_opcodes): Declare as extern. (arc_ext_operands): Declare as extern. * i860.h (i860_opcodes): Declare as const. 2002-11-18 Klee Dienes <kdienes@apple.com> * arc-opc.c (arc_ext_opcodes): Define. (arc_ext_operands): Define. * i386-dis.c (Suffix3DNow): Declare as const. * arm-opc.h (arm_opcodes): Declare as const. (thumb_opcodes): Declare as const. * h8500-opc.h (h8500_table): Declare as const. (h8500_table): Use a NULL for the opcode in the terminator, so that code testing (opcode->name) behaves correctly. * mcore-opc.h (mcore_table): Declare as const. * sh-opc.h (sh_table): Declare as const. * w65-opc.h (optable): Declare as const. * z8k-opc.h (z8k_table): Declare as const.
2002-03-18 * i386-dis.c (prefix_name): Fix handling of 32bit address prefixJan Hubicka1-13/+32
in 64bit mode. (print_insn) Likewise. (putop): Fix handling of 'E' (OP_E, OP_OFF): handle 32bit addressing mode in 64bit. (ptr_reg): Likewise.
2001-11-14 * i386-dis.c (print_insn): Use x86-64 as option.Andreas Jaeger1-1/+1
2001-11-14binutils/ChangeLogAlan Modra1-76/+123
* doc/binutils.texi (objdump): Document x86 -M options. include/ChangeLog * dis-asm.h (print_insn_i386): Declare. opcodes/ChangeLog * disassemble.c (disassembler): Call print_insn_i386. * i386-dis.c (SUFFIX_ALWAYS): Define. (struct dis_private): Add orig_sizeflag. (print_insn_i386): Make it a wrapper, calling.. (print_insn): ..The old body of print_insn_i386. Avoid longjmp warning without using volatile by moving orig_sizeflag to priv, and removing inbuf. Parse disassembler_options. (print_insn_i386_att, print_insn_i386_intel): Move initialisation code to print_insn. (putop): Remove #ifdef SUFFIX_ALWAYS.
2001-11-13 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" toAlan Modra1-3/+3
accept WordReg. * i386-dis.c (grps): Change "sldt", "str", and "smsw" entries to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand category instead of Ew.
2001-09-04 * i386-dis.c (grps): Don't print the implicit al/ax/eax registerAlan Modra1-8/+8
for opcode 0xf6 or 0xf7 forms of mul, imul, div, idiv insns.
2001-07-29 * i386-dis.c: Fix formatting.Kazu Hirata1-60/+57
2001-07-28 * i386-dis.c: Change formatting conventions for architectureAlan Modra1-50/+121
i386:intel to better match the format of various intel i386 assemblers, like nasm, tasm or masm.
2001-07-18 * i386-dis.c (grps): Print l or w suffix, and require mem modrmAlan Modra1-9/+9
for lgdt, lidt, sgdt, sidt.
2001-07-092001-07-09 Andreas Jaeger <aj@suse.de>, Karsten Keil <kkeil@suse.de>Andreas Jaeger1-7/+16
* i386-dis.c (set_op): Handle 64 bit and 32 bit mode. (OP_J): Use bfd_vma for mask to work properly with 64 bits. (op_address,op_riprel): Use bfd_vma to handle 64 bits.
2001-06-11Merge insn decode tables, and generally tidy.Alan Modra1-1989/+773
2001-06-10Branch hints for Pentium4 as insn modifiers, and some minor tweaksAlan Modra1-75/+76
to formatting.
2001-06-06 * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define.Alan Modra1-65/+112
(cond_jump_mode, loop_jcxz_mode): Define. (dis386_att): Add cond_jump_flag and loop_jcxz_flag as appropriate, and 'F' suffix to loop insns. (disx86_64_att): Likewise. (dis386_twobyte_att): Likewise. (print_insn_i386): Don't output addr prefix for loop, jcxz insns. Output data size prefix for long conditional jumps. Output cs and ds branch hints. (putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'. (OP_J): Don't make PREFIX_DATA used.
2001-05-122001-05-12 H.J. Lu <hjl@gnu.org>H.J. Lu1-0/+6
* i386-dis.c (print_insn_i386): Always set `mod', `reg' and `rm'.
2001-05-12 * i386-dis.c (twobyte_has_modrm): Update table.Alan Modra1-8/+20
(need_modrm): Give it file scope. (MODRM_CHECK): Define. (dofloat): Use MODRM_CHECK. (OP_E): Likewise. (OP_EM): Likewise. (OP_EX): Likewise. and fix testsuite yet again now that we are getting correct disassembly.
2001-05-12Correct cvtps2dq, movdq2q, movq2dq, and movq problems.Alan Modra1-3/+3
2001-05-04Assorted fixes to pinsrw, pextrw, pmovmskb, movmskp, maskmovq.Alan Modra1-13/+24
2001-04-06 * i386-dis.c: Add ffreep instruction.Andreas Jaeger1-6/+6
2001-03-24Small tweaks to sse2 instructions.Alan Modra1-9/+25
2001-03-22paddq and psubq support.Alan Modra1-6/+6
2001-03-13Fix typos in ChangeLogs; fix dates in copyright noticesNick Clifton1-1/+2
2001-02-12 * i386.h (i386_optab): SSE integer converison instructions haveJan Hubicka1-6/+16
64bit versions on x86-64. * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison instructions. (putop): Handle 'Y'
2001-02-01 * (dis386_att, grps): Use 'T' for push/popJan Hubicka1-22/+43
(putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax
2001-01-13 * i386.c (md_assemble): Check cpu_flags even for nullary instructions.Jan Hubicka1-8/+8
* i386.h (i386_optab): Fix pusha and ret templates. * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret templates.
2001-01-10 * i386-dis.c (PREGRP15 - PREGRP24): New.Jan Hubicka1-90/+271
(dis386_twobyt): Add SSE2 instructions. (twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions. (twobyte_uses_f3_prefix): ... this one. (grps): Add SSE instructions. (prefix_user_table): Add two new slots; add SSE2 instructions. (print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix; Handle the REPNZ and Data16 prefixes as well; do proper lookup to prefix_user_table. (OP_E): Accept mfence and lfence as well. (OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions. (OP_XMM): Support REX extensions. (OP_EM): Likewise. (OP_EX): Likewise.
2001-01-05 * i386-dis.c: Add x86_64 support.Jan Hubicka1-304/+1456
(rex): New static variable. (REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants. (USED_REX): New macro. (Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros. (OP_I64, OP_OFF64, OP_IMREG): New functions. (OP_REG, OP_OFF): Declare. (get64, get32, get32s): New functions. (r??_reg): New constants. (dis386_att): Change templates of instruction implicitly promoted to 64bit; change e?? to RMe?? for unwind RM byte instructions. (grps): Likewise. (dis386_intel): Likewise. (dixx86_64_att): New table based on dis386_att. (dixx86_64_intel): New table based on dis386_intel. (names64, names8rex): New global variable. (names32, names16): Add extended registers. (prefix_user_t): Recognize rex prefixes. (prefix_name): Print REX prefixes nicely. (op_riprel): New global variable. (start_pc): Set type to bfd_vma. (print_insn_i386): Detect the 64bit mode and use proper table; move ckprefix after initializing the buffer; output unused rex prefixes; output information about target of RIP relative addresses. (putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S'; (print_operand_value): New function. (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for REX prefix and new modes. (get64, get32s): New. (get32): Return bfd_signed_vma type. (set_op): Initialize the op_riprel. * disassemble.c (disassembler): Recognize the x86-64 disassembly.
1999-12-27x86 indirect jump/call syntax fixes. Disassembly fix for lcall.Alan Modra1-1/+1
1999-09-041999-09-04 H.J. Lu <hjl@gnu.org>Ian Lance Taylor1-2/+2
* i386-dis.c (print_insn_i386): Set bytes_per_line to 7.
1999-08-21Add AMD athlon support to x86 assembler and disassembler.Alan Modra1-5/+5
1999-07-11 * dis-buf.c: Add ATTRIBUTE_UNUSED as appropriate.Ian Lance Taylor1-1182/+1253
(generic_strcat_address): Add cast to avoid warning. * i386-dis.c: Initialize all structure fields to avoid warnings. Add ATTRIBUTE_UNUSED as appropriate.
1999-06-23PAlan Modra1-2/+2
include/opcode/i386.h: Allow bswapl, arplw, and other dodgy insns. opcodes/i386-dis.c: Fix a comment
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