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2022-02-04ld: Remove emultempl/armcoff.emH.J. Lu1-293/+0
Remove emultempl/armcoff.em which has been unused after commit 2ac93be706418f3b2aebeb22159a328023faed52 Author: Alan Modra <amodra@gmail.com> Date: Mon Apr 16 20:33:36 2018 +0930 Remove arm-aout and arm-coff support This also removes arm-netbsd (not arm-netbsdelf!), arm-openbsd, and arm-riscix. Those targets weren't on the obsolete list but they are all aout, and it doesn't make all that much sense to remove arm-aout without removing them too. * emultempl/armcoff.em: Removed.
2022-02-03PowerPC64 treatment of absolute symbolsAlan Modra12-0/+290
Supporting -static-pie on PowerPC64 requires the linker to properly treat SHN_ABS symbols for cases like glibc's _nl_current_LC_CTYPE_used absolute symbol. I've been slow to fix the linker on powerpc because there is some chance that this will break some shared libraries or PIEs. bfd/ * elf64-ppc.c (ppc64_elf_check_relocs): Consolidate local sym handling code. Don't count dyn relocs against non-dynamic absolute symbols. (dec_dynrel_count): Adjust to suit. (ppc64_elf_edit_toc): Don't remove entries for absolute symbols when pic. (allocate_got): Don't allocate space for got relocs against non-dynamic absolute syms. (ppc64_elf_layout_multitoc): Likewise. (got_and_plt_relr): Likewise. (ppc64_elf_size_dynamic_sections): Likewise for local got. (got_and_plt_relr_for_local_syms): Likewise. (ppc64_elf_size_stubs): Don't allocate space for relr either. (ppc64_elf_relocate_section): Don't write relocs against non-dynamic absolute symbols. Don't optimise got and toc code sequences loading absolute symbol entries. ld/ * testsuite/ld-powerpc/abs-reloc.s, * testsuite/ld-powerpc/abs-static.d, * testsuite/ld-powerpc/abs-static.r, * testsuite/ld-powerpc/abs-pie.d, * testsuite/ld-powerpc/abs-pie.r, * testsuite/ld-powerpc/abs-shared.d, * testsuite/ld-powerpc/abs-shared.r, * testsuite/ld-powerpc/abs-pie-relr.d, * testsuite/ld-powerpc/abs-pie-relr.r, * testsuite/ld-powerpc/abs-shared-relr.d, * testsuite/ld-powerpc/abs-shared-relr.r: New tests. * testsuite/ld-powerpc/powerpc.exp: Run them.
2022-02-02Updated French translation for the ld/ and gold/ sub-directoriesNick Clifton2-1651/+1683
2022-01-31elf: Check symbol version without any symbolsH.J. Lu3-0/+24
VER_FLG_WEAK doesn't indicate that all symbol references of the symbol version have STB_WEAK. VER_FLG_WEAK indicates a weak symbol version definition with no symbols associated with it. It is used to verify the existence of a particular implementation without any symbol references to the weak symbol version. PR ld/24718 * testsuite/ld-elf/pr24718-1.d: New file. * testsuite/ld-elf/pr24718-1.s: Likewise. * testsuite/ld-elf/pr24718-1.t: Likewise.
2022-01-31Re: PR28827, assertion building LLVM 9 on powerpc64le-linux-gnuAlan Modra4-0/+73
In trying to find a testcase for PR28827, I managed to hit a linker error in bfd_set_section_contents with a .branch_lt input section being too large for the output .branch_lt. bfd/ PR 28827 * elf64-ppc.c (ppc64_elf_size_stubs): Set section size to maxsize past STUB_SHRINK_ITER before laying out. Remove now unnecessary conditional setting of maxsize at start of loop. ld/ * testsuite/ld-powerpc/pr28827-2.d, * testsuite/ld-powerpc/pr28827-2.lnk, * testsuite/ld-powerpc/pr28827-2.s: New test. * testsuite/ld-powerpc/powerpc.exp: Run it.
2022-01-28Set __ehdr_start rel_from_abs earlierAlan Modra2-1/+1
This is just a tidy, making the __ehdr_start symbol flag tweaks all in one place. * ldelf.c (ldelf_before_allocation): Don't set rel_from_abs for __ehdr_start. * ldlang.c (lang_symbol_tweaks): Set it here instead.
2022-01-28Update PowerPC64 symtocbase testAlan Modra3-7/+15
Using a symbol other than .TOC. with @tocbase is an extension to the ABI. It is never valid to use a symbol without a definition in the binary, and symbols on these expressions cannot be overridden. Make this explicit by using ".hidden" in the testcase. * testsuite/ld-powerpc/symtocbase-1.s: Align data. Make function entry symbol hidden. * testsuite/ld-powerpc/symtocbase-2.s: Likewise. * testsuite/ld-powerpc/symtocbase.d: Adjust expected output.
2022-01-26ld: Rewrite lang_size_relro_segment_1H.J. Lu4-44/+118
1. Compute the desired PT_GNU_RELRO segment base and find the maximum section alignment of sections starting from the PT_GNU_RELRO segment. 2. Find the first preceding load section. 3. Don't add the 1-page gap between the first preceding load section and the relro segment if the maximum page size >= the maximum section alignment. Align the PT_GNU_RELRO segment first. Subtract the maximum page size if therer is still a 1-page gap. PR ld/28743 PR ld/28819 * ldlang.c (lang_size_relro_segment_1): Rewrite. * testsuite/ld-x86-64/pr28743-1.d: New file. * testsuite/ld-x86-64/pr28743-1.s: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run pr28743-1.
2022-01-24Update Bulgarian, French, Romaniam and Ukranian translation for some of the ↵Nick Clifton3-3587/+4055
sub-directories
2022-01-23Regenerate Makefile.in files with automake 1.15.1H.J. Lu1-1/+0
Regenerate Makefile.in files with the unmodified automake 1.15.1 to remove runstatedir = @runstatedir@ bfd/ * Makefile.in: Regenerate. binutils/ * Makefile.in: Regenerate. gas/ * Makefile.in: Regenerate. gold/ * Makefile.in: Regenerate. * testsuite/Makefile.in: Likewise. gprof/ * Makefile.in: Regenerate. ld/ * Makefile.in: Regenerate. opcodes/ * Makefile.in: Regenerate.
2022-01-23Regenerate configure files with autoconf 2.69H.J. Lu1-15/+3
Regenerate configure files with the unmodified autoconf 2.69 to remove --runstatedir=DIR modifiable per-process data [LOCALSTATEDIR/run] bfd/ * configure: Regenerate. binutils/ * configure: Regenerate. gas/ * configure: Regenerate. gold/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * configure: Regenerate. opcodes/ * configure: Regenerate.
2022-01-22Adjust default page sizes for haiku arm.Alexander von Gluck IV3-3/+9
* configure.tgt (arm-haiku): Fix typo. * emulparams/armelf_haiku.su (MAXPAGESIZE): Use the default value. (COMMONPAGESIZE): Likewise.
2022-01-22Change version number to 2.38.50 and regenerate filesNick Clifton3-121/+140
2022-01-22Add markers for 2.38 branchNick Clifton2-0/+6
2022-01-21Updated Serbian translation for the ld sub-directoryNick Clifton2-1989/+2270
2022-01-21drop old unused stamp-h.in fileMike Frysinger1-1/+0
This was needed by ancient versions of automake, but that hasn't been the case since at least automake-1.5, so punt this from the tree.
2022-01-18lang_size_relro_segment tidyAlan Modra1-16/+4
This function has seen too many minimal change style edits. No functional changes in this patch. * ldlang.c (lang_size_relro_segment): Tidy.
2022-01-18PowerPC64 DT_RELRAlan Modra5-4/+5
PowerPC64 takes a more traditional approach to DT_RELR than x86. Count relative relocs in check_relocs, allocate space for them and output in the usual places but not doing so when enable_dt_relr. DT_RELR is sized in the existing ppc stub relaxation machinery, run via the linker's ldemul_after_allocation hook. DT_RELR is output in the same function that writes ppc stubs, run via ldemul_finish. This support should be considered experimental. bfd/ * elf64-ppc.c (struct ppc_local_dyn_relocs): Renamed from ppc_dyn_relocs. Add rel_count field. Update uses. (struct ppc_dyn_relocs): New. Replace all uses of elf_dyn_relocs. (struct ppc_link_hash_table): Add relr_alloc, relr_count and relr_addr. (ppc64_elf_copy_indirect_symbol): Merge rel_count. (ppc64_elf_check_relocs): Init rel_count for global and local syms. (dec_dynrel_count): Change r_info param to reloc pointer. Update all callers. Handle decrementing rel_count. (allocate_got): Don't allocate space for relative relocs when enable_dt_relr. (allocate_dynrelocs): Likewise. (ppc64_elf_size_dynamic_sections): Likewise. Handle srelrdyn. (ppc_build_one_stub): Don't emit relative relocs on .branch_lt. (compare_relr_address, append_relr_off): New functions. (got_and_plt_relr_for_local_syms, got_and_plt_relr): Likewise. (ppc64_elf_size_stubs): Size .relr.syn. (ppc64_elf_build_stubs): Emit .relr.dyn. (build_global_entry_stubs_and_plt): Don't output relative relocs when enable_dt_relr. (write_plt_relocs_for_local_syms): Likewise. (ppc64_elf_relocate_section): Likewise. binutils/ * testsuite/lib/binutils-common.exp (supports_dt_relr): Add powerpc64. ld/ * emulparams/elf64ppc.sh: Source dt-relr.sh. * testsuite/ld-elf/dt-relr-2b.d: Adjust for powerpc. * testsuite/ld-elf/dt-relr-2c.d: Likewise. * testsuite/ld-elf/dt-relr-2d.d: Likewise. * testsuite/ld-elf/dt-relr-2e.d: Likewise.
2022-01-18tweak __ehdr_start visibility and flags for check_relocsAlan Modra2-10/+38
bfd/ * elf-bfd.h (UNDEFWEAK_NO_DYNAMIC_RELOC): Test linker_def. ld/ * ldelf.c (ldelf_before_allocation): Don't force __ehdr_start local and hidden here.. * ldlang.c (lang_symbol_tweaks): ..do so here instead and set def_regular and linker_def for check_relocs. New function extracted from lang_process.
2022-01-17Update the config.guess and config.sub files from the master repository and ↵Nick Clifton3-1510/+1576
regenerate files.
2022-01-14PR28751 mbind2a / mbind2b regressions on powerpc*-linuxAlan Modra3-4/+12
include/ * bfdlink.h (struct bfd_link_info): Add commonpagesize_is_set. ld/ PR 28751 * emultempl/elf.em (handle_option): Set commonpagesize_is_set. * ldelf.c (ldelf_after_parse): Don't error when only one of -z max-page-size or -z common-page-size is given, correct the other value to make it sane. * testsuite/ld-elf/elf.exp (mbind2a, mbind2b): Do not pass -z max-page-size.
2022-01-13ld: Disable DT_RELR in some -z relro testsH.J. Lu10-10/+10
Disable DT_RELR in the following -z relro tests which don't expect DT_RELR in linker outputs. * testsuite/ld-i386/pr20830.d: Pass $NO_DT_RELR_LDFLAGS to ld. * testsuite/ld-x86-64/pr20830a-now.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Likewise. * testsuite/ld-x86-64/pr20830b-now.d: Likewise. * testsuite/ld-x86-64/pr20830b.d: Likewise. * testsuite/ld-x86-64/pr21038a-now.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2022-01-13elf: Remove the 1-page gap before the RELRO segmentH.J. Lu14-57/+110
The existing RELRO scheme may leave a 1-page gap before the RELRO segment and align the end of the RELRO segment to the page size: [18] .eh_frame PROGBITS 408fa0 008fa0 005e80 00 A 0 0 8 [19] .init_array INIT_ARRAY 410de0 00fde0 000008 08 WA 0 0 8 [20] .fini_array FINI_ARRAY 410de8 00fde8 000008 08 WA 0 0 8 [21] .dynamic DYNAMIC 410df0 00fdf0 000200 10 WA 7 0 8 [22] .got PROGBITS 410ff0 00fff0 000010 08 WA 0 0 8 [23] .got.plt PROGBITS 411000 010000 000048 08 WA 0 0 8 Instead, we can remove the 1-page gap if the maximum page size >= the maximum section alignment: [18] .eh_frame PROGBITS 408fa0 008fa0 005e80 00 A 0 0 8 [19] .init_array INIT_ARRAY 40fde0 00fde0 000008 08 WA 0 0 8 [20] .fini_array FINI_ARRAY 40fde8 00fde8 000008 08 WA 0 0 8 [21] .dynamic DYNAMIC 40fdf0 00fdf0 000200 10 WA 7 0 8 [22] .got PROGBITS 40fff0 00fff0 000010 08 WA 0 0 8 [23] .got.plt PROGBITS 410000 010000 000048 08 WA 0 0 8 Because the end of the RELRO segment is always aligned to the page size and may not be moved, the RELRO segment size may be increased: [ 3] .dynstr STRTAB 000148 000148 000001 00 A 0 0 1 [ 4] .eh_frame PROGBITS 000150 000150 000000 00 A 0 0 8 [ 5] .init_array INIT_ARRAY 200150 000150 000010 08 WA 0 0 1 [ 6] .fini_array FINI_ARRAY 200160 000160 000010 08 WA 0 0 1 [ 7] .jcr PROGBITS 200170 000170 000008 00 WA 0 0 1 [ 8] .data.rel.ro PROGBITS 200180 000180 000020 00 WA 0 0 16 [ 9] .dynamic DYNAMIC 2001a0 0001a0 0001c0 10 WA 3 0 8 [10] .got PROGBITS 200360 000360 0002a8 00 WA 0 0 8 [11] .bss NOBITS 201000 000608 000840 00 WA 0 0 1 vs the old section layout: [ 3] .dynstr STRTAB 000148 000148 000001 00 A 0 0 1 [ 4] .eh_frame PROGBITS 000150 000150 000000 00 A 0 0 8 [ 5] .init_array INIT_ARRAY 200b48 000b48 000010 08 WA 0 0 1 [ 6] .fini_array FINI_ARRAY 200b58 000b58 000010 08 WA 0 0 1 [ 7] .jcr PROGBITS 200b68 000b68 000008 00 WA 0 0 1 [ 8] .data.rel.ro PROGBITS 200b70 000b70 000020 00 WA 0 0 16 [ 9] .dynamic DYNAMIC 200b90 000b90 0001c0 10 WA 3 0 8 [10] .got PROGBITS 200d50 000d50 0002a8 00 WA 0 0 8 [11] .bss NOBITS 201000 000ff8 000840 00 WA 0 0 1 But there is no 1-page gap. PR ld/28743 * ldlang.c (lang_size_relro_segment_1): Remove the 1-page gap before the RELRO segment if the maximum page size >= the maximum section alignment. * testsuite/ld-i386/pr20830.d: Adjusted. * testsuite/ld-s390/gotreloc_64-relro-1.dd: Likewise. * testsuite/ld-x86-64/pr14207.d: Likewise. * testsuite/ld-x86-64/pr18176.d: Likewise. * testsuite/ld-x86-64/pr20830a-now.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Likewise. * testsuite/ld-x86-64/pr20830b-now.d: Likewise. * testsuite/ld-x86-64/pr20830b.d: Likewise. * testsuite/ld-x86-64/pr21038a-now.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2022-01-13dt-relr.exp --no-as-neededAlan Modra1-2/+2
Otherwise the very simple test may not be linked with libc.so at all, and thus correctly have no version reference added. Causing failure of the dt-relr-glibc-1b.so test. * testsuite/ld-elf/dt-relr.exp: Link with --no-as-needed.
2022-01-13Correct .relr.dyn nocombreloc scriptAlan Modra1-1/+1
* scripttempl/elf.sc (.relr.dyn): Don't depend on $COMBRELOC.
2022-01-13testsuite supports_dt_relrAlan Modra15-27/+18
Tidy, and fix "FAIL: Build dt-relr-glibc-1b.so" on all non-x86 linux targets. binutils/ * binutils-common.exp (supports_dt_relr): New proc. ld/ * testsuite/config/default.exp (DT_RELR_LDFLAGS, NO_DT_RELR_LDFLAGS), (DT_RELR_CC_LDFLAGS, NO_DT_RELR_CC_LDFLAGS): Use supports_dt_relr. * testsuite/ld-elf/dt-relr.exp: Don't run unless supports_dt_relr. * testsuite/ld-elf/dt-relr-1a.d: Likewise. * testsuite/ld-elf/dt-relr-1b.d: Likewise. * testsuite/ld-elf/dt-relr-1c.d: Likewise. * testsuite/ld-elf/dt-relr-2a.d: Likewise. * testsuite/ld-elf/dt-relr-2b.d: Likewise. * testsuite/ld-elf/dt-relr-2c.d: Likewise. * testsuite/ld-elf/dt-relr-2d.d: Likewise. * testsuite/ld-elf/dt-relr-2e.d: Likewise. * testsuite/ld-elf/dt-relr-2f.d: Likewise. * testsuite/ld-elf/dt-relr-2g.d: Likewise. * testsuite/ld-elf/dt-relr-2h.d: Likewise. * testsuite/ld-elf/dt-relr-3a.d: Likewise. * testsuite/ld-elf/dt-relr-3b.d: Likewise.
2022-01-13Don't use C++ comments in assemblyAlan Modra3-3/+3
It might seem to work, but only if '/' is a start of comment char. * testsuite/ld-elf/dt-relr-1.s: Use # for comment. * testsuite/ld-elf/dt-relr-2.s: Likewise. * testsuite/ld-elf/dt-relr-3.s: Likewise.
2022-01-12ld: Add glibc dependency for DT_RELRH.J. Lu5-1/+69
When DT_RELR is enabled, to avoid random run-time crash with older glibc binaries without DT_RELR support, add a GLIBC_ABI_DT_RELR symbol version, which is provided by glibc with DT_RELR support, dependency on the shared C library if it provides a GLIBC_2.XX symbol version. bfd/ * elflink.c (elf_link_add_dt_relr_dependency): New function. (bfd_elf_size_dynamic_sections): Call elf_link_add_dt_relr_dependency if DT_RELR is enabled. ld/ * ld.texi: Mention GLIBC_ABI_DT_RELR in -z pack-relative-relocs entry. * testsuite/ld-elf/dt-relr-glibc-1.c: New file. * testsuite/ld-elf/dt-relr-glibc-1a.rd: Likewise. * testsuite/ld-elf/dt-relr-glibc-1b.rd: Likewise. * testsuite/ld-elf/dt-relr.exp: Likewise.
2022-01-12ld: Add simple DT_RELR testsH.J. Lu26-0/+400
* testsuite/ld-elf/dt-relr-1.s: New file. * testsuite/ld-elf/dt-relr-1a.d: Likewise. * testsuite/ld-elf/dt-relr-1b.d: Likewise. * testsuite/ld-elf/dt-relr-1c.d: Likewise. * testsuite/ld-elf/dt-relr-2.s: Likewise. * testsuite/ld-elf/dt-relr-2a.d: Likewise. * testsuite/ld-elf/dt-relr-2b.d: Likewise. * testsuite/ld-elf/dt-relr-2c.d: Likewise. * testsuite/ld-elf/dt-relr-2d.d: Likewise. * testsuite/ld-elf/dt-relr-2e.d: Likewise. * testsuite/ld-elf/dt-relr-2f.d: Likewise. * testsuite/ld-elf/dt-relr-2g.d: Likewise. * testsuite/ld-elf/dt-relr-2h.d: Likewise. * testsuite/ld-elf/dt-relr-3.s: Likewise. * testsuite/ld-elf/dt-relr-3a.d: Likewise. * testsuite/ld-elf/dt-relr-3b.d: Likewise. * testsuite/ld-i386/dt-relr-1.s: Likewise. * testsuite/ld-i386/dt-relr-1a.d: Likewise. * testsuite/ld-i386/dt-relr-1b.d: Likewise. * testsuite/ld-x86-64/dt-relr-1a-x32.d: Likewise. * testsuite/ld-x86-64/dt-relr-1a.d: Likewise. * testsuite/ld-x86-64/dt-relr-1b-x32.d: Likewise. * testsuite/ld-x86-64/dt-relr-1b.d: Likewise. * testsuite/ld-x86-64/dt-relr-1.s: Likewise. * testsuite/ld-i386/i386.exp: Run dt-relr-1a and dt-relr-1b. * testsuite/ld-x86-64/x86-64.exp: Run dt-relr-1a, dt-relr-1a-x32 dt-relr-1b and dt-relr-1b-x32.
2022-01-12elf: Support DT_RELR in linker testsH.J. Lu42-67/+138
Allow eabling and disabling DT_RELR in linker tests. Disable DT_RELR in linker tests which don't expect DT_RELR in linker outputs. binutils/ * testsuite/lib/binutils-common.exp (run_dump_test): Make DT_RELR_LDFLAGS and NO_DT_RELR_LDFLAGS global. ld/ * testsuite/config/default.exp (DT_RELR_LDFLAGS): New. (DT_RELR_CC_LDFLAGS): Likewise. (NO_DT_RELR_LDFLAGS): Likewise. (NO_DT_RELR_CC_LDFLAGS): Likewise. * testsuite/ld-elf/shared.exp: Pass $NO_DT_RELR_LDFLAGS to linker for some tests. * testsuite/ld-i386/export-class.exp: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-i386/ibt-plt-2a.d: Pass $NO_DT_RELR_LDFLAGS to linker. * testsuite/ld-i386/ibt-plt-3a.d: Likewise. * testsuite/ld-i386/ibt-plt-3c.d: Likewise. * testsuite/ld-i386/pr26869.d: Likewise. * testsuite/ld-i386/report-reloc-1.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a.d: Likewise. * testsuite/ld-x86-64/ilp32-4.d: Likewise. * testsuite/ld-x86-64/load1c.d: Likewise. * testsuite/ld-x86-64/load1d.d: Likewise. * testsuite/ld-x86-64/pr13082-2b.d: Likewise. * testsuite/ld-x86-64/pr14207.d: Likewise. * testsuite/ld-x86-64/pr18176.d: Likewise. * testsuite/ld-x86-64/pr19162.d: Likewise. * testsuite/ld-x86-64/pr19636-2d.d: Likewise. * testsuite/ld-x86-64/pr19636-2l.d: Likewise. * testsuite/ld-x86-64/pr20253-1d.d: Likewise. * testsuite/ld-x86-64/pr20253-1f.d: Likewise. * testsuite/ld-x86-64/pr20253-1j.d: Likewise. * testsuite/ld-x86-64/pr20253-1l.d: Likewise. * testsuite/ld-x86-64/report-reloc-1-x32.d: Likewise. * testsuite/ld-x86-64/report-reloc-1.d: Likewise. * testsuite/ld-x86-64/export-class.exp (x86_64_export_class_test): Pass $NO_DT_RELR_LDFLAGS to linker. * testsuite/ld-x86-64/x86-64.exp: Pass $NO_DT_RELR_LDFLAGS to linker for some tests.
2022-01-12ld: Initial DT_RELR supportH.J. Lu9-1/+48
Add a -z pack-relative-relocs option to enable DT_RELR and create a relr.dyn section for DT_RELR. DT_RELR is implemented with the linker relaxation infrastructure, but it doesn't require the --relax option enabled. -z pack-relative-relocs implies -z combreloc. -z nocombreloc implies -z nopack-relative-relocs. -z pack-relative-relocs is chosen over the similar option in lld, --pack-dyn-relocs=relr, to implement a glibc binary lockout mechanism with a special glibc version symbol, to avoid random crashes of DT_RELR binaries with the existing glibc binaries. bfd/ * elf-bfd.h (elf_link_hash_table): Add srelrdyn. * elflink.c (_bfd_elf_link_create_dynamic_sections): Create a .relr.dyn section for DT_RELR. include/ * bfdlink.h (bfd_link_info): Add enable_dt_relr. ld/ * News: Mention -z pack-relative-relocs and -z nopack-relative-relocs. * ld.texi: Document -z pack-relative-relocs and -z nopack-relative-relocs. * ldelf.c (ldelf_after_parse): Disable DT_RELR if not building PIE nor shared library. Add 3 spare dynamic tags for DT_RELR, DT_RELRSZ and DT_RELRENT. * ldlang.c (lang_relax_sections): Also enable relaxation if DT_RELR is enabled. * emulparams/elf32_x86_64.sh: Source dt-relr.sh. * emulparams/elf_i386.sh: Likewise. * emulparams/elf_x86_64.sh: Likewise. * emulparams/dt-relr.sh: New file. * scripttempl/elf.sc: Support .relr.dyn.
2022-01-12elf: Pass need_layout to _bfd_elf_map_sections_to_segmentsH.J. Lu1-1/+2
On some targets, the DT_RELR section size can be computed only after all symbols addresses can be determined. Update ldelf_map_segments to pass need_layout to _bfd_elf_map_sections_to_segments which will size DT_RELR section and set need_layout to true if the DT_RELR section size is changed. bfd/ * elf-bfd.h (_bfd_elf_map_sections_to_segments): Add a bool pointer argument. * elf.c (_bfd_elf_map_sections_to_segments): Add a bool pointer argument to indicate if section layout needs update. (assign_file_positions_for_load_sections): Pass NULL to _bfd_elf_map_sections_to_segments. * elflink.c (_bfd_elf_strip_zero_sized_dynamic_sections): Pass NULL to _bfd_elf_map_sections_to_segments. ld/ * ldelfgen.c (ldelf_map_segments): Pass &need_layout to _bfd_elf_map_sections_to_segments.
2022-01-12ld: add hidden and internal visibility support for XCOFFClément Chigot9-28/+206
This patch adds a primary support for hidden and internal visibility in GNU linker for XCOFF format. The protected visibility isn't yet supported. PR 22085 bfd/ChangeLog: * xcofflink.c (xcoff_dynamic_definition_p): Add hidden and internal visibility support. (xcoff_link_add_symbols): Likewise. (xcoff_auto_export_p): Likewise. (bfd_xcoff_export_symbol): Likewise. (xcoff_link_input_bfd): Likewise. ld/ChangeLog: * testsuite/ld-vsb/main.c: Adapt for XCOFF. * testsuite/ld-vsb/sh1.c: Likewse. * testsuite/ld-vsb/vsb.exp: Likewise. * testsuite/ld-vsb/visibility-1-xcoff-32.d: New test. * testsuite/ld-vsb/visibility-1-xcoff-64.d: New test. * testsuite/ld-vsb/visibility-2-xcoff-32.d: New test. * testsuite/ld-vsb/visibility-2-xcoff-64.d: New test. * testsuite/ld-vsb/xcoffvsb.dat: New test.
2022-01-12ld/testsuite: prepare ld-elfvsb to support XCOFFClément Chigot20-1/+1
A following patch will add visibility support in ld for XCOFF. Thus, ld-elfvsb is renamed ld-vsb and a suffix is added to files targeting only ELF format. ld/ChangeLog: * testsuite/ld-elfvsb: rename as ld-vsb. * testsuite/ld-elfvsb/hidden0.d: move to ld-vsb and rename with suffix -elf.d. * testsuite/ld-elfvsb/hidden1.d: Likewise. * testsuite/ld-elfvsb/hidden2.d: Likewise. * testsuite/ld-elfvsb/internal0.d: Likewise. * testsuite/ld-elfvsb/internal1.d: Likewise. * testsuite/ld-elfvsb/protected0.d: Likewise. * testsuite/ld-elfvsb/protected1.d: Likewise.
2022-01-12gas: add visibility support for XCOFFClément Chigot1-1/+1
XCOFF assembly defines the visibility using an additional argument on several pseudo-ops: .globl, .weak, .extern and .comm. This implies that .globl and .weak syntax is different than the usual GNU syntax. But we want to provide compatibility with AIX assembler, especially because GCC is generating the visibility using this XCOFF syntax. PR 22085 bfd/ChangeLog: * coffcode.h (coff_write_object_contents): Change XCOFF header vstamp field to 2. * coffgen.c (coff_print_symbol): Increase the size for n_type. gas/ChangeLog: * config/tc-ppc.c (ppc_xcoff_get_visibility): New function. (ppc_globl): New function. (ppc_weak): New function. (ppc_comm): Add visibility field support. (ppc_extern): Likewise. * testsuite/gas/all/cofftag.d: Adjust to new n_type size providing by objdump. * testsuite/gas/ppc/test1xcoff32.d: Likewise. * testsuite/gas/ppc/aix.exp: Add new tests. * testsuite/gas/ppc/xcoff-visibility-1-32.d: New test. * testsuite/gas/ppc/xcoff-visibility-1-64.d: New test. * testsuite/gas/ppc/xcoff-visibility-1.s: New test. include/ChangeLog: * coff/internal.h (SYM_V_INTERNAL, SYM_V_HIDDEN, SYM_V_PROTECTED, SYM_V_EXPORTED, SYM_V_MASK): New defines. * coff/xcoff.h (struct xcoff_link_hash_entry): Add visibility field. ld/ChangeLog: * testsuite/ld-pe/pr19803.d: Adjust to new n_type size providing by objdump.
2022-01-12Set SEC_ELF_REVERSE_COPY earlierAlan Modra1-0/+10
For the sake of DT_RELR. bfd/ * elflink.c (elf_link_input_bfd): Don't set SEC_ELF_REVERSE_COPY here. Move sanity checks to reverse copying code. ld/ * ldlang.c (lang_add_section): Set SEC_ELF_REVERSE_COPY for .ctors/.dtors in .init_array/.fini_array.
2022-01-11Fix multiple problems with DLL generation.Martin Storsj2-14/+27
ld * pe-dll.c (make_head): Prefix the symbol name with the dll name. (make_tail, make_one, make_singleton_name_thunk): Likewise. (make_import_fixup_entry, make_runtime_pseudo_reloc): Likewise. (pe_create_runtime_relocator_reference): Likewise. (pe_dll_generate_implib): Set dll_symname_len. (pe_process_import_defs): Likewise. binutils * dlltool.c (main): If a prefix has not been provided, attempt to use a deterministic one based upon the dll name.
2022-01-10XCOFF: add support for TLS relocations on hidden symbolsClément Chigot8-103/+381
This patch adds support for TLS relocation targeting C_HIDEXT symbols. In gas, TLS relocations, except R_TLSM and R_TLMSL, must keep the value of their target symbol. In ld, it simply ensures that internal TLS symbols are added to the linker hash table for xcoff_reloc_type_tls. It also improves the tests made by both. bfd/ChangeLog: * coff-rs6000.c (xcoff_howto_table): Fix name of R_TLSML. (xcoff_reloc_type_tls): Replace the error when h is NULL by an assert. (xcoff_complain_overflow_unsigned_func): Adjust comments. * coff64-rs6000.c (xcoff64_howto_table): Fix name of R_TLSML. * xcofflink.c (xcoff_link_add_symbols_to_hash_table): New function. (xcoff_link_add_symbols): Add C_HIDEXT TLS symbols to the linker hash table. gas/ChangeLog: * config/tc-ppc.c (md_apply_fix): Enable support for TLS relocation over internal symbols. * testsuite/gas/ppc/aix.exp: Replace xcoff-tlms by xcoff-tls. * testsuite/gas/ppc/xcoff-tlsm-32.d: Removed. * testsuite/gas/ppc/xcoff-tlsm-64.d: Removed. * testsuite/gas/ppc/xcoff-tlsm.s: Removed. * testsuite/gas/ppc/xcoff-tls-32.d: New test. * testsuite/gas/ppc/xcoff-tls-64.d: New test. * testsuite/gas/ppc/xcoff-tls.s: New test. ld/ChangeLog: * testsuite/ld-powerpc/aix52.exp: Improve aix-tls-reloc test. * testsuite/ld-powerpc/aix-tls-reloc.s: Likewise. * testsuite/ld-powerpc/aix-tls-reloc-32.d: Removed. * testsuite/ld-powerpc/aix-tls-reloc-64.d: Removed. * testsuite/ld-powerpc/aix-tls-reloc-32.dd: New test. * testsuite/ld-powerpc/aix-tls-reloc-32.dt: New test. * testsuite/ld-powerpc/aix-tls-reloc-64.dd: New test. * testsuite/ld-powerpc/aix-tls-reloc-64.dt: New test.
2022-01-07ld: Extract _bfd_elf_link_iterate_on_relocsH.J. Lu2-4/+4
DT_RELR encodes consecutive R_*_RELATIVE relocations in GOT (the global offset table) and data sections in a compact format: https://groups.google.com/g/generic-abi/c/bX460iggiKg On some targets, R_*_RELATIVE relocations are counted and the GOT offsets are allocated when setting the dynamic section sizes after seeing all relocations. R_*_RELATIVE relocations are generated while relocating sections after section layout has been finalized. To prepare for DT_RELR implementation on these targets, extract _bfd_elf_link_iterate_on_relocs from _bfd_elf_link_check_relocs so that a backend can scan relocations in elf_backend_always_size_sections For x86 targets, the old check_relocs is renamed to scan_relocs and a new check_relocs is added to chek input sections and create dynamic relocation sections so that they will be mapped to output sections. scan_relocs is now called from elf_backend_always_size_sections. Since relocations are scanned after __start, __stop, .startof. and .sizeof. symbols have been finalized on x86, __[start|stop]_SECNAME for --gc-sections -z start-stop-gc are now zero when all SECNAME sections been garbage collected. This is no need for elf_x86_start_stop_gc_p. bfd/ * elf-bfd.h (_bfd_elf_link_iterate_on_relocs): New. * elf32-i386.c (elf_i386_convert_load_reloc): Don't call elf_x86_start_stop_gc_p. (elf_i386_check_relocs): Renamed to ... (elf_i386_scan_relocs): This. Don't call _bfd_elf_make_dynamic_reloc_section. (elf_i386_always_size_sections): New. (elf_backend_check_relocs): Removed. (elf_backend_always_size_sections): New. * elf64-x86-64.c (elf_x86_64_convert_load_reloc): Don't call elf_x86_start_stop_gc_p. (elf_x86_64_check_relocs): Renamed to ... (elf_x86_64_scan_relocs): This. Don't call _bfd_elf_make_dynamic_reloc_section. (elf_x86_64_always_size_sections): New. (elf_backend_check_relocs): Removed. (elf_backend_always_size_sections): New. * elflink.c (elf_link_check_or_scan_relocs): New. Extracted from _bfd_elf_link_check_relocs. (_bfd_elf_link_check_relocs): Call elf_link_check_or_scan_relocs. * elfxx-x86.c (_bfd_x86_elf_check_relocs): New. * elfxx-x86.h (X86_64_NEED_DYNAMIC_RELOC_TYPE_P): New. (I386_NEED_DYNAMIC_RELOC_TYPE_P): Likewise. (X86_NEED_DYNAMIC_RELOC_TYPE_P): Likewise. (_bfd_x86_elf_check_relocs): Likewise. (elf_backend_check_relocs): Likewise. (elf_backend_always_size_sections): Removed. (elf_x86_start_stop_gc_p): Likewise. ld/ * testsuite/ld-i386/pr27491-1a.d: Updated. * testsuite/ld-x86-64/pr27491-1a.d: Likewise.
2022-01-07RISC-V: Updated the default ISA spec to 20191213.Nelson Chu11-11/+11
Update the default ISA spec from 2.2 to 20191213 will change the default version of i from 2.0 to 2.1. Since zicsr and zifencei are separated from i 2.1, users need to add them in the architecture string if they need fence.i and csr instructions. Besides, we also allow old ISA spec can recognize zicsr and zifencei, but we won't output them since they are already included in the i extension when i's version is less than 2.1. bfd/ * elfxx-riscv.c (riscv_parse_add_subset): Allow old ISA spec can recognize zicsr and zifencei. gas/ * config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Updated to 20191213. * testsuite/gas/riscv/csr-version-1p10.d: Added zicsr to -march since the default version of i is 2.1. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/option-arch-03.d: Updated i's version to 2.1. * testsuite/gas/riscv/option-arch-03.s: Likewise. ld/ * testsuite/ld-riscv-elf/call-relax.d: Added zicsr to -march since the default version of i is 2.1. * testsuite/ld-riscv-elf/attr-merge-arch-01.d: Updated i's version to 2.1. * testsuite/ld-riscv-elf/attr-merge-arch-01a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-01b.: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-02a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-02b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-03a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-03b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-failed-02.d: Added zifencei into Tag_RISCV_arch since it is added implied when i's version is larger than 2.1.
2022-01-06ldelfgen.c: Add missing newlines when calling einfoH.J. Lu1-3/+3
* ldelfgen.c (ldelf_map_segments): Add the missing newline to einfo.
2022-01-05elf: Set p_align to the minimum page size if possibleH.J. Lu13-10/+79
Currently, on 32-bit and 64-bit ARM, it seems that ld generates p_align values of 0x10000 even if no section alignment is greater than 0x1000. The issue is more general and probably affects other targets with multiple page sizes. While file layout absolutely must take 64K page size into account, that does not have to be reflected in the p_align value. If running on a 64K kernel, the file will be loaded at a 64K page boundary by necessity. On a 4K kernel, 64K alignment is not needed. The glibc loader has been fixed to honor p_align: https://sourceware.org/bugzilla/show_bug.cgi?id=28676 similar to kernel: commit ce81bb256a224259ab686742a6284930cbe4f1fa Author: Chris Kennelly <ckennelly@google.com> Date: Thu Oct 15 20:12:32 2020 -0700 fs/binfmt_elf: use PT_LOAD p_align values for suitable start address This means that on 4K kernels, we will start to do extra work for 64K p_align, but this pointless for pretty much all binaries (whose section alignment rarely exceeds 16). The minimum page size is used, instead of the maximum section alignment due to this glibc bug: https://sourceware.org/bugzilla/show_bug.cgi?id=28688 It has been fixed in glibc 2.35. But linker output must work on existing glibc binaries. 1. Set p_align to the minimum page size while laying out segments aligning to the maximum page size or section alignment. The run-time loader can align segments to the minimum page size or above, depending on system page size. 2. If -z max-page-size=NNN is used, p_align will be set to the maximum page size or the largest section alignment. 3. If a section requires alignment higher than the minimum page size, don't set p_align to the minimum page size. 4. If a section requires alignment higher than the maximum page size, set p_align to the section alignment. 5. For objcopy, when the minimum page size != the maximum page size, p_align may be set to the minimum page size while segments are aligned to the maximum page size. In this case, the input p_align will be ignored and the maximum page size will be used to align the ouput segments. 6. Update linker to disallow the common page size > the maximum page size. 7. Update linker to avoid the common page size > the maximum page size. 8. Adjust pru_irq_map-1.d to expect p_align == sh_addralign: Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .text PROGBITS 20000000 00007c 000004 00 AX 0 0 4 ... Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x000074 0x00000000 0x00000000 0x00008 0x00008 RW 0x1 LOAD 0x00007c 0x20000000 0x20000000 0x00004 0x00004 R E 0x4 vs. Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .text PROGBITS 20000000 00007c 000004 00 AX 0 0 4 ... Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x000074 0x00000000 0x00000000 0x00008 0x00008 RW 0x1 LOAD 0x00007c 0x20000000 0x20000000 0x00004 0x00004 R E 0x1 To enable this linker optimization, the backend should define ELF_P_ALIGN to ELF_MINPAGESIZE. bfd/ PR ld/28689 PR ld/28695 * elf-bfd.h (elf_backend_data): Add p_align. * elf.c (assign_file_positions_for_load_sections): Set p_align to the default p_align value while laying out segments aligning to maximum page size or section alignment. (elf_is_p_align_valid): New function. (copy_elf_program_header): Call elf_is_p_align_valid to determine if p_align is valid. * elfxx-target.h (ELF_P_ALIGN): New. Default to 0. (elfNN_bed): Add ELF_P_ALIGN. * elfxx-x86.h (ELF_P_ALIGN): New. Set to ELF_MINPAGESIZE. include/ PR ld/28689 PR ld/28695 * bfdlink.h (bfd_link_info): Add maxpagesize_is_set. ld/ PR ld/28689 PR ld/28695 * emultempl/elf.em (gld${EMULATION_NAME}_handle_option): Set link_info.maxpagesize_is_set for -z max-page-size=NNN. * ldelf.c (ldelf_after_parse): Disallow link_info.commonpagesize > link_info.maxpagesize. * testsuite/ld-elf/elf.exp: Pass -z max-page-size=0x4000 to linker to build mbind2a and mbind2b. * testsuite/ld-elf/header.d: Add -z common-page-size=0x100. * testsuite/ld-elf/linux-x86.exp: Add PR ld/28689 tests. * testsuite/ld-elf/p_align-1.c: New file. * testsuite/ld-elf/page-size-1.d: New test. * testsuite/ld-elf/pr26936.d: Add -z common-page-size=0x1000. * testsuite/ld-elf/seg.d: Likewise. * testsuite/ld-scripts/rgn-at5.d: Likewise. * testsuite/ld-pru/pru_irq_map-1.d: Append 1 to name. Adjust expected PT_LOAD segment alignment. * testsuite/ld-pru/pru_irq_map-2.d: Append 2 to name. * testsuite/ld-scripts/pr23571.d: Add -z max-page-size=0x1000.
2022-01-04ld/x86: Update -z report-relative-relocH.J. Lu2-4/+4
Use 0x%v, instead of bfd_sprintf_vma, to report relative relocations. Change linker relative relocations report from tmpdir/dump: R_X86_64_IRELATIVE (offset: 0x0000000000002000, info: 0x0000000000000025, addend: 0x0000000000001007) against 'ifunc' for section '.data.rel.ro.local' in tmpdir/report-reloc-1.o to tmpdir/dump: R_X86_64_IRELATIVE (offset: 0x2000, info: 0x25, addend: 0x1007) against 'ifunc' for section '.data.rel.ro.local' in tmpdir/report-reloc-1.o bfd/ * elfxx-x86.c (_bfd_x86_elf_link_report_relative_reloc): Use 0x%v instead of bfd_sprintf_vma. ld/ * testsuite/ld-i386/report-reloc-1.l: Updated. * testsuite/ld-x86-64/report-reloc-1.l: Likewise.
2022-01-02Update year range in copyright notice of binutils filesAlan Modra343-402/+402
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2022-01-01unify 64-bit bfd checksMike Frysinger4-116/+124
Move the 64-bit bfd logic out of bfd/configure.ac and into bfd64.m4 under config so it can be shared between all the other subdirs. This replaces want64 with enable_64_bit_bfd which was already being declared, but not used directly.
2021-12-31ld-x86-64: Pass options to linker with "-Wl,"H.J. Lu1-20/+24
* testsuite/ld-x86-64/x86-64.exp: Pass options to linker with "-Wl,".
2021-12-28ld: Fix testcase errors due to -shared not support.jiawei2-1/+6
Reviewed-by: Jim Wilson <jim.wilson.gcc@gmail.com> ld/ChangeLog: * testsuite/ld-ctf/ctf.exp: Add shared lib check. * testsuite/ld-plugin/lto.exp: Add lto shared check.
2021-12-27ld: Remove emultempl/linux.emH.J. Lu1-226/+0
Remove emultempl/linux.em whose last usage was removed by commit c65c21e1ffd1e02d9970a4bca0b7e384788a50f0 Author: Alan Modra <amodra@gmail.com> Date: Mon Apr 16 22:14:01 2018 +0930 various i386-aout and i386-coff target removal Also tidies some other aout leftovers in binutils-common.exp.
2021-12-21Obsolete m32c-rtems and m32r-rtemsJoel Sherrill1-2/+2
2020-12-20 Joel Sherrill <joel@rtems.org> bfd/ * config.bfd (m32c-*-rtems*): Remove target. ld/ * configure.tgt (m32c-*-rtems*): Remove target. * configure.tgt (m32r-*-rtems*): Remove target.
2021-12-16Fix AVR assembler so that it creates relocs that will work with linker ↵Nick Clifton4-5/+15
relaxation. PR 28686 gas * config/tc-avr.h (tc_fix_adjustable): Define. * config/tc-avr.c (avr_fix_adjustable): New function. * testsuite/gas/all/gas.exp: Skip tests that need adjustable fixups. * testsuite/gas/elf/elf.exp: Likewise. * testsuite/gas/avr/diffreloc_withrelax.d: Adjust expected output. * testsuite/gas/avr/pc-relative-reloc.d: Adjust expected output. ld * testsuite/ld-avr/avr-prop-7.d: Adjust expected output. * testsuite/ld-avr/avr-prop-8.d: Likewise. * testsuite/ld-avr/pr13402.d: Likewise.
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