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that the compiler can use the assembler to generate line number information and have the assembler determine view numbers to multiple views at the same program counter.
binutils* dwarf.c (struct State_Machine_Registers): Add view field.
(reset_state_machine): Reset view.
(process_extended_line_op): Reset view when appropriate.
(display_debug_lines_raw): Increment or reset view when appropriate.
Print nonzero views. Support print view resets, disabled by default.
(display_debug_lines_decoded): Likewise. Disambiguate op_code tests,
enabling printing of end_sequence.
* testsuite/binutils-all/dw2-1.W: Add nonzero views.
* testsuite/binutils-all/dw2-3.W: Likewise.
* testsuite/binutils-all/dw2-3gabi.W: Likewise.
* testsuite/binutils-all/dw5.W: Add end sequence lines.
* testsuite/binutils-all/i386/compressed-1a.d: Add nonzero views.
* testsuite/binutils-all/libdw2-compressedgabi.out: Likewise.
* testsuite/binutils-all/objdump.W: Likewise.
* testsuite/binutils-all/objdump.WL: Add end sequence lines.
* testsuite/binutils-all/x86-64/compressed-1a.d: Add nonzero views.
gas * doc/as.texinfo (.loc): Document view support.
* dwarf2dbg.c (unused): Check offset of next in struct line_entry.
(current): Initialize view.
(force_reset_view, view_assert_failed): New variables.
(reverse_line_entry_list): New function.
(set_or_check_view): Likewise.
(dwarf2_gen_line_info_1): Call it.
(dwarf2_where): Set view to NULL.
(dwarf2_emit_insn): Return early when called before first file.
(dwarf2_directive_loc): Add view support. Emit insn
immediately when view option is given.
(process_entries): Avoid set_address to reset view when a known
address change already implies the view reset.
(dwarf2dbg_final_check): New function.
* dwarf2dbg.h (struct dwarf2_line_info): Add view.
(dwarf2dbg_final_check): Declare.
* read.c (s_leb128): Parse expression as deferred.
* testsuite/gas/all/gas.exp: Run sleb128-9.
* testsuite/gas/all/sleb128-9.d: New.
* testsuite/gas/all/sleb128-9.l: New.
* testsuite/gas/all/sleb128-9.s: New.
* testsuite/gas/elf/dwarf2-1.d: Add nonzero views.
* testsuite/gas/elf/dwarf2-2.d: Likewise.
* testsuite/gas/elf/dwarf2-5.d: New.
* testsuite/gas/elf/dwarf2-5.s: New.
* testsuite/gas/elf/dwarf2-6.d: New.
* testsuite/gas/elf/dwarf2-6.s: New.
* testsuite/gas/elf/dwarf2-7.d: New.
* testsuite/gas/elf/dwarf2-7.s: New.
* testsuite/gas/elf/dwarf2-8.d: New.
* testsuite/gas/elf/dwarf2-8.l: New.
* testsuite/gas/elf/dwarf2-8.s: New.
* testsuite/gas/elf/dwarf2-9.d: New.
* testsuite/gas/elf/dwarf2-9.l: New.
* testsuite/gas/elf/dwarf2-9.s: New.
* testsuite/gas/elf/dwarf2-10.d: New.
* testsuite/gas/elf/dwarf2-10.l: New.
* testsuite/gas/elf/dwarf2-10.s: New.
* testsuite/gas/elf/dwarf2-11.d: New.
* testsuite/gas/elf/dwarf2-11.s: New.
* testsuite/gas/elf/dwarf2-12.d: New.
* testsuite/gas/elf/dwarf2-12.s: New.
* testsuite/gas/elf/dwarf2-13.d: New.
* testsuite/gas/elf/dwarf2-13.s: New.
* testsuite/gas/elf/dwarf2-14.d: New.
* testsuite/gas/elf/dwarf2-14.s: New.
* testsuite/gas/elf/dwarf2-15.d: New.
* testsuite/gas/elf/dwarf2-15.s: New.
* testsuite/gas/elf/dwarf2-16.d: New.
* testsuite/gas/elf/dwarf2-16.s: New.
* testsuite/gas/elf/dwarf2-17.d: New.
* testsuite/gas/elf/dwarf2-17.s: New.
* testsuite/gas/elf/dwarf2-18.d: New.
* testsuite/gas/elf/dwarf2-18.s: New.
* testsuite/gas/elf/elf.exp: Run dwarf2-5..18 tests.
* testsuite/gas/i386/dw2-compress-1.d: Add nonzero views.
* testsuite/gas/i386/dw2-compressed-1.d: Likewise.
* testsuite/gas/i386/ilp32/lns/lns-duplicate.d: Likewise.
* testsuite/gas/lns/lns-big-delta.d: Likewise.
* testsuite/gas/lns/lns-duplicate.d: Likewise.
* testsuite/gas/mips/loc-swap-2.d: Likewise.
* testsuite/gas/mips/loc-swap-3.d: Likewise.
* testsuite/gas/mips/loc-swap.d: Likewise.
* testsuite/gas/mips/micromips@loc-swap-2.d: Likewise.
* testsuite/gas/mips/micromips@loc-swap.d: Likewise.
* testsuite/gas/mips/mips16@loc-swap-2.d: Likewise.
* testsuite/gas/mips/mips16@loc-swap.d: Likewise.
* testsuite/gas/mips/mips16e@loc-swap.d: Likewise.
* write.c (write_object_file): Check pending view asserts.
(cvt_frag_to_fill): Complain about undefined leb128 operand.
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Fix incorrect adjustment of diff relocs when relaxing, and thus the
resulting source line to address mismatch.
Fix two issues when adjusting diff relocs to account for
deleted bytes.
1. Don't adjust the difference if the end address is the shrinked
insn's address i.e. use < instead of <=. The relaxation code deletes
count bytes from or after shrinked_insn_address, so the difference
between start_address and end_address should remain unchanged in this
case.
2. Adjust the reloc addend if the difference is to be adjusted and
symval + reloc addend is past the shrinked insn address. This is
because for a typical sym1 - sym2 diff reloc, sym1 is .text +
irel->r_addend, and the addend should be reduced to account for the
shrinked insn.
For example, assume the reloc value is .text + 0x8 with .text = 0, the
diff value in the object file = 0x4, and shrinked_insn_address = 0x4
with count = 0x2. Then the existing code writes 0x2 into the object
file to account for the deleted bytes, as shrinked_insn_address lies
between 0x8 and 0x8 - 0x4 = 0x4, but leaves the addend as is. The next
time the reloc is looked at, the code sees if a shrinked_insn_address
lies between 0x8 and 0x8 - 0x2 = 0x6, instead of 0x6 and 0x4. If there
happens to be one, then the diff value in the object file ends up
getting reduced again.
bfd/
2017-06-27 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/13402
* elf32-avr.c (elf32_avr_adjust_diff_reloc_value): Adjust
reloc addend if necessary. Adjust diff only if
shrinked_insn_address < end_address.
ld/
2017-06-27 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/13402
* testsuite/ld-avr/pr13402.d: New test.
* testsuite/ld-avr/pr13402.s: New test.
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Fix a host of problems related to adjustment of
symbol values and sizes when relaxing for avr.
1. Adjust symbol size first before adjusting symbol
value. Otherwise, a symbol whose value just got adjusted to the
relaxed address also ends up getting resized. See pr21404-1.s.
2. Reduce symbol sizes only if their span is below an
alignment boundary. Otherwise, the size gets decremented once when the
actual instruction is relaxed and padding bytes are added, and again
when the padding bytes are deleted (if padding ends up being unnecessary).
pr21404-2.s addresses that, and this bug is really the root cause of PR21404.
3. Adjust all symbol values before an alignment boundary.
Previous code did not adjust symbol values if they fell in the
would-be padded area, resulting in incorrect symbol values in some
cases (see pr21404-3.s).
4. Increase symbol sizes if alignment directives require so.
As pr21404-4.s shows
.global nonzero_sym
L1:
jmp L1
nonzero_sym:
nop
nop
.p2align 2
.size nonzero_sym, .-nonzero_sym
The two nops satisfy the 4 byte alignment at assembly time and
therefore the size of nonzero_sym is 4. Relaxation shortens
the 4 byte jmp to a 2 byte rjmp, and to satisfy 4 byte alignment
the code places 2 extra padding bytes after the nops, increasing
nonzero_sym's size by 2. This wasn't handled before.
If the assembly code does not have any align directives, then the
boundary is the section size, and symbol values and sizes == boundary
should also get adjusted. To handle that case, add a did_pad variable
and use that to determine whether it should use < boundary or <= boundary.
Also get rid of reloc_toaddr, which is now redundant. toaddr is now not
adjusted to handle the above case - the newly added
did_pad variable does the job.
pr21404-{5,6,7,8} are the same testcases written for local symbols, as
the code handles them slightly differently.
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Fix issues with diff relocs that have a negative value
i.e. sym2 - sym1 where sym2 is lesser than sym1.
The assembler generates a diff reloc with symbol as start of section
and addend as sym2 offset, and encodes assembly time difference at
the reloc offset.
The existing relaxation logic adjusts addends if the relaxed insn lies
between symbol and addend. That doesn't work for diff relocs where
sym2 is less than sym1 *and* the relaxed insn happens to be between
sym2 and sym1.
Fix the problems by
1. Using signed handling of the difference value (bfd_signed_vma instead
of bfd_vma, bfd_{get,set}_signed_xxx instead of bfd_{get,set}_xxx).
2. Not assuming sym2 is bigger than sym1. It instead computes the actual
addresses and sets the lower and higher addresses as start and end
addresses respectively and then sees if insn is between start and end.
3. Creating a new function elf32_avr_adjust_reloc_if_spans_insn to
centralize reloc adjustment, and ensuring diff relocs get adjusted
correctly even if their sym + addend doesn't overlap a relaxed insn.
It also removes a redundant variable did_pad. It is never set if
did_shrink is TRUE, and the code does a early return if did_shrink is
FALSE.
bfd/ChangeLog
2016-11-15 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20789
* bfd/elf32-avr.c (elf32_avr_adjust_diff_reloc_value): Do signed
manipulation of diff value, and don't assume sym2 is less than sym1.
(elf32_avr_adjust_reloc_if_spans_insn): New function.
(elf32_avr_relax_delete_bytes): Use elf32_avr_adjust_diff_reloc_value,
and remove redundant did_pad.
ld/ChangeLog
2016-11-15 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20789
* ld/testsuite/ld-avr/pr20789.d: New test.
* ld/testsuite/ld-avr/pr20789.s: New test.
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Prior to the patch, addends for relocs were being adjusted even if
they went beyond an alignment boundary. This is wrong - to
preserve alignment constraints, the relaxation logic adds as many padding
bytes at the alignment boundary as was deleted, so addends beyond the
boundary should not be adjusted. avr-prop-7.s reproduces this
scenario.
Also, prior to this patch, the relaxation logic assumed that the addr
parameter pointed to the middle of the instruction to be deleted, and
that addr - count would therefore be the shrinked instruction's
address. This is true when actually shrinking instructions.
The alignment constraints handling logic also invokes the same logic
though, with addr as the starting offset of padding bytes and
with count as the number of bytes to be deleted. Calculating the
shrinked insn's address as addr - count is obviously wrong in this
case - that offset would point to count bytes before the last
non-padded byte. avr-prop-8.s reproduces this scenario.
To fix scenario 1, the patch adds an additional check to ensure reloc addends
aren't adjusted if they cross a shrink boundary. The shrink boundary
is either the section size or an alignment boundary. Addends pointing
at an alignment boundary don't need to be adjusted, as padding would
occur and keep the boundary the same. Addends pointing at section size
need to be adjusted though, as no padding occurs and the section size
itself would get decremented. The patch records whether padding
occured (did_pad) and uses that to detect and handle this condition.
To fix scenario 2, the patch adds an additional parameter
(delete_shrinks_insn) to elf32_avr_relax_delete_bytes to distinguish
instruction bytes deletion from padding bytes deletion. It then uses that to
correctly set shrinked_insn_address.
bfd/ChangeLog:
2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20545
* elf32-avr.c (elf32_avr_relax_delete_bytes): Add parameter
delete_shrinks_insn. Modify computation of shrinked_insn_address.
Compute shrink_boundary and adjust addend only if
addend_within_shrink_boundary.
(elf32_avr_relax_section): Modify calls to
elf32_avr_relax_delete_bytes to pass extra parameter.
ld/ChangeLog:
2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20545
* testsuite/ld-avr/avr-prop-7.d: New test.
* testsuite/ld-avr/avr-prop-7.s: New test.
* testsuite/ld-avr/avr-prop-8.d: New test.
* testsuite/ld-avr/avr-prop-8.s: New test.
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This patch fixes another edge case related to alignment property
records - reloc offsets adjacent to property record offsets were not
getting adjusted during relaxation.
bfd/
PR ld/20254
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc
offsets until reloc_toaddr.
ld/
PR ld/20254
* testsuite/ld-avr/avr-prop-6.d: New test.
* testsuite/ld-avr/avr-prop-6.s: New test.
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This patch fixes an edge case in linker relaxation that causes symbol
values to be computed incorrectly in the presence of align directives
in input source code.
bfd/
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
and relocs only if shrinking occurred.
ld/
* testsuite/ld-avr/avr-prop-5.d: New.
* testsuite/ld-avr/avr-prop-5.s: New.
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This patch adds default data address space origin (0x800000) to the symbol addresses.
when disassemble lds/sts instructions. So that symbol names shall be printed in comments
for lds/sts instructions disassemble.
ld/
* testsuite/ld-avr/lds-mega.d: New test.
* testsuite/ld-avr/lds-mega.s: New test source.
* testsuite/ld-avr/lds-tiny.d: New test.
* testsuite/ld-avr/lds-tiny.s: New test source.
opcodes/
* avr-dis.c (avr_operand): Add default data address space origin (0x800000) to the
address and set as symbol address for LDS/ STS immediate operands.
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* ld-avr/gc-section-debugline.d: Relax regex check for CU.
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When generating relocation (tc_gen_reloc) 32 bit relocation fixup
is changed to new 32 bit PC relative relocation if the fixup has pc-relative
flag set.
bfd/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* elf32-avr.c: Add 32 bit PC relative relocation for AVR target.
gas/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to
32 bit PC relative and update offset if the fixup is pc-relative.
* config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff
relocs.
gas/testsuite/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc.
* gas/avr/per-function-debugline.s: New test source.
include/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* elf/avr.h: Add new 32 bit PC relative relocation.
ld/testsuite/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* ld-avr/gc-section-debugline.d: New test.
* ld-avr/per-function-debugline.s: Source for new test.
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Make use of the data held within the .avr.prop section during linker
relaxation in order to maintain the properties of the .org and .align
directives.
In relation to the .align directives, if enough bytes are deleted before
a .align directive then the alignment can be moved while still
maintaining the alignment requirement.
bfd/ChangeLog:
* elf32-avr.c (struct elf_avr_section_data): New structure.
(struct avr_relax_info): New structure.
(elf_avr_new_section_hook): New function.
(struct elf_avr_section_data): Add relax_info.
(get_avr_relax_info): New function.
(init_avr_relax_info): New function.
(elf32_avr_relax_delete_bytes): Find next property record before
deleting bytes. When deleting don't move bytes beyond the next
property record.
(avr_elf32_assign_records_to_section): New function.
(avr_property_record_compare): New function.
(avr_load_all_property_sections): New function.
(elf32_avr_relax_section): Load property data. After relaxing the
section, move any .align directives that have enough deleted bytes
before them.
(bfd_elf32_new_section_hook): Define.
ld/testsuite/ChangeLog:
* ld-avr/avr-prop-1.d: New file.
* ld-avr/avr-prop-1.s: New file.
* ld-avr/avr-prop-2.d: New file.
* ld-avr/avr-prop-2.s: New file.
* ld-avr/avr-prop-3.d: New file.
* ld-avr/avr-prop-3.s: New file.
* ld-avr/avr-prop-4.d: New file.
* ld-avr/avr-prop-4.s: New file.
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__<name>_REGION_LENGTH__ symbols, if provided, for setting memory region lengths, defaulting to the current constant values otherwise.
ld * scripttempl/avr.sc: Add new user_signatures region. Define and Use
symbols for all region lengths.
* scripttempl/avrtiny.sc: Define and use symbols for all region lengths.
testsuite * ld-avr/region_overflow.d: New test.
* ld-avr/region_overflow.s: Likewise.
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Have the assembler prepare for linker relaxation by default. This
means that users will be able to make use of linker relaxation without
having to adjust the assembler flags, this can make life easier when
compiling libraries.
Having this on by default in the assembler should make no difference to
the assembler code produced, however, some of the debug information will
be slightly less compressed.
A few tests needed to be updated as a result of this change as they
relied on linker relaxation support being off by default.
I've tightened up the definition of which sections can be relaxed on AVR
as part of this commit, the assembler used to think that all
non-debugging sections could be relaxed, when in reality only code
sections can be relaxed for AVR. The previous definition was not
dangerous, just over cautious. The new tighter definition allows an
extra test (gas/testsuite/gas/all/forward.d) to continue to pass.
gas/ChangeLog:
* config/tc-avr.c (struct avr_opt_s): Change link_relax to
no_link_relax, extend comment.
(enum options): Add new OPTION_NO_LINK_RELAX.
(md_longopts): Add entry for -mno-link-relax.
(md_parse_option): Handle OPTION_NO_LINK_RELAX, and update
OPTION_LINK_RELAX.
(md_begin): Initialise linkrelax from no_link_relax.
(md_show_usage): Include -mno-link-relax option.
(relaxable_section): Only allocatable code sections can be
relaxed.
* config/tc-avr.h (TC_LINKRELAX_FIXUP): Define.
gas/testsuite/ChangeLog:
* gas/all/gas.exp: Test will not pass on AVR due to linker
relaxation support.
* gas/avr/noreloc_withoutrelax.d: Add -mno-link-relax option.
* gas/avr/link-relax-elf-flag-clear.d: Likewise.
ld/testsuite/ChangeLog:
* ld/testsuite/ld-avr/relax-elf-flags-02.d: Add -mno-link-relax
option.
* ld/testsuite/ld-avr/relax-elf-flags-03.d: Likewise.
* ld/testsuite/ld-avr/relax-elf-flags-04.d: Likewise.
* ld/testsuite/ld-avr/relax-elf-flags-05.d: Likewise.
* ld/testsuite/ld-avr/relax-elf-flags-06.d: Likewise.
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The AVR target has an elf header flag to indicate if an object was
assembler ready for linker relaxation. If a partial link is performed
then it is important that the link-relax flag in the output object is
set correctly, otherwise, during the final link, we might try to perform
linker relaxation on code that was not assembled suitably.
As the link-relax elf header covers the entire object file we must be
conservative when setting the flag in the output object, so, for a
partial link, any input object that does not have the link-relax flag
set will cause the output object to also not have the link-relax flag
set.
This conservative approach could be softened in future, we only need to
disable the link relax flag if an input file is not marked link-relax
ready, and the input file contains a relaxable section. However, I've
left this optimisation for a later day.
For the final link I've overloaded the use of the link-relax elf header
flag, in a final executable, the flag now indicates if the executable
was built with linker relaxation on or not.
ld/ChangeLog:
* emultempl/avrelf.em: Add include of elf/avr.h.
(avr_finish): New function.
(LDEMUL_FINISH): Added.
ld/testsuite/ChangeLog:
* ld-avr/relax-elf-flags-01.d: New file.
* ld-avr/relax-elf-flags-02.d: New file.
* ld-avr/relax-elf-flags-03.d: New file.
* ld-avr/relax-elf-flags-04.d: New file.
* ld-avr/relax-elf-flags-05.d: New file.
* ld-avr/relax-elf-flags-06.d: New file.
* ld-avr/relax-elf-flags-07.d: New file.
* ld-avr/relax-elf-flags-08.d: New file.
* ld-avr/relax-elf-flags-a.s: New file.
* ld-avr/relax-elf-flags-b.s: New file.
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When performing linker relaxation, reduce the size of symbols that span
the deleted bytes. This ensures that, for example, function symbols
will have the correct size.
bfd/ChangeLog:
* elf32-avr.c (elf32_avr_relax_delete_bytes): During linker
relaxation, reduce the size of symbols that span the deleted
bytes.
ld/ChangeLog:
* testsuite/ld-avr/relax-02.d: Update to check size of symbols has
changed.
* testsuite/ld-avr/relax-03.d: Likewise.
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Symbols at the very end of a section were not being updated correctly
when linker relaxation takes place due to the use of '<' instead of
'<='. Added a couple of tests to cover this behaviour.
bfd/ChangeLog:
* elf32-avr.c (elf32_avr_relax_delete_bytes): Modify symbols
located at the very end of the section.
ld/ChangeLog:
* ld/testsuite/ld-avr/relax-02.d: New file.
* ld/testsuite/ld-avr/relax-02.s: New file.
* ld/testsuite/ld-avr/relax-03.d: New file.
* ld/testsuite/ld-avr/relax-03.s: New file.
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* elf32-avr.c: Add DIFF relocations for AVR.
(avr_final_link_relocate): Handle the DIFF relocs.
(bfd_elf_avr_diff_reloc): New.
(elf32_avr_is_diff_reloc): New.
(elf32_avr_adjust_diff_reloc_value): Reduce difference value.
(elf32_avr_relax_delete_bytes): Recompute difference after deleting
bytes.
* reloc.c: Add BFD_RELOC_AVR_DIFF8/16/32 relocations
gas/ChangeLog
* config/tc-avr.c: Add new flag mlink-relax.
(md_show_usage): Add flag and help text.
(md_parse_option): Record whether link relax is turned on.
(relaxable_section): New.
(avr_validate_fix_sub): New.
(avr_force_relocation): New.
(md_apply_fix): Generate DIFF reloc.
(avr_allow_local_subtract): New.
* config/tc-avr.h (TC_LINKRELAX_FIXUP): Define to 0.
(TC_FORCE_RELOCATION): Define.
(TC_FORCE_RELOCATION_SUB_SAME): Define.
(TC_VALIDATE_FIX_SUB): Define.
(avr_force_relocation): Declare.
(avr_validate_fix_sub): Declare.
(md_allow_local_subtract): Define.
(avr_allow_local_subtract): Declare.
gas/testsuite/ChangeLog
* gas/avr/diffreloc_withrelax.d: New testcase.
* gas/avr/noreloc_withoutrelax.d: Likewise.
* gas/avr/relax.s: Likewise.
include/ChangeLog
* elf/avr.h: Add new DIFF relocs.
ld/testsuite/ChangeLog
* ld-avr/norelax_diff.d: New testcase.
* ld-avr/relax_diff.d: Likewise.
* ld-avr/relax.s: Likewise.
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