aboutsummaryrefslogtreecommitdiff
path: root/include
AgeCommit message (Expand)AuthorFilesLines
2021-07-26PATCH [6/10] arm: Add -march=armv8.1-m.main+pacbti flagAndrea Corallo1-0/+7
2021-07-26PATCH [5/10] arm: Extend again arm_feature_set struct to provide more bitsAndrea Corallo1-4/+16
2021-07-08elf: Add GNU_PROPERTY_1_NEEDED checkH.J. Lu1-4/+19
2021-07-08elf: Add GNU_PROPERTY_1_NEEDEDH.J. Lu1-0/+7
2021-07-08ld: Limit cache size and add --max-cache-size=SIZEH.J. Lu1-0/+7
2021-07-06RISC-V: Add PT_RISCV_ATTRIBUTES and add it to PHDR.Kito Cheng1-0/+5
2021-07-03Add markers for 2.37 branchNick Clifton1-0/+4
2021-07-03Synchronize libiberty sources (and include/demangle.h) with GCC master versionNick Clifton2-0/+12
2021-07-01opcodes: constify aarch64_opcode_tablesMike Frysinger2-1/+5
2021-07-01arm: don't treat XScale features as part of the FPU [PR 28031]Richard Earnshaw2-1/+6
2021-06-29sim: callback: add printf attributesMike Frysinger2-4/+13
2021-06-24sim: callback: extend syscall interface to handle 7 argsMike Frysinger2-1/+6
2021-06-23sim: callback: add a kill interfaceMike Frysinger2-0/+5
2021-06-22sim: callback: add a getpid interfaceMike Frysinger2-0/+5
2021-06-18elf: Add GNU_PROPERTY_UINT32_AND_XXX/GNU_PROPERTY_UINT32_OR_XXXH.J. Lu2-0/+17
2021-06-15Allow readelf to recognise GO buildid notes.Nick Clifton2-0/+5
2021-06-02arc: Construct disassembler options dynamicallyShahab Vahedi2-0/+5
2021-05-29MIPS/opcodes: Properly handle ISA exclusionMaciej W. Rozycki2-19/+24
2021-05-29MIPS/opcodes: Factor out ISA matching against flagsMaciej W. Rozycki2-4/+27
2021-05-29MIPS/opcodes: Do not use CP0 register names for control registersMaciej W. Rozycki2-2/+15
2021-05-29MIPS/opcodes: Free up redundant `g' operand codeMaciej W. Rozycki2-2/+6
2021-05-28x86: Restore PC16 relocation overflow checkH.J. Lu2-1/+5
2021-05-26x86: Propery check PC16 reloc overflow in 16-bit mode instructionsH.J. Lu2-0/+6
2021-05-23elf: Use official name LoongArch for EM_LOONGARCH.Chenghua Xu2-1/+6
2021-05-21[AArch64] MTE corefile supportLuis Machado2-0/+11
2021-05-14sim: callback: convert FS interfaces to 64-bitMike Frysinger2-3/+8
2021-05-14sim: callback: convert time interface to 64-bitMike Frysinger2-1/+8
2021-05-14sim: callback: inline PTR defineMike Frysinger2-3/+8
2021-05-14sim: callback: use ATTRIBUTE_NORETURNMike Frysinger2-5/+5
2021-05-14sim: callback: always include necessary headersMike Frysinger2-4/+4
2021-05-14sim: create header namespaceMike Frysinger4-5/+14
2021-05-07Fix .dwsect generation for XCOFF. Handle .function generated with DWARF on X...Cl?ment Chigot3-0/+10
2021-05-07libiberty: add htab_eq_stringTom Tromey1-0/+3
2021-05-06or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha()Stafford Horne2-0/+6
2021-05-06libctf, include: support an alternative encoding for nonrepresentable typesNick Alcock3-1/+9
2021-04-22Harmonize and improve auxiliary entries support for XCOFFCl?ment Chigot4-101/+117
2021-04-21Extend the description of PE header flags.Eli Zaretskii2-0/+8
2021-04-16PR27567, Linking PE files adds alignment section flags to executablesAlan Modra5-8/+25
2021-04-09PowerPC disassembly of pcrel referencesAlan Modra2-0/+8
2021-04-06Return symbol from symbol_at_address_funcAlan Modra2-5/+10
2021-04-01Remove strneq macro and use startswith.Martin Liska2-1/+4
2021-03-31Use bool in includeAlan Modra12-77/+89
2021-03-31Remove bfd_stdint.hAlan Modra7-11/+17
2021-03-29TRUE/FALSE simplificationAlan Modra2-7/+11
2021-03-29opcodes int vs bfd_boolean fixesAlan Modra2-1/+5
2021-03-25include: always do unsigned left-shift in CTF_SET_STIDNick Alcock2-8/+15
2021-03-24AArch64: Add MTE register set support for GDB and gdbserverLuis Machado1-0/+3
2021-03-19elf: Rename EM_INTEL205 to EM_INTELGTH.J. Lu2-1/+6
2021-03-16Fix a potential buffer overrun qwhen writing out PE aux entries.Nick Clifton2-2/+7
2021-03-16RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructionsKuan-Lin Chen3-0/+112
generated by cgit v1.1 at 2024-07-14 14:12:43 +0000