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2020-07-04Add markers for binutils 2.35 branchNick Clifton1-0/+4
2020-06-30RISC-V: Support debug and float CSR as the unprivileged ones.Nelson Chu3-24/+49
2020-06-30RISC-V: Cleanup the include/opcode/riscv-opc.h.Nelson Chu2-33/+30
2020-06-29C++ commentsAlan Modra4-7/+13
2020-06-26libctf, binutils: support CTF archives like objdumpNick Alcock2-0/+8
2020-06-26m68k: tag floating-point ABI usedPat Bernardi2-1/+18
2020-06-25Remove the use of the register keyword in the libiberty.h header file - it is...Nick Clifton2-3/+8
2020-06-24Sync config, include and libiberty with GCCH.J. Lu3-1/+23
2020-06-22aarch64: Normalize and sort feature bit macrosAlex Coplan2-64/+97
2020-06-22Recognize some new Mach-O load commandsSaagar Jha2-0/+7
2020-06-22RISC-V: Report warning when linking the objects with different priv specs.Nelson Chu2-4/+6
2020-06-15xtensa: allow runtime ABI selectionMax Filippov2-0/+7
2020-06-15gold, ld: Implement -z start-stop-visibility=... option.Roland McGrath2-2/+9
2020-06-12RISC-V: Drop the privileged spec v1.9 support.Nelson Chu3-219/+225
2020-06-11[PATCH]: aarch64: Refactor representation of system registersAlex Coplan2-0/+9
2020-06-11asan: readelf: process_mips_specific buffer overflowAlan Modra2-9/+14
2020-06-06Rename PowerPC64 pcrel GOT TLS relocationsAlan Modra2-5/+13
2020-06-04opcodes: discriminate endianness and insn-endianness in CGEN portsJose E. Marchesi2-2/+7
2020-06-04opcodes: support insn endianness in cgen_cpu_openJose E. Marchesi2-1/+13
2020-06-03RISC-V: Fix the error when building RISC-V linux native gdbserver.Nelson Chu2-3/+8
2020-05-28PR26044, Some targets can't be compiled with GCC 10 (tilepro)Alan Modra2-3/+7
2020-05-27ld: Add --warn-textrel and obsolete --warn-shared-textrelH.J. Lu2-5/+22
2020-05-25ELF: Updated comments for ET_EXEC and ET_DYNH.J. Lu2-2/+7
2020-05-20[PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...Nelson Chu3-261/+344
2020-05-19Fix the ARM assembler to generate a Realtime profile for armv8-r.Alexander Fedotov2-1/+7
2020-05-11Power10 Reduced precision outer product operationsAlan Modra2-13/+21
2020-05-11PowerPC Rename powerxx to power10Alan Modra3-3/+8
2020-04-30AArch64: add GAS support for UDF instructionAlex Coplan2-0/+6
2020-04-23arc: Add support for ARC HS extra registers in core filesAnton Kolesov2-0/+6
2020-04-22xtensa: fix PR ld/25861Max Filippov2-0/+12
2020-04-21Remove SH-5 remnantsAlan Modra2-21/+5
2020-04-15Unify the behaviour of ld.bfd and ld.gold with respect to warning about unres...Fangrui Song2-3/+12
2020-04-14Fixes for the magic number used in PDP11 AOUT binaries.Stephen Casner2-1/+9
2020-04-02coff-go32-exe: support variable-length stubsJan W. Jagersma3-48/+7
2020-04-01include: Sync plugin-api.h with GCCMartin Liska2-1/+7
2020-03-30RISC-V: Update CSR to privileged spec 1.11.Nelson Chu2-6/+23
2020-03-26Support AT_BSDFLAGS on FreeBSD.John Baldwin2-0/+5
2020-03-24include: Sync plugin-api.h with GCCMartin Liska2-2/+68
2020-03-21include: Sync lto-symtab.h and plugin-api.h with GCCMartin Liska3-2/+8
2020-03-19Include: Sync lto-symtab.h and plugin-api.h with GCCMartin Liska3-2/+56
2020-03-14Implement NT_NETBSDCORE_LWPSTATUS (NetBSD-Core)Kamil Rytarowski2-1/+6
2020-03-13Register NT_NETBSDCORE_AUXV (NetBSD-Core)Kamil Rytarowski2-0/+5
2020-03-13Add support for non-contiguous memory regionsChristophe Lyon2-0/+13
2020-03-13Fix several mix up between octets and bytes in ELF program headersChristian Eggers3-5/+15
2020-03-13Fix several mix up between octets and bytes in ELF program headersChristian Eggers2-12/+19
2020-03-10ubsan: som: left shift of 1 by 31 placesAlan Modra3-5/+11
2020-03-03Add missing AT tags to the ELF common header.Luis Machado2-0/+22
2020-02-25Merge upstream GCC changes for include/ and libiberty/ directoriesAndrew Burgess2-2/+10
2020-02-20RISC-V: Support the ISA-dependent CSR checking.Nelson Chu2-244/+249
2020-02-10[binutils][arm] arm support for ARMv8.m Custom Datapath ExtensionMatthew Malcomson2-0/+22