| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2015-01-28 | FT32 initial support | Alan Modra | 1 | -0/+4 |
| 2015-01-16 | S/390: Add support for IBM z13. | Andreas Krebbel | 1 | -0/+4 |
| 2015-01-02 | ChangeLog rotatation and copyright year update | Alan Modra | 1 | -1/+5 |
| 2014-12-27 | Limit moxie sto/ldo offsets to 16 bits | Anthony Green | 1 | -0/+5 |
| 2014-12-06 | Add Visium support to opcodes | Eric Botcazou | 1 | -0/+4 |
| 2014-11-28 | Remove broken nios2 assembler dwim support. | Sandra Loosemore | 1 | -0/+6 |
| 2014-11-06 | Add mach parameter to nios2_find_opcode_hash. | Sandra Loosemore | 1 | -0/+5 |
| 2014-10-23 | Refactoring/cleanup of nios2 opcodes and assembler code. | Sandra Loosemore | 1 | -0/+50 |
| 2014-10-17 | opcodes, elf: annotate instructions with HWCAP2_VIS3B. | Jose E. Marchesi | 1 | -0/+4 |
| 2014-10-09 | This is a series of patches that add support for the SPARC M7 cpu to | Jose E. Marchesi | 1 | -0/+20 |
| 2014-09-16 | NDS32/opcodes: Add audio ISA extension and modify the disassemble implemnt. | Kuan-Lin Chen | 1 | -0/+4 |
| 2014-09-15 | Add support for MIPS R6. | Andrew Bennett | 1 | -0/+20 |
| 2014-09-03 | [PATCH/AArch64] Implement LSE feature | Jiong Wang | 1 | -0/+8 |
| 2014-08-26 | MIPS: Make the CODE10 operand code consistent between ISAs | Maciej W. Rozycki | 1 | -0/+5 |
| 2014-07-29 | [MIPS] Rename COPROC related macros | Matthew Fortune | 1 | -0/+7 |
| 2014-07-01 | Add support for the AVR Tiny series of microcontrollers. | Barney Stratford | 1 | -0/+12 |
| 2014-05-20 | Fix MSP430 assembler to support #hi(<symbol>). | Nick Clifton | 1 | -0/+4 |
| 2014-05-07 | Add MIPS r3 and r5 support. | Andrew Bennett | 1 | -0/+24 |
| 2014-05-01 | include/opcode/ | Richard Sandiford | 1 | -0/+4 |
| 2014-04-22 | Remove support for the (deprecated) openrisc and or32 configurations and replace | Christian Svensson | 1 | -0/+4 |
| 2014-03-05 | Update copyright years | Alan Modra | 1 | -1/+5 |
| 2013-12-16 | Range of element index is too large on MIPS MSA element selection instructions. | Andrew Bennett | 1 | -0/+5 |
| 2013-12-13 | Add support for Andes NDS32: | Kuan-Lin Chen | 1 | -0/+5 |
| 2013-12-07 | strip off +x bits on non-executable/script files | Mike Frysinger | 1 | -0/+4 |
| 2013-11-20 | gas/testsuite/ | Yufeng Zhang | 1 | -0/+5 |
| 2013-11-18 | Add support for armv7ve to gas. | Yufeng Zhang | 1 | -0/+6 |
| 2013-11-18 | Revert "Add support for AArch64 trace unit registers." | Yufeng Zhang | 1 | -0/+9 |
| 2013-11-15 | gas/ | Yufeng Zhang | 1 | -0/+5 |
| 2013-11-05 | gas/ | Yufeng Zhang | 1 | -0/+6 |
| 2013-11-05 | gas/ | Yufeng Zhang | 1 | -0/+5 |
| 2013-10-14 | 2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com> | Chao-ying Fu | 1 | -0/+13 |
| 2013-08-23 | PR binutils/15834 | Nick Clifton | 1 | -1/+6 |
| 2013-08-19 | include/opcode/ | Richard Sandiford | 1 | -0/+4 |
| 2013-08-19 | include/opcode/ | Richard Sandiford | 1 | -0/+4 |
| 2013-08-19 | include/opcode/ | Richard Sandiford | 1 | -0/+5 |
| 2013-08-04 | include/opcode/ | Richard Sandiford | 1 | -0/+10 |
| 2013-08-03 | include/opcode/ | Richard Sandiford | 1 | -0/+6 |
| 2013-08-01 | include/opcode/ | Richard Sandiford | 1 | -0/+26 |
| 2013-08-01 | include/opcode/ | Richard Sandiford | 1 | -0/+6 |
| 2013-07-24 | Support Intel MPX | H.J. Lu | 1 | -0/+6 |
| 2013-07-14 | include/opcode/ | Richard Sandiford | 1 | -0/+6 |
| 2013-07-14 | include/opcode/ | Richard Sandiford | 1 | -0/+10 |
| 2013-07-14 | include/opcode/ | Richard Sandiford | 1 | -0/+4 |
| 2013-07-07 | include/opcode/ | Richard Sandiford | 1 | -0/+19 |
| 2013-07-07 | include/opcode/ | Richard Sandiford | 1 | -0/+5 |
| 2013-07-07 | include/opcode/ | Richard Sandiford | 1 | -0/+4 |
| 2013-07-07 | include/opcode/ | Richard Sandiford | 1 | -0/+4 |
| 2013-07-07 | include/opcode/ | Richard Sandiford | 1 | -0/+8 |
| 2013-07-07 | include/opcode/ | Richard Sandiford | 1 | -0/+4 |
| 2013-06-26 | include/opcode/ | Richard Sandiford | 1 | -0/+5 |
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index : rocket-tools/fsf-binutils-gdb.git | |
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