Age | Commit message (Collapse) | Author | Files | Lines |
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This defines the ELF symbol st_other field used to encode the number
of instructions between a function "global entry" and its "local entry",
and adds support related to the local entry offset.
include/elf/
* ppc64.h (STO_PPC64_LOCAL_BIT, STO_PPC64_LOCAL_MASK): Define.
(ppc64_decode_local_entry, ppc64_encode_local_entry): New functions.
(PPC64_LOCAL_ENTRY_OFFSET, PPC64_SET_LOCAL_ENTRY_OFFSET): Define.
bfd/
* elf64-ppc.c (struct ppc_stub_hash_entry): Add "other".
(stub_hash_newfunc): Init new ppc_stub_hash_entry field, and one
we forgot, "plt_ent".
(ppc64_elf_add_symbol_hook): Check ELFv1 objects don't have
st_other bits only valid in ELFv2.
(ppc64_elf_merge_symbol_attribute): New function.
(ppc_type_of_stub): Add local_off param to test branch range.
(ppc_build_one_stub): Adjust destinations for ELFv2 locals.
(ppc_size_one_stub, toc_adjusting_stub_needed): Similarly.
(ppc64_elf_size_stubs): Pass local_off to ppc_type_of_stub.
Set "other" field.
(ppc64_elf_relocate_section): Adjust destination for ELFv2 local
calls.
gas/
* config/tc-ppc.c (md_pseudo_table): Add .localentry.
(ppc_elf_localentry): New function.
(ppc_force_relocation): Force relocs on all branches to localenty
symbols.
(ppc_fix_adjustable): Don't reduce such symbols to section+offset.
binutils/
* readelf.c (get_ppc64_symbol_other): New function.
(get_symbol_other): Use it for EM_PPC64.
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Defines bits in ELF e_flags to differentiate ELFv2 objects from ELFv2,
adds .abiversion directive to explicitly choose the ABI, and code to
check and automatically select ABI.
include/elf/
* ppc64.h (EF_PPC64_ABI): Define.
bfd/
* elf64-ppc.c (abiversion, set_abiversion): New functions.
(ppc64_elf_get_synthetic_symtab): Handle ELFv2 objects without .opd.
(struct ppc_link_hash_table): Add opd_abi.
(ppc64_elf_check_relocs): Check no .opd with ELFv2.
(ppc64_elf_merge_private_bfd_data): New function.
(ppc64_elf_print_private_bfd_data): New function.
(ppc64_elf_tls_setup): Set htab->opd_abi.
(ppc64_elf_size_dynamic_sections): Don't emit OPD related dynamic
tags for ELFv2.
(ppc_build_one_stub): Use R_PPC64_IRELATIVE for ELFv2 ifunc.
(ppc64_elf_finish_dynamic_symbol): Likewise
binutils/
* readelf.c (get_machine_flags): Display ABI version for EM_PPC64.
gas/
* config/tc-ppc.c: Include elf/ppc64.h.
(ppc_abiversion): New variable.
(md_pseudo_table): Add .abiversion.
(ppc_elf_abiversion, ppc_elf_end): New functions.
* config/tc-ppc.h (md_end): Define.
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This changes the behaviour of @h and @ha on PowerPC64 to report errors
on 32-bit overflow. The motivation for this change is that on
PowerPC64, most uses of @h and @ha modifiers and their corresponding
relocations are to build up 32-bit offsets. We'd like to know when
such offsets overflow. Only rarely do people use @h or @ha with the
high 32-bit modifiers to build a 64-bit constant. Those uses will now
need to use two new modifiers, @high and @higha, if the constant isn't
known at assembly time. For now, we won't report overflow at assembly
time..
This also fixes an error when applying some of the HIGHER and HIGHEST
relocations.
include/elf/
* ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New.
(IS_PPC64_TLS_RELOC): Match new tls relocs.
bfd/
* reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA,
BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA,
BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New.
* elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs.
Make all _HA and _HI relocs report signed overflow.
(ppc64_elf_reloc_type_lookup): Handle new relocs.
(must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise.
(dec_dynrel_count, ppc64_elf_relocate_section): Likewise.
(ppc64_elf_relocate_section): Don't apply 0x8000 adjust to
R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST,
R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (SEX16): Don't mask.
(REPORT_OVERFLOW_HI): Define as zero.
(ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
@tprel@high, and @tprel@higha modifiers.
(md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
Handle new relocs.
(md_apply_fix): Similarly.
elfcpp/
* powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs.
(Target_powerpc::Scan::global, local): Likewise.
(Target_powerpc::Relocate::relocate): Likewise. Check for overflow
on all ppc64 @h and @ha relocs.
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There's no real need to emit these always: They're needed only if we
indeed want to emit a localized symbol. Hence defer emission until we
at least did the basic early checks that would lead to no such symbol
getting emitted. This in particular avoids emitting such a symbol in
the majority of (if not all) "ld -r" cases.
I hope my set of cross build tests caught all the test cases needing
adjustment - please forgive if I missed a few.
bfd/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* elflink.c (struct elf_outext_info): Add field file_sym_done.
(bfd_elf_final_link): Initialize new field. Move fake STT_FILE
symbol emission from here ...
(elf_link_output_extsym): ... to here.
gas/testsuite/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* gas/microblaze/relax_size.elf: Drop expectation of no longer
present STT_FILE symbol.
* gas/microblaze/relax_size2.elf: Likewise.
ld/testsuite/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* ld-cris/tls-e-tpoffcomm1.d: Drop expectation of no longer
present STT_FILE symbol.
* ld-mmix/bpo-18.d: Likewise.
* ld-mmix/bpo-22.d: Likewise.
* ld-mmix/greg-6.d: Likewise.
* ld-mmix/greg-7.d: Likewise.
* ld-mmix/loc4.d: Likewise.
* ld-mmix/local1.d: Likewise.
* ld-mmix/local3.d: Likewise.
* ld-mmix/local5.d: Likewise.
* ld-mmix/local7.d: Likewise.
* ld-mmix/loct-1.d: Likewise.
* ld-sh/sh64/abi32.xd: Likewise.
* ld-sh/sh64/abi64.xd: Likewise.
* ld-sh/sh64/cmpct1.xd: Likewise.
* ld-sh/sh64/crange1.rd: Likewise.
* ld-sh/sh64/crange2.rd: Likewise.
* ld-sh/sh64/crange3-cmpct.rd: Likewise.
* ld-sh/sh64/crange3-media.rd: Likewise.
* ld-sh/sh64/crange3.rd: Likewise.
* ld-sh/sh64/crangerel1.rd: Likewise.
* ld-sh/sh64/crangerel2.rd: Likewise.
* ld-sh/sh64/mix1.xd: Likewise.
* ld-sh/sh64/mix2.xd: Likewise.
* ld-sh/sh64/shdl32.xd: Likewise.
* ld-sh/sh64/shdl64.xd: Likewise.
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gdb/
Add changelog entry for my previous commit.
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* gas/mips/micromips@msa-branch.d, gas/mips/msa-branch.d,
gas/mips/msa-branch.s: New.
* gas/mips/mips.exp: Run new tests.
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* config/tc-mips.c (fpr_read_mask): Test MSA registers.
(fpr_write_mask): Test MSA registers.
(can_swap_branch_p): Check fpr write followed by fpr read.
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opcodes/
2013-10-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* arm-dis.c (neon_opcodes): Adjust print string for vshll.
gas/testsuite/
2013-10-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* gas/arm/neon-cov.d: Adjust output.
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* gas/mips/micromips@msa-relax.d, gas/mips/micromips@msa.d,
gas/mips/micromips@msa64.d, gas/mips/msa-relax.d,
gas/mips/msa-relax.l, gas/mips/msa-relax.s,
gas/mips/msa.d, gas/mips/msa.s, gas/mips/msa64.d,
gas/mips/msa64.s: New.
* gas/mips/mips.exp: Run new tests.
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Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
(md_longopts): Add mmsa and mno-msa.
(mips_ases): Add msa.
(RTYPE_MASK): Update.
(RTYPE_MSA): New define.
(OT_REG_ELEMENT): Replace with...
(OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
(mips_operand_token): Replace reg_element with index.
(mips_parse_argument_token): Treat vector indices as separate tokens.
Handle register indices.
(md_begin): Add MSA register names.
(operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
(convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
(match_mdmx_imm_reg_operand): Update accordingly.
(match_imm_index_operand): New function.
(match_reg_index_operand): New function.
(match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
(md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
(md_show_usage): Print -mmsa and -mno-msa.
* doc/as.texinfo: Document -mmsa and -mno-msa.
* doc/c-mips.texi: Document -mmsa and -mno-msa.
Document .set msa and .set nomsa.
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* emultempl/aix.em (_read_file): Close file at end of function.
* gas/all/itbl-test.c (main): Close fas.
* read.c (add_include_dir): Use xrealloc.
* config/tc-score.c (do_macro_bcmp): Initialise inst_main.
* config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
* readelf.c (decode_arm_unwind): Initialise addr structure.
(process_symbol_table): Free lengths.
* srcconv.c (wr_sc): Free info.
* chew.c (perform): Free next.
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opcodes/
* nios2-opc.c (nios2_builtin_reg): Use "sstatus" rather than "ba"
as the primary name of r30.
gas/
* config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
also test/refer to "sstatus". Reformat the warning message.
gas/testsuite/
* gas/nios2/warn_nobreak.l: Update text of warning messages.
* gas/nios2/registers.s: Use "sstatus" rather than "ba"
as the primary name of r30.
* gas/nios2/registers.d: Likewise.
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gas/testsuite/
* gas/i386/mpx.s: Remove bndcl/bndcu/bndcn tests with AX.
* gas/i386/x86-64-mpx.s: Likwise.
* gas/i386/mpx.d: Updated.
* gas/i386/x86-64-mpx.d: Likewise.
opcodes/
* i386-dis.c (intel_operand_size): Move v_bnd_mode alongside the
default case.
(OP_E_register): Move v_bnd_mode alongside m_mode.
* i386-opc.tbl (bndcl, bndcu, bndcn): Split 32- and 64-bit variants.
Drop Reg16 and Disp16. Add NoRex64.
(bndmk, bndmov, bndldx, bndstx): Drop Disp16.
* i386-tbl.h: Re-generate.
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refactored assembler/disassember accordingly.
Testsuite checkout OK.
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* gas/xgate/all_insns.s: Add com macro insn test.
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2013-10-10 Jan Beulich <jbeulich@suse.com>
* tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
swapping for bndmk, bndldx, and bndstx.
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* config/tc-epiphany.c (md_convert_frag): Add missing break
statement.
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* config/tc-mn10200.c (md_convert_frag): Add missing break
statement.
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2013-10-08 Jan Beulich <jbeulich@suse.com>
* tc-i386.c (check_word_reg): Remove misplaced "else".
(check_long_reg): Restore symmetry with check_word_reg.
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2013-10-08 Jan Beulich <jbeulich@suse.com>
* gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
LR/PC check.
gas/testsuite/
2013-10-08 Jan Beulich <jbeulich@suse.com>
* gas/arm/thumb-w-good.s: Add PUSH.W and POP.W tests.
* gas/arm/thumb-w-good.d: Update accordingly.
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for "<foo>a". Issue error messages for unrecognised or corrrupt
size extensions.
* gas/msp430/bad.s: New test: Checks erroneous size extensions.
* gas/msp430/bad.d: New test command file.
* gas/msp430/bad.l: New file: Expected error messages.
* gas/msp430/msp430.exp: Run the new test.
* gas/msp430/msp430x.s: Add "<foo>.a" aliases of "<foo>a"
instructions.
* gas/msp430/msp430x.d: Update expected disassembly.
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* gas/mips/micromips@virt64.d: Fix dmfgc0 and dmtgc0.
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2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
possible.
[gas/testsuite/]
2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gas/arm/thumb2_it.s: Add test for narrow tst.
* gas/arm/thumb2_it.d: Update expected output.
* gas/arm/thumb2_it_auto.d: Likewise.
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gas/
* config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
* doc/c-i386.texi: Add -march=bdver4 option.
gas/testsuite/
* gas/i386/i386.exp: Run bdver4 test cases.
* gas/i386/nops-1-bdver4.d: New.
* gas/i386/arch-10-bdver4.d: New.
* gas/i386/x86-64-nops-1-bdver4.d: New.
* gas/i386/x86-64-arch-2-bdver4.d: New.
opcodes/
* i386-gen.c (cpu_flag_init): Add CPU_BDVER4_FLAGS.
* i386-init.h: Regenerated.
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ppc host match. Support little-endian powerpc linux hosts.
Regenerate binutils configure files.
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2013-09-18 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.24.
gas/
2013-09-18 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.24.
ld/
2013-09-18 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.24.
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(move_data): New variable.
(md_parse_option): Parse -md.
(msp430_section): New function. Catch references to the .bss or
.data sections and generate a special symbol for use by the libcrt
library.
(md_pseudo_table): Intercept .section directives.
(md_longopt): Add -md
(md_show_usage): Likewise.
(msp430_operands): Generate a warning message if a NOP is inserted
into the instruction stream.
* doc/c-msp430.texi (node MSP430 Options): Document -md option.
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* config/tc-mips.c (mips_elf_final_processing): Set
EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
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* s390-opc.txt (clih): Make the immediate unsigned.
gas/testsuite/
* gas/s390/zarch-z196.s, gas/s390/zarch-z196.d: Test CLIH with
4000000000.
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The existing code would accept VLD2.64 and similar undefined
instructions.
gas/ChangeLog:
2013-09-16 Will Newton <will.newton@linaro.org>
* config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
disallowing element size 64 with interleave other than 1.
gas/testsuite/ChangeLog:
2013-09-16 Will Newton <will.newton@linaro.org>
* gas/arm/neon-ldst-es.d: Add VLD1.64 instructions.
* gas/arm/neon-ldst-es.s: Likewise.
* testsuite/gas/arm/neon-ldst-es-bad.d: New file.
* testsuite/gas/arm/neon-ldst-es-bad.l: Likewise.
* testsuite/gas/arm/neon-ldst-es-bad.s: Likewise.
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* gas/mips/bltzal.s: New file.
* gas/mips/bltzal.l: New file.
* gas/mips/mips.exp: Run the bltzal test.
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* config/tc-mips.c (match_insn): Set error when $31 is used for
bltzal* and bgezal*.
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precision parameter.
(dwarf_vmatoa): New wrapper for dwarf_vmatoa_1.
(print_dwarf_vma): Use dwarf_vmatoa_1.
(SAFE_BYTE_GET): Add check that VAL is big enough to contain
AMOUNT bytes.
(process_debug_info): Use an unsigned int for the offset size.
(process_debug_pubnames): Likewise.
(display_debug_aranges): Likewise.
(struct Frame_Chunk): Use dwarf_vma type for pc_begin and pc_range
fields.
(frame_display_row): Use print_dwarf_vma to display dwarf_vma
values.
(display_debug_frames): Likewise.
* binutils-all/x86-64/compressed-1a.d: Update expected output to
allow for 64-bit addresses.
* ld-elf/eh1.d: Update expected output to allow for
64-bit addresses.
* ld-elf/eh2.d: Likewise.
* ld-elf/eh3.d: Likewise.
* ld-elf/eh4.d: Likewise.
* ld-elf/eh5.d: Likewise.
* ld-elf/eh6.d: Likewise.
* ld-mips-elf/eh-frame1-n64.d: Likewise.
* ld-mips-elf/eh-frame2-n64.d: Likewise.
* ld-mips-elf/eh-frame3.d: Likewise.
* gas/cfi/cfi-alpha-1.d: Update expected output to allow for
64-bit addresses.
* gas/cfi/cfi-alpha-3.d: Likewise.
* gas/cfi/cfi-arm-1.d: Likewise.
* gas/cfi/cfi-common-1.d: Likewise.
* gas/cfi/cfi-common-2.d: Likewise.
* gas/cfi/cfi-common-3.d: Likewise.
* gas/cfi/cfi-common-4.d: Likewise.
* gas/cfi/cfi-common-5.d: Likewise.
* gas/cfi/cfi-common-6.d: Likewise.
* gas/cfi/cfi-common-7.d: Likewise.
* gas/cfi/cfi-hppa-1.d: Likewise.
* gas/cfi/cfi-i386-2.d: Likewise.
* gas/cfi/cfi-i386.d: Likewise.
* gas/cfi/cfi-m68k.d: Likewise.
* gas/cfi/cfi-mips-1.d: Likewise.
* gas/cfi/cfi-ppc-1.d: Likewise.
* gas/cfi/cfi-s390-1.d: Likewise.
* gas/cfi/cfi-s390x-1.d: Likewise.
* gas/cfi/cfi-sh-1.d: Likewise.
* gas/cfi/cfi-sparc-1.d: Likewise.
* gas/cfi/cfi-sparc64-1.d: Likewise.
* gas/cfi/cfi-x86_64.d: Likewise.
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* config/tc-ppc.c (md_apply_fix): Handle defined after use toc
symbols.
gas/testsuite/
* gas/ppc/aix.exp: Run xcoff-toc-1 test.
* gas/ppc/xcoff-toc-1.s, gas/ppc/xcoff-toc-1.d: New test.
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* config/tc-arm.c (T16_32_TAB): Add _udf.
(do_t_udf): New function.
(insns): Add "udf".
* gas/arm/udf-bad.s: New file.
* gas/arm/udf-bad.d: New file.
* gas/arm/udf-bad.l: New file.
* gas/arm/udf.s: New file.
* gas/arm/udf.d: New file.
* gas/arm/udf.l: New file.
* arm-dis.c (arm_opcodes): Add udf.
(thumb_opcodes): Use "udf" mnemonic rather than UNDEFINED_INSTRUCTION.
(thumb32_opcodes): Add udf.w.
(print_insn_thumb32): Handle %H as the thumb32_opcodes comment says.
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immediate is not suitable for the 32-bit ABI.
* gas/aarch64/illegal.s: Add illegal constant for logical
operation.
* gas/aarch64/illegal.l: Add expected error message.
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assembler errors at correct position.
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* micromips-opc.c (micromips_opcodes): Use RD_4 for "alnv.ps",
replacing NODS.
gas/testsuite/
* gas/testsuite/gas/mips/micromips-insn32.d: Adjust for delay
slot scheduling of ALNV.PS.
* gas/testsuite/gas/mips/micromips-noinsn32.d: Likewise.
* gas/testsuite/gas/mips/micromips-trap.d: Likewise.
* gas/testsuite/gas/mips/micromips.d: Likewise.
* gas/testsuite/gas/mips/micromips@alnv_ps-swap.d: Likewise.
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Fix typos:
---
bfd/bfdio.c | 2 +-
bfd/elf32-spu.c | 2 +-
bfd/elfnn-aarch64.c | 2 +-
binutils/od-xcoff.c | 2 +-
config/tcl.m4 | 2 +-
gas/config/tc-ia64.c | 2 +-
gas/config/tc-sparc.c | 2 +-
gas/config/tc-z80.c | 12 ++++++------
gas/doc/c-i386.texi | 6 +++---
gas/doc/c-m32r.texi | 2 +-
gas/testsuite/gas/d10v/instruction_packing.d | 2 +-
gas/testsuite/gas/z80/atend.d | 2 +-
gold/object.h | 2 +-
include/gdb/remote-sim.h | 2 +-
include/opcode/ChangeLog | 2 +-
include/opcode/i960.h | 2 +-
ld/testsuite/ld-mips-elf/mips16-pic-1.inc | 2 +-
opcodes/aarch64-asm.c | 2 +-
opcodes/aarch64-dis.c | 2 +-
opcodes/msp430-dis.c | 2 +-
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NEON vector load and store instructions do not accept immediates
or pre-indexed base plus offset addressing modes, so make sure that
the assembler enforces this.
gas/ChangeLog:
2013-08-23 Will Newton <will.newton@linaro.org>
* config/tc-arm.c (do_neon_ldx_stx): Add extra constraints
for pre-indexed addressing modes.
* testsuite/gas/arm/neon-addressing-bad.l: Add test for
VLDn and VSTn instructions.
* testsuite/gas/arm/neon-addressing-bad.s: Likewise.
gas/testsuite/ChangeLog:
2013-08-23 Will Newton <will.newton@linaro.org>
* testsuite/gas/arm/neon-addressing-bad.l: Add test for
VLDn and VSTn instructions.
* testsuite/gas/arm/neon-addressing-bad.s: Likewise.
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range check label number for use with fb_low_counter array.
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* config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
(mips_parse_argument_token, validate_micromips_insn, md_begin)
(check_regno, match_float_constant, check_completed_insn, append_insn)
(match_insn, match_mips16_insn, match_insns, macro_start)
(macro_build_ldst_constoffset, load_register, macro, mips_ip)
(mips16_ip, mips_set_option_string, md_parse_option)
(mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
(md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
(s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
(s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
Start error messages with a lower-case letter. Do not end error
messages with a period. Wrap long messages to 80 character-lines.
Use "cannot" instead of "can't" and "can not".
gas/testsuite/
* gas/mips/ase-errors-1.l, gas/mips/ase-errors-2.l,
gas/mips/ase-errors-3.l, gas/mips/ase-errors-4.l, gas/mips/at-2.l,
gas/mips/baddata1.l, gas/mips/elf-rel30.l, gas/mips/illegal.l,
gas/mips/jalr.l, gas/mips/ldstla-32-1.l, gas/mips/ldstla-32-mips3-1.l,
gas/mips/lui-1.l, gas/mips/macro-warn-1.l, gas/mips/macro-warn-1-n32.l,
gas/mips/macro-warn-2.l, gas/mips/macro-warn-3.l,
gas/mips/macro-warn-4.l, gas/mips/micromips-branch-delay.l,
gas/mips/micromips-branch-relax.l,
gas/mips/micromips-branch-relax-pic.l, gas/mips/micromips-ill.l,
gas/mips/micromips.l, gas/mips/micromips-size-0.l,
gas/mips/micromips-size-1.l, gas/mips/micromips-warn-branch-delay.l,
gas/mips/micromips-warn.l, gas/mips/mips16e-64.l,
gas/mips/mips16e-save-err.l, gas/mips/mips1-fp.l,
gas/mips/mips32r2-fp32.l, gas/mips/mips32r2-ill.l,
gas/mips/mips32-sf32.l, gas/mips/mips4-branch-likely.l,
gas/mips/mips4-fp.l, gas/mips/mips5-fp.l, gas/mips/mips64-mips3d.l,
gas/mips/mips-double-float-flag.l, gas/mips/mips-gp64-fp32.l,
gas/mips/mips-gp64-fp64.l, gas/mips/mips-hard-float-flag.l,
gas/mips/mips-macro-ill-nofp.l, gas/mips/mips-macro-ill-sfp.l,
gas/mips/nan-error-1.l, gas/mips/nan-error-2.l, gas/mips/noat-2.l,
gas/mips/noat-3.l, gas/mips/noat-4.l, gas/mips/noat-5.l,
gas/mips/noat-6.l, gas/mips/noat-7.l, gas/mips/octeon-ill.l,
gas/mips/r5900-error-vu0.l, gas/mips/r5900-nollsc.l,
gas/mips/relax-bc1any.l, gas/mips/relax-bposge.l, gas/mips/relax.l,
gas/mips/relax-swap1.l, gas/mips/relax-swap2.l, gas/mips/set-arch.l,
gas/mips/tls-ill.l, gas/mips/vr5400-ill.l: Adjust expected output.
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* config/tc-mips.c (imm_expr): Expand comment.
(set_at, macro, mips16_macro): Expect imm_expr to be O_constant
when populated.
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* mips.h: Remove references to "+I" and imm2_expr.
gas/
* config/tc-mips.c (imm2_expr): Delete.
(md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
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* mips.h (M_DEXT, M_DINS): Delete.
opcodes/
* micromips-opc.c (micromips_opcodes): Replace "dext" and "dins"
macro entries with "dextm", "dextu", "dinsm" and "dinsu" aliases.
Use +H rather than +C for the real "dext".
* mips-opc.c (mips_builtin_opcodes): Likewise.
gas/
* config/tc-mips.c (report_bad_range, report_bad_field): Delete.
(macro): Remove M_DEXT and M_DINS handling.
gas/testsuite/
* gas/mips/ext-ill.l, gas/mips/mips64r2-ill.l: Expect DEXT and DINS
error messages to have the same form as the EXT and INS ones.
* gas/mips/micromips-insn32.d, gas/mips/micromips-noinsn32.d,
gas/mips/micromips-trap.d, gas/mips/micromips.d,
gas/mips/micromips@mips64r2.d, gas/mips/mips64r2.d: Expect
"dext" and "dins" instead of "dextm", "dextu", "dinsm" and "dinsu".
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* config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
lax_max with lax_match.
(match_int_operand): Update accordingly. Don't report an error
for !lax_match-only cases.
(match_insn): Replace more_alts with lax_match and use it to
initialize the mips_arg_info field. Add a complete_p parameter.
Handle implicit VU0 suffixes here.
(match_invalid_for_isa, match_insns, match_mips16_insns): New
functions.
(mips_ip, mips16_ip): Use them.
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* config/tc-mips.c (match_expression): Report uses of registers here.
Add a "must be an immediate expression" error. Handle elided offsets
here rather than...
(match_int_operand): ...here.
gas/testsuite/
* gas/mips/octeon-ill.l: Adjust expected output.
* gas/mips/lui-1.l, gas/mips/lui-1.s: Add more cases.
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