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2020-09-24arm: Add support for Neoverse N2 CPUAlex Coplan3-0/+11
2020-09-24Add support for Intel TDX instructions.Cui,Lili9-1/+62
2020-09-23CSKY: Add objdump option -M abi-names.Cooper Qu7-416/+327
2020-09-23Enable support to Intel Keylocker instructionsTerry Guo14-1/+263
2020-09-21PR26569, R_RISCV_RVC_JUMP results in buffer overflowAlan Modra2-3/+15
2020-09-18bpf: xBPF SDIV, SMOD instructionsDavid Faust6-0/+67
2020-09-18Ensure that space allocated by assembler directives converts from an octet co...Nick Clifton2-1/+7
2020-09-17Tidy gas i386.expAlan Modra2-34/+38
2020-09-16Tidy elf_symbol_fromAlan Modra6-11/+18
2020-09-15PE/x86-64: Display PE relocation namesH.J. Lu3-5/+10
2020-09-15PR26610, ARM's "VFPv3 vldr to vmov" gas testcase failAlan Modra2-19/+28
2020-09-15Fix the assembler's new .nop directive so that the input line pointer is pres...Nick Clifton3-6/+14
2020-09-15Change the /nop directive for the BPF port of the assembler to use the encodi...David Faust2-1/+7
2020-09-14Fix support for theassembler's new ".nop" directive on the IA64 target.Nick Clifton2-0/+3
2020-09-14Add a new ".nop" directive to the assembler to allow the creation of no-op in...Nick Clifton18-39/+165
2020-09-14CSKY: Set feature flags for default cpu.Cooper Qu1-3/+2
2020-09-11gas: Don't error when .debug_line already exists, unless .loc was usedMark Wielaard13-10/+369
2020-09-10CSKY: Enable extend lrw by default for CK802, CK803 and CK860.Cooper Qu2-1/+9
2020-09-10CSKY: Add L2Cache instructions for CK860.Cooper Qu1-1/+1
2020-09-10CSKY: Add new arches while refine the cpu option process.Cooper Qu2-172/+466
2020-09-09power10 on ppc32Alan Modra2-1/+7
2020-09-09CSKY: Change mvtc and mulsw's ISA flag.Cooper Qu2-2/+7
2020-09-09CSKY: Support option -mfloat-abi.Cooper Qu2-0/+67
2020-09-09CSKY: Add FPUV3 instructions, which supported by ck860f.Cooper Qu2-31/+217
2020-09-08MSP430: Support relocations for subtract expressions in .uleb128 directivesJozef Lawrynowicz2-1/+59
2020-09-08aarch64: Add -mcpu option for Cortex-R82Alex Coplan3-1/+8
2020-09-08aarch64: Add support for Armv8-R system registersAlex Coplan9-4/+493
2020-09-08aarch64: Add support for Armv8-R DFB aliasAlex Coplan3-0/+15
2020-09-08aarch64: Add base support for Armv8-RAlex Coplan3-1/+7
2020-09-07gas: Output directory and file names in .debug_line_str for DWARF5Mark Wielaard3-23/+82
2020-09-07gas: Output .debug_rnglists for DWARF 5.Mark Wielaard2-14/+96
2020-09-07gas: Make sure to only add an md5 to a .file when requested.Mark Wielaard3-2/+8
2020-09-03gas: Use DW_FORM_sec_offset for DWARF version 4 or higher.Mark Wielaard2-9/+16
2020-09-02ubsan: expr.c:1725,1741 signed integer overflowAlan Modra2-2/+7
2020-09-02ubsan: tc-z80.c:3656 shift exponent 32 is too largeAlan Modra2-1/+5
2020-09-02ubsan: tc-sparc.c:1146 left shift cannot be representedAlan Modra2-1/+6
2020-09-02ubsan: tc-nios2.c:1403 shift exponent 32 is too largeAlan Modra2-1/+5
2020-09-02ubsan: tc-mips.c:9606 shift exponent 32 is too largeAlan Modra2-2/+9
2020-09-02ubsan: tc-d30v.c left shift cannot be representedAlan Modra2-2/+6
2020-09-02ubsan: rx-parse.y:1743 shift exponent 32 is too largeAlan Modra2-24/+30
2020-09-02ubsan: obj-macho.c:503 left shift cannot be representedAlan Modra2-1/+6
2020-09-02ubsan: bfin-lex.l:503 left shift cannot be representedAlan Modra2-1/+5
2020-09-0232-bit host pdp11 breakageAlan Modra2-0/+7
2020-09-02CSKY: Add CPU CK803r3.Cooper Qu2-17/+27
2020-09-02CSKY: Fix Encode of mulsws.Cooper Qu2-1/+5
2020-09-02CSKY: Refine literals pool dump process and float register parser.Cooper Qu2-3/+58
2020-09-01ELF: Document the .tls_common directiveH.J. Lu2-0/+17
2020-09-01PR26420, PR26421, PR26425, PR26427 UBSAN: tc-arm.c left shiftsAlan Modra2-78/+98
2020-08-31PR26510 UBSAN: tc-z8k.c left shift of negative valueAlan Modra2-8/+15
2020-08-31PR26503 UBSAN: tc-v850.c:1447 left shift cannot be representedAlan Modra2-1/+6
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