aboutsummaryrefslogtreecommitdiff
path: root/gas
AgeCommit message (Expand)AuthorFilesLines
2016-03-09fixup -Wshadow warnings on gcc-4.7Trevor Saunders2-17/+25
2016-03-08[ARC] Allow non-instruction relocations within .text sectionsClaudiu Zissulescu3-0/+16
2016-03-07[ARM] Add support for Cortex-R8Thomas Preud'homme3-0/+9
2016-03-07Add const qualifiers at various places.Trevor Saunders16-147/+154
2016-03-04[ARM] Build attributes for ARMv8.1-A AdvSIMDMatthew Wahab4-1/+46
2016-03-04[ARM] Add feature check for ARMv8.1 AdvSIMD instructions.Matthew Wahab7-48/+255
2016-03-02Adjust testsuite/gas/i386/x86_64-intel.d for COFFH.J. Lu2-1/+5
2016-02-29[ARC] Local symbols relocation cleanupClaudiu Zissulescu6-37/+66
2016-02-29[ARC] General fixes.Claudiu Zissulescu2-1/+5
2016-02-26Add aarch64-*-rtems* targetJoel Sherrill1-1/+1
2016-02-26Add ChangeLog entries for PR ld/19645H.J. Lu1-0/+38
2016-02-26Properly implement STT_COMMONH.J. Lu20-8/+342
2016-02-25Convert more variables to a constant form.Trevor Saunders42-135/+205
2016-02-25gas: Update tests for big-endian arc targetsAndrew Burgess4-3/+10
2016-02-24[GAS][ARM][3/3]Add armv8.2 fp16 scalar instruction support. Based on SE_H ins...Renlin Li8-39/+801
2016-02-24[GAS][ARM][2/3]Add SE_H shape to represent fp16 type.Renlin Li2-7/+86
2016-02-24[OPCODES][ARM][1/3]Add armv8.2 fp16 instruction dissembler support.Renlin Li3-3/+8
2016-02-24[OPCODES][ARM]Fix mask for a few coprocessor opcodes.Renlin Li3-0/+50
2016-02-24[OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr/mcr2, mrc/mrc2, ldc/ldc2,...Renlin Li3-2/+8
2016-02-24[ARM][gas] Add support for Cortex-A32Kyrylo Tkachov3-0/+8
2016-02-24[ARM][doc] Document cortex-a17 mcpu optionKyrylo Tkachov2-0/+5
2016-02-23Skip tests for common directive on hpuxH.J. Lu2-2/+10
2016-02-22Add more const type qualifiers to GAS sources.Trevor Saunders46-189/+315
2016-02-21Set BFD compression bits in write_object_fileH.J. Lu2-3/+13
2016-02-20[i386] Check RegVRex in register_numberH.J. Lu5-0/+17
2016-02-19Fix snafu - add missing const declaration to 'string' local variable in s_sta...Nick Clifton1-1/+2
2016-02-19[ARM] Add FP16 feature extension for ARMv8.2 architectureJiong Wang2-0/+12
2016-02-19Prevent seg-fault in gas reading a binary input file.Nick Clifton2-0/+11
2016-02-19Change the return type of the rebuffer_line function to void.Trevor Saunders2-9/+8
2016-02-19Add const to various variables in the gas sources.Trevor Saunders7-26/+46
2016-02-18Avoid setting or recording negative alignments when the target stores multipl...Dan Gisselquist5-104/+160
2016-02-17xtensa: fix .init/.fini literals movingMax Filippov5-2/+65
2016-02-17Update list of known MSP430 MCUs.Nick Clifton2-1/+20
2016-02-16[ARC] Enable .cfi_* pseudo-ops.Claudiu Zissulescu7-1/+98
2016-02-16Remove documentation of deleted function S_IS_EXTERN.Trevor Saunders2-4/+4
2016-02-16Fix formatting problems caused by previous update to as.texinfo.Nick Clifton2-6/+16
2016-02-16[PR19620][GAS][AArch64]Remove mov[z,k,n] relocation symbol name restriction.Renlin Li4-9/+40
2016-02-15Fix typos in gas/ChangeLogH.J. Lu1-2/+2
2016-02-15Fix changelog entry for previous delta.Nick Clifton1-2/+2
2016-02-15Correct opcode generated for RX indirect MOVs without an offset.Vinay Kumar G6-6/+72
2016-02-15Enhance GAS's .section directive so that it can take numeric values for the f...Nick Clifton11-20/+174
2016-02-11Allow the .cfi_sections directive to be reissued provided that CFI generation...Nick Clifton5-2/+38
2016-02-10Add support for ARC instruction relaxation in the assembler.Claudiu Zissulescu14-957/+1622
2016-02-08FIx formatting that triggers a new compile time warning message.Nick Clifton2-2/+7
2016-02-04Remove support for creating ARM NOREAD sections.Nick Clifton7-91/+10
2016-02-04Fix the encoding of the MSP430's RRUX instruction.Nick Clifton4-87/+51
2016-02-03xtensa: fix signedness of gas relocationsMax Filippov5-3/+31
2016-02-03Add -mrelax-relocations= to x86 assemblerH.J. Lu18-5/+215
2016-02-03msp430: Set DWARF2_ADDR_SIZE to 4.Kevin Buettner2-0/+6
2016-02-03Mention -mfence-as-lock-add=yes for x86 assemblerH.J. Lu2-0/+8