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2019-04-11[BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructionsSudakshina Das6-33/+45
2019-04-11[BINUTILS, AArch64, 1/2] Add new LDGM/STGM instructionSudakshina Das5-0/+39
2019-04-10Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86Rainer Orth21-0/+426
2019-04-10te-cloudabi.hAlan Modra5-6/+41
2019-04-09[MIPS] Add RDHWR with the SEL field for MIPS R6.Robert Suchanek4-0/+71
2019-04-08x86: Define GNU_PROPERTY_X86_ISA_1_AVX512_BF16H.J. Lu5-2/+13
2019-04-08x86: Remove i386-*-kaos* and i386-*-chaos targetsH.J. Lu3-4/+6
2019-04-05x86: Add assembler -mx86-used-note=yes testH.J. Lu5-0/+59
2019-04-05x86: Support Intel AVX512 BF16Xuepeng Guo16-1/+499
2019-04-05PowerPC conditional branch testAlan Modra9-0/+421
2019-04-05PowerPC disassembler: Don't emit trailing spacesAlan Modra13-56/+71
2019-04-04Add extended mnemonics for bctar. Fix setting of 'at' branch hints.Peter Bergner5-24/+286
2019-04-03gas: use literals/const16 for xtensa loop relaxationMax Filippov3-142/+65
2019-04-01[GAS, Arm] CLI with architecture sensitive extensionsAndre Vieira41-46/+2843
2019-03-28PR24390, Don't decode mtfsb field as a cr fieldAlan Modra3-8/+14
2019-03-21Remove strip_underscore from struct emulationAlan Modra3-6/+7
2019-03-21Teach a few targets to resolve BFD_RELOC_8Alan Modra6-46/+38
2019-03-19x86: Correct EVEX vector load/store optimizationH.J. Lu15-145/+196
2019-03-19x86: Correct EVEX to 128-bit EVEX optimizationH.J. Lu6-33/+200
2019-03-19ix86: Disable AVX512F when disabling AVX2H.J. Lu20-258/+276
2019-03-18Use temp_ilp and restore_ilp in more placesAlan Modra4-11/+8
2019-03-18Fix MRI mode testsuite failuresAlan Modra2-7/+8
2019-03-18x86: Pass -O0 to assembler for some testsH.J. Lu11-6/+23
2019-03-18x86: Optimize EVEX vector load/store instructionsH.J. Lu29-1/+974
2019-03-18x86: Encode 256-bit/512-bit VEX/EVEX insns with 128-bit VEXH.J. Lu6-15/+206
2019-03-17x86: Set optimize to INT_MAX for -OsH.J. Lu6-1/+30
2019-03-17x86: Correctly optimize EVEX to 128-bit VEX/EVEXH.J. Lu12-29/+470
2019-03-15Fix a potential illegal memory access whilt parsing an x86 insn.Li Hao2-32/+42
2019-03-13dwarf2: Align relocation within .debug_line sectionChristian Eggers2-3/+19
2019-03-13dwarf2: Pad size of .debug_line section.Christian Eggers2-0/+15
2019-03-13dwarf2: Use octets for .debug_string offsetsChristian Eggers2-3/+7
2019-03-13dwarf2: Use octets for .debug_line prologueChristian Eggers2-2/+6
2019-03-13dwarf2: Use octets for dwarf2 headersChristian Eggers2-4/+9
2019-03-13Symbols with octets valueChristian Eggers3-1/+49
2019-03-13dwarf2: Fix calculation of line info offsetChristian Eggers2-1/+5
2019-03-12Add missing changelogs for previous commits.Andreas Krebbel1-0/+5
2019-03-12S/390: arch13: Adjust to recent changesAndreas Krebbel2-48/+43
2019-02-27Testsuite: Allow multiple lines of "as" in testsuite.Matthew Malcomson7-33/+14
2019-02-24Re: PowerPC __tls_get_addr arg parsingAlan Modra2-0/+6
2019-02-24PR24144, pdp11-ld overwriting section data with zerosAlan Modra2-11/+27
2019-02-22[arm][gas] Add support for Neoverse N1Kyrylo Tkachov3-1/+9
2019-02-22[AArch64][gas] Add support for Neoverse E1Kyrylo Tkachov3-0/+11
2019-02-22[AArch64][gas] Add support for Neoverse N1Kyrylo Tkachov3-0/+11
2019-02-21PowerPC __tls_get_addr arg parsingAlan Modra1-40/+52
2019-02-19Fix a potential deadlock in some older Loongson 3A1000 MIPS processors.Paul Hua7-57/+285
2019-02-10gas: Pass max_bytes to TC_FRAG_INITH.J. Lu17-22/+52
2019-02-08Add missing ChangeLog files for previous patch.Jim Wilson1-0/+5
2019-02-08RISC-V: Compress 3-operand beq/bne against x0.Jim Wilson1-0/+6
2019-02-07Arm: Backport hlt to all architectures.Tamar Christina5-1/+79
2019-02-07AArch64: Add negative tests for Armv8.3-a complex number instructions instruc...Tamar Christina3-0/+131