Age | Commit message (Expand) | Author | Files | Lines |
2018-11-21 | S12Z: Add alias instructions BHS and BLO. | John Darrington | 1 | -0/+2 |
2018-11-13 | [ARM] Improve indentation of ARM architecture declarations | Thomas Preud'homme | 1 | -51/+51 |
2018-11-12 | [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension | Sudakshina Das | 1 | -3/+17 |
2018-11-12 | [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten... | Sudakshina Das | 1 | -0/+6 |
2018-11-12 | [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex... | Sudakshina Das | 1 | -0/+2 |
2018-11-12 | [BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-A | Sudakshina Das | 1 | -0/+2 |
2018-11-09 | S/390: Fix optional operand handling after memory addresses | Andreas Krebbel | 1 | -24/+23 |
2018-11-09 | PowerPC, don't use bfd reloc howto in md_assemble | Alan Modra | 1 | -11/+249 |
2018-11-07 | rx: Add target rx-*-linux. | Yoshinori Sato | 1 | -0/+4 |
2018-11-06 | [arm] Check for neon and condition in vcvt.f16.f32 | Matthew Malcomson | 1 | -0/+2 |
2018-11-06 | PowerPC instruction mask checks | Alan Modra | 1 | -14/+23 |
2018-11-06 | PowerPC instruction operand flag validation | Alan Modra | 1 | -0/+9 |
2018-11-06 | x86: adjust {,E}VEX.W handling outside of 64-bit mode | Jan Beulich | 1 | -2/+2 |
2018-11-05 | x86: Disable GOT relaxation with data prefix | H.J. Lu | 1 | -6/+7 |
2018-10-29 | Move struc-symbol.h to symbols.c | Alan Modra | 20 | -116/+75 |
2018-10-28 | PR23837, Segmentation fault in resolve_symbol_value | Alan Modra | 1 | -2/+1 |
2018-10-23 | S/390: Support vector alignment hints | Andreas Krebbel | 1 | -0/+15 |
2018-10-23 | S12Z: Handle 16 bit fixups which are constant. | John Darrington | 1 | -0/+3 |
2018-10-22 | Apply alpha BFD_RELOC_8 fixups | Alan Modra | 1 | -0/+6 |
2018-10-20 | PR23800, .eqv doesn't always defer expression evaluation | Alan Modra | 1 | -1/+16 |
2018-10-19 | This set of changes clarifies the conditions for the R5900 short loop fix and... | Fredrik Noring | 1 | -5/+17 |
2018-10-10 | x86: fold Size{16,32,64} template attributes | Jan Beulich | 1 | -6/+6 |
2018-10-09 | [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS | Sudakshina Das | 1 | -0/+2 |
2018-10-09 | [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction | Sudakshina Das | 1 | -0/+52 |
2018-10-09 | [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions | Sudakshina Das | 1 | -0/+2 |
2018-10-09 | [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions | Sudakshina Das | 1 | -0/+17 |
2018-10-09 | [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A | Sudakshina Das | 1 | -0/+2 |
2018-10-09 | [PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal fea... | Sudakshina Das | 1 | -0/+1 |
2018-10-05 | [Arm, 3/3] Add Execution and Data Prediction instructions for AArch32 | Sudakshina Das | 1 | -0/+13 |
2018-10-05 | [Arm, 2/3] Add instruction SB for AArch32 | Sudakshina Das | 1 | -0/+12 |
2018-10-05 | [Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32 | Sudakshina Das | 1 | -0/+2 |
2018-10-05 | or1k: Add the l.adrp insn and supporting relocations | Stafford Horne | 1 | -0/+6 |
2018-10-03 | AArch64: Close sequences at the end of sections | Tamar Christina | 2 | -0/+21 |
2018-10-03 | AArch64: Add SVE constraints verifier. | Tamar Christina | 1 | -2/+4 |
2018-10-03 | AArch64: Wire through instr_sequence | Tamar Christina | 2 | -8/+23 |
2018-09-25 | S/390: Fix symbolic displacement in lay | Andreas Krebbel | 1 | -1/+1 |
2018-09-20 | S12Z/GAS: Correct a signed vs unsigned comparison error with GCC 4.1 | Maciej W. Rozycki | 1 | -11/+13 |
2018-09-20 | PPC/GAS: Correct a signed vs unsigned comparison error with GCC 4.1 | Maciej W. Rozycki | 1 | -1/+1 |
2018-09-20 | ARC: Fix build errors with large constants and C89 | Maciej W. Rozycki | 1 | -2/+2 |
2018-09-20 | Andes Technology has good news for you, we plan to update the nds32 port of b... | Nick Clifton | 2 | -1626/+2847 |
2018-09-18 | Fix Aarch64 bug in warning filtering. | Tamar Christina | 1 | -1/+1 |
2018-09-17 | x86: Add -mvexwig=[0|1] option to assembler | H.J. Lu | 1 | -11/+34 |
2018-09-14 | x86: Support VEX/EVEX WIG encoding | H.J. Lu | 1 | -17/+14 |
2018-09-14 | csky: Support PC relative diff relocation | Lifang Xia | 2 | -0/+9 |
2018-09-14 | x86: fold CRC32 templates | Jan Beulich | 1 | -11/+7 |
2018-09-13 | x86: Swap destination/source to encode VEX only if possible | H.J. Lu | 1 | -3/+4 |
2018-09-13 | x86: also allow D on 3-operand insns | Jan Beulich | 1 | -19/+22 |
2018-09-13 | x86: use D attribute also for SIMD templates | Jan Beulich | 1 | -9/+25 |
2018-09-13 | x86: improve operand reversal | Jan Beulich | 1 | -7/+33 |
2018-09-13 | x86: add code comment on deprecated status of pseudo-suffixes | Jan Beulich | 1 | -1/+2 |