Age | Commit message (Collapse) | Author | Files | Lines |
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2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_is_register): Removed.
(x86_cons): Don't use i386_is_register.
(parse_register): Likewise.
* config/tc-i386-intel.c (i386_intel_simplify): Likewise.
(i386_intel_operand): Likewise.
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2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (tc_x86_parse_to_dw2regnum): Don't use
i386_is_register.
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2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_is_register): Remove is_intel_syntax.
(x86_cons): Updated.
(parse_register): Likewise.
(tc_x86_parse_to_dw2regnum): Likewise.
* config/tc-i386-intel.c (i386_intel_simplify): Likewise.
(i386_intel_operand): Likewise.
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gas/
2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11509
* config/tc-i386-intel.c (i386_intel_simplify_register): New.
(i386_intel_simplify): Use i386_is_register and
i386_intel_simplify_register. Set X_md for O_register and
check X_md for O_constant.
(i386_intel_operand): Use i386_is_register.
* config/tc-i386.c (i386_is_register): New.
(x86_cons): Initialize the X_md field. Use i386_is_register.
(parse_register): Use i386_is_register.
(tc_x86_parse_to_dw2regnum): Likewise.
gas/testsuite/
2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11509
* gas/i386/equ.s: Add tests for ".equ symbol, reg + NUM".
* gas/i386/equ.d: Updated.
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* elf32-tic6x.h: New.
* elf-bfd.h (enum elf_target_id): Define TIC6X_ELF_DATA.
* elf32-tic6x.c (struct elf32_tic6x_obj_tdata, elf32_tic6x_tdata,
elf32_tic6x_howto_table_rel, elf32_tic6x_info_to_howto_rel,
elf32_tic6x_set_use_rela_p, elf32_tic6x_mkobject,
elf32_tic6x_new_section_hook, elf32_tic6x_rel_relocation_p,
bfd_elf32_mkobject, bfd_elf32_new_section_hook): New.
(elf32_tic6x_reloc_type_lookup, elf32_tic6x_reloc_name_lookup,
elf32_tic6x_relocate_section): Handle REL relocations.
(elf_info_to_howto_rel): Define to elf32_tic6x_info_to_howto_rel.
gas:
* config/tc-tic6x.c (OPTION_MGENERATE_REL): New.
(md_longopts): Add -mgenerate-rel.
(tic6x_generate_rela): New.
(md_parse_option): Handle -mgenerate-rel.
(md_show_usage): Add comment that -mgenerate-rel is undocumented.
(tic6x_init_after_args): New.
(md_apply_fix): Correct shift calculations for SB-relative
relocations.
(md_pcrel_from): Change to tic6x_pcrel_from_section. Do not
adjust addresses for relocations referencing symbols in other
sections.
(tc_gen_reloc): Adjust addend calculations for REL relocations.
* config/tc-tic6x.h (MD_PCREL_FROM_SECTION,
tic6x_pcrel_from_section, tc_init_after_args,
tic6x_init_after_args): New.
ld/testsuite:
* ld-tic6x/data-reloc-global-rel.d,
ld-tic6x/data-reloc-global-rel.s,
ld-tic6x/data-reloc-local-r-rel.d,
ld-tic6x/data-reloc-local-rel.d, ld-tic6x/mvk-reloc-global-rel.d,
ld-tic6x/mvk-reloc-global-rel.s, ld-tic6x/mvk-reloc-local-1-rel.s,
ld-tic6x/mvk-reloc-local-2-rel.s,
ld-tic6x/mvk-reloc-local-r-rel.d, ld-tic6x/mvk-reloc-local-rel.d,
ld-tic6x/pcrel-reloc-global-rel.d,
ld-tic6x/pcrel-reloc-local-r-rel.d,
ld-tic6x/pcrel-reloc-local-rel.d, ld-tic6x/sbr-reloc-global-rel.d,
ld-tic6x/sbr-reloc-global-rel.s, ld-tic6x/sbr-reloc-local-1-rel.s,
ld-tic6x/sbr-reloc-local-2-rel.s,
ld-tic6x/sbr-reloc-local-r-rel.d, ld-tic6x/sbr-reloc-local-rel.d:
New.
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* config/tc-hppa.c (pa_ip): Do not allow 64-bit add condition
matcher to accept and unconditional 32-bit add instruction.
(pa_build_unwind_subspace): Cope with error conditions not
allowing the start symbol to be set.
* gas/hppa/basic/add2.s: Add test of simple 32-bit instruction.
* gas/hppa/basic/basic.exp (do_add2): Add grep for expected
disassembly.
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output.
* ld/testsuite/ld-arm/attr-merge-3.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likeiwse.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise.
* ld/testsuite/ld-arm/attr-merge.attr: Likewise.
* binutils/readelf.c (arm_attr_tag_FP_arch): Rename from arm_attr_tag_VFP_arch.
(arm_attr_tag_ABI_align8_needed): Remove.
(arm_attr_tag_ABI_align8_preserved): Remove.
(arm_attr_tag_ABI_HardFP_use): Update text strings.
(arm_attr_public_tags): Add strings for ABI v2.08 attribute tags.
(display_arm_attribute): Add decoding of ABI v2.08 attributes.
* include/elf/arm.h (Tag_FP_arch, Tag_ABI_align_needed, Tag_ABI_align_preserved,
Tag_FP_HP_extension): Add new ABI attribute tags.
* gas/config/tc-arm.c (arm_convert_symbolic_attribute): Add support for
new tag names in v2.08 of ARM ABI.
* gas/doc/c-arm.texi: Document new tag names in ABI.
* gas/testsuite/gas/arm/attr-mcpu.d: Update for new attribute tag names.
* gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/testsuite/gas/arm/attr-names.d: Add test to make sure all attribute names
are recognised.
* gas/testsuite/gas/arm/attr-names.s: Likewise.
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* config/tc-alpha.c: Includes vms/egps.h on EVAX.
(s_alpha_comm): Used new EGPS macros from egps.h
(RGPS__V_NO_SHIFT, EGPS__V_MASK): New local macros.
(s_alpha_section_word): Add comments. Use new EGPS macros.
Adjust for modified bfd_vms_set_section_flags function.
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* config/tc-ppc.c (ppc_elf_cons): Clear frag contents.
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* config/tc-avr.c (mcu_types): Add support for atmega16a, atmega168a,
atmega164a, atmega165a, atmega169a, atmega169pa, atmega16hva2,
atmega324a, atmega324pa, atmega325a, atmega3250a, atmega328,
atmega329a, atmega329pa, atmega3290a, atmega48a, atmega644a,
atmega645a, atmega645p, atmega6450a, atmega6450p, atmega649a,
atmega649p, atmega6490a, atmega6490p, atmega64hve, atmega88a,
atmega88pa, attiny461a, attiny84a, m3000.
Remove support for atmega8m1, atmega8c1, atmega16c1, atmega4hvd,
atmega8hvd, attiny327, m3000f, m3000s, m3001b.
* doc/c-avr.texi: Same.
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that multiple mapping symbols have the same value 0.
testsuite/
* gas/arm/mapmisc.s: Test multiple mapping symbols have
the same value 0.
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* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
binutils:
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
gas/testsuite:
* gas/tic6x: New directory and testcases.
include:
* dis-asm.h (print_insn_tic6x): Declare.
include/elf:
* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
* tic6x.h: New.
include/opcode:
* tic6x-control-registers.h, tic6x-insn-formats.h,
tic6x-opcode-table.h, tic6x.h: New.
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
eelf32_tic6x_le.o.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
* NEWS: Add news entry for TI C6X support.
* configure.tgt (tic6x-*-*): New.
* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
ld/testsuite:
* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
* ld-tic6x: New directory and testcases.
opcodes:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
* Makefile.in: Regenerate.
* configure.in (bfd_tic6x_arch): New.
* configure: Regenerate.
* disassemble.c (ARCH_tic6x): Define if ARCH_all.
(disassembler): Handle TI C6X.
* tic6x-dis.c: New.
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2010-03-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
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2010-03-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_error): Replace oprand_size_mismatch
with operand_size_mismatch.
(operand_size_match): Updated.
(match_template): Likewise.
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2010-03-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_error): New.
(_i386_insn): Replace err_msg with error.
(operand_size_match): Set error instead of err_msg on failure.
(operand_type_match): Likewise.
(operand_type_register_match): Likewise.
(VEX_check_operands): Likewise.
(match_template): Likewise. Use error instead of err_msg with
as_bad.
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that two mapping symbols have the same value.
testsuite/
* gas/arm/mapmisc.s: Add the test case for two mapping
symbols having the same value.
* gas/arm/mapmisc.d: Likewise.
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2010-03-15 Wei Guozhi <carrot@google.com>
PR gas/11323
* bfd-in2.h (enum bfd_reloc_code_real): New BFD_RELOC_GOT_PREL type.
* elf32-arm.c (elf32_arm_reloc_map): BFD_RELOC_GOT_PREL to
R_ARM_GOT_PREL map.
* libbfd.h (bfd_reloc_code_real_names): BFD_RELOC_GOT_PREL name.
* reloc.c (comments): Document the new relocation.
gas/
2010-03-15 Wei Guozhi <carrot@google.com>
PR gas/11323
* config/tc-arm.c (reloc_names): New relocation names.
(md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
(tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
* doc/c-arm.texi (ARM-Relocations): Document the new relocation.
gas/testsuite
2010-03-15 Wei Guozhi <carrot@google.com>
PR gas/11323
* gas/arm/got_prel.s: New test case.
* gas/arm/got_prel.d: Likewise.
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* config/tc-v850.c (v850_insert_operand): Handle out-of-range
assembler constants on 64-bit hosts.
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* doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
* config/tc-bfin.c (md_show_usage): Show usage for all
Blackfin specific options.
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(ELF_TARGET_FORMAT64): Define.
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gas/
* config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
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* config/tc-sh.c (get_specific): Move overflow checking code to avoid
reading uninitialized data.
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* config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
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operand[1] != operand[2] contraint.
testsuite/
* gas/arm/thumb32.s, gas/arm/thumb32.d: Add a new test
for strexd.
* gas/arm/thumb32.l: Adjust.
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the remaining operands in the shape when one operand does
not match.
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* config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
alignment.
testsuite/
* gas/arm/neon-ldst-align-bad.d: New test.
* gas/arm/neon-ldst-align-bad.l: New test.
* gas/arm/neon-ldst-align-bad.s: New test.
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2010-02-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Update error messages.
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2010-02-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Add err_msg.
(operand_size_match): Set err_msg on failure.
(operand_type_match): Likewise.
(operand_type_register_match): Likewise.
(VEX_check_operands): Likewise.
(match_template): Likewise. Use i.err_msg with as_bad.
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mips_fix_loongson2f_jump): New variables.
(md_longopts): Add New options -mfix-loongson2f-nop/jump,
-mno-fix-loongson2f-nop/jump.
(md_parse_option): Initialize variables via above options.
(options): New enums for the above options.
(md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
(fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
New functions.
(append_insn): call fix_loongson2f().
(mips_handle_align): Replace the implicit nops.
* config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
for the new mips_handle_align().
* doc/c-mips.texi: Document the new options.
* gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop.
* gas/mips/loongson-2f-2.d: Likewise.
* gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump.
* gas/mips/loongson-2f-3.d: Likewise.
* gas/mips/mips.exp: Run the new tests.
* opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.
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* config/tc-arm.c (do_rd_rm_rn): Added warning.
gas/testsuite/
* gas/arm/depr-swp.d: New test case.
* gas/arm/depr-swp.s: New file.
* gas/arm/depr-swp.l: New file.
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* gas/config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
compiler's predefines.
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merging Tag_DIV_use, Tag_MPextension_use, and
Tag_MPextension_use_legacy tags.
* binutils/readelf.c (arm_attr_tag_Advanced_SIMD_arch): Add
description of newly permitted attribute values.
(arm_attr_tag_Virtualization_use): Likewise.
(arm_attr_tag_DIV_use): Add description of new attribute.
(arm_attr_tag_MPextension_use_legacy): Likewise.
* gas/config/tc-arm.c (arm_convert_symbolic_attribute):
Add Tag_DIV_use.
* gas/doc/c-arm.texi: Likewise.
* gas/testsuite/gas/arm/attr-order.d: Fix test for new names for
attribute values.
* include/elf/arm.h (Tag_MPextension_use): Renumber.
(Tag_DIV_use): Add.
(Tag_MPextension_use_legacy): Likewise.
* ld/testsuite/ld-arm/attr-merge-3.attr: Fix test for new attribute
values.
* ld/testsuite/ld-arm/attr-merge-3b.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-1.d: Fix test now that 42
is a recognised attribute ID.
* ld/testsuite/ld-arm/attr-merge-unknown-1.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-6.attr: New test.
* ld/testsuite/ld-arm/attr-merge-6a.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-6b.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-7a.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-7b.s: Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Run the new tests.
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* config/tc-arm.c (asm_opcode): operands type
change.
(BAD_PC_ADDRESSING): New macro message.
(BAD_PC_WRITEBACK): Likewise.
(MIX_ARM_THUMB_OPERANDS): New macro.
(operand_parse_code): Added enum values.
(parse_operands): Added thumb/arm distinction,
plus new enum values handling.
(encode_arm_addr_mode_2): Validations enhanced.
(encode_arm_addr_mode_3): Likewise.
(do_rm_rd_rn): Likewise.
(encode_thumb32_addr_mode): Likewise.
(do_t_ldrex): Likewise.
(do_t_ldst): Likewise.
(do_t_strex): Likewise.
(md_assemble): Call parse_operands with
a new parameter.
(OPS_1): New macro.
(OPS_2): Likewise.
(OPS_3): Likewise.
(OPS_4): Likewise.
(OPS_5): Likewise.
(OPS_6): Likewise.
(insns): Updated insns operands.
gas/testsuite/
* gas/arm/sp-pc-validations-bad.d: New testcase.
* gas/arm/sp-pc-validations-bad.l: New file.
* gas/arm/sp-pc-validations-bad.s: New file.
* gas/arm/sp-pc-validations-bad-t.d: New testcase.
* gas/arm/sp-pc-validations-bad-t.l: New file.
* gas/arm/sp-pc-validations-bad-t.s: New file.
* gas/arm/sp-pc-usage-t.d: Removed invalid insns.
* gas/arm/sp-pc-usage-t.s: Likewise.
* gas/arm/unpredictable.d: Likewise.
* gas/arm/unpredictable.s: Likewise.
* gas/arm/thumb2_bcond.d: Added test.
* gas/arm/thumb2_bcond.s: Likewise.
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2010-02-12 Tristan Gingold <gingold@adacore.com>
Douglas B Rupp <rupp@gnat.com>
* config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
(DUMMY_RELOC_IA64_SLOTCOUNT): Added.
(pseudo_func): Add an entry for slotcount.
(md_begin): Initialize slotcount pseudo symbol.
(ia64_parse_name): Handle @slotcount parameter.
(ia64_gen_real_reloc_type): Handle slotcount.
(md_apply_fix): Ditto.
* doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
gas/testsuite/
2010-02-12 Tristan Gingold <gingold@adacore.com>
* gas/ia64/slotcount.s, gas/ia64/slotcount.s: New test.
* gas/ia64/ia64.exp: Add slotcount test (vms only).
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* config/tc-xtensa.c (istack_init): Don't call memset.
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* config/tc-xtensa.c (cache_literal_section): Handle prefixes as
well as suffixes.
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2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Reformat.
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gas/
2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c: Update copyright.
opcodes/
2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c: Update copyright.
* i386-gen.c: Likewise.
* i386-opc.h: Likewise.
* i386-opc.tbl: Likewise.
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Sebastian Pop <sebastian.pop@amd.com>
gas:
* config/tc-i386.c (vec_imm4) New operand type.
(fits_in_imm4): New.
(VEX_check_operands): New.
(check_reverse): Call VEX_check_operands.
(build_modrm_byte): Reintroduce code for 5
operand insns. Fix whitespace.
gas/testsuite:
* gas/i386/x86-64-xop.d: Add vpermil2p[sd] tests.
* gas/i386/x86-64-xop.s: Likewise.
* gas/i386/xop.d: Likewise.
* gas/i386/xop.s: Likewise.
opcodes:
* i386-dis.c (OP_EX_VexImmW): Reintroduced
function to handle 5th imm8 operand.
(PREFIX_VEX_3A48): Added.
(PREFIX_VEX_3A49): Added.
(VEX_W_3A48_P_2): Added.
(VEX_W_3A49_P_2): Added.
(prefix table): Added entries for PREFIX_VEX_3A48
and PREFIX_VEX_3A49.
(vex table): Added entries for VEX_W_3A48_P_2 and
and VEX_W_3A49_P_2.
* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
for Vec_Imm4 operands.
* i386-opc.h (enum): Added Vec_Imm4.
(i386_operand_type): Added vec_imm4.
* i386-opc.tbl: Add entries for vpermilp[ds].
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
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* config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
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* config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
-mpwr6 and -mpwr7.
opcodes/
* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
and "pwr7". Move "a2" into alphabetical order.
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* config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
(next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
(xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
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gas/
* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
BFD_RELOC_ARM_PCREL_CALL)
gas/testsuite/
* gas/arm/branch-reloc.s, gas/arm/branch-reloc.d,
gas/arm/branch-reloc.l: New tests and expected results with all
variants of call: ARM/Thumb, local/global, inter/intra-section,
using BL/BLX.
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* config/tc-xtensa.c (frag_format_size): Generalize logic to
handle more instruction sizes and fetch widths.
(branch_align_power): Likewise.
(text_align_power): Likewise.
(bytes_to_stretch): Likewise.
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* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
* archures.c (bfd_mach_ppc_titan): Define.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
* ppc-dis.c (ppc_opts): Add titan entry.
* ppc-opc.c (TITAN, MULHW): Define.
(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
* config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
(ppc_mach): Handle titan.
* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
* gas/ppc/ppc.exp: Run it.
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* config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
replace with...
(xtensa_fetch_width) ...this.
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