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AgeCommit message (Expand)AuthorFilesLines
2016-02-29[ARC] Local symbols relocation cleanupClaudiu Zissulescu1-2/+23
2016-02-29[ARC] General fixes.Claudiu Zissulescu1-1/+1
2016-02-25Convert more variables to a constant form.Trevor Saunders37-124/+124
2016-02-24[GAS][ARM][3/3]Add armv8.2 fp16 scalar instruction support. Based on SE_H ins...Renlin Li1-39/+236
2016-02-24[GAS][ARM][2/3]Add SE_H shape to represent fp16 type.Renlin Li1-7/+72
2016-02-24[ARM][gas] Add support for Cortex-A32Kyrylo Tkachov1-0/+2
2016-02-22Add more const type qualifiers to GAS sources.Trevor Saunders21-68/+61
2016-02-20[i386] Check RegVRex in register_numberH.J. Lu1-0/+3
2016-02-19[ARM] Add FP16 feature extension for ARMv8.2 architectureJiong Wang1-0/+6
2016-02-17xtensa: fix .init/.fini literals movingMax Filippov1-2/+10
2016-02-17Update list of known MSP430 MCUs.Nick Clifton1-1/+15
2016-02-16[ARC] Enable .cfi_* pseudo-ops.Claudiu Zissulescu2-0/+31
2016-02-16[PR19620][GAS][AArch64]Remove mov[z,k,n] relocation symbol name restriction.Renlin Li1-9/+1
2016-02-15Correct opcode generated for RX indirect MOVs without an offset.Vinay Kumar G1-0/+9
2016-02-15Enhance GAS's .section directive so that it can take numeric values for the f...Nick Clifton2-9/+49
2016-02-10Add support for ARC instruction relaxation in the assembler.Claudiu Zissulescu2-957/+1480
2016-02-08FIx formatting that triggers a new compile time warning message.Nick Clifton1-2/+3
2016-02-04Remove support for creating ARM NOREAD sections.Nick Clifton3-22/+0
2016-02-04Fix the encoding of the MSP430's RRUX instruction.Nick Clifton1-57/+3
2016-02-03xtensa: fix signedness of gas relocationsMax Filippov1-3/+3
2016-02-03Add -mrelax-relocations= to x86 assemblerH.J. Lu1-3/+27
2016-02-03msp430: Set DWARF2_ADDR_SIZE to 4.Kevin Buettner1-0/+2
2016-02-01Fix ARC TLS support.Claudiu Zissulescu1-2/+9
2016-02-01Fix a problem building the ARM assembler using LLVM.Loria1-1/+4
2016-02-01Fix error building Microblaze assembler on a 32-bit host.Nick Clifton1-2/+2
2016-01-29Add option -mfence-as-lock-add=[no|yes].Andrew Senkevich1-0/+35
2016-01-25Rename OPTION_OMIT_LOCK_PREFIX to OPTION_MOMIT_LOCK_PREFIXH.J. Lu1-3/+3
2016-01-25Avoid the use of gp-relative addressing when abicalls are in effect.Catherine Moore1-0/+6
2016-01-20Add support for an ARM specific 'y' section attribute flag to mark the sectio...Mickael Guene3-0/+21
2016-01-18MIPS: Remove remnants of 48-bit microMIPS instruction supportMaciej W. Rozycki1-4/+2
2016-01-13Nios II/GAS: Fix build error in `output_movia'Maciej W. Rozycki1-1/+1
2016-01-13Remove spurious condition in test for closing parenthesis.Yoshinori Sato1-1/+1
2016-01-12[ARM] Support ARMv8.2 RAS extension.Matthew Wahab1-0/+9
2016-01-01Copyright update for binutilsAlan Modra238-238/+238
2015-12-24Add assembler support for ARMv8-M BaselineThomas Preud'homme1-19/+89
2015-12-24Add assembler support for ARMv8-M MainlineThomas Preud'homme1-25/+70
2015-12-24Consolidate Thumb-1/Thumb-2 ISA detectionThomas Preud'homme1-30/+46
2015-12-18Process 64-bit imm/disp only for 64-bit BFDH.J. Lu1-0/+6
2015-12-17[Patch ARM] Fix build attributes for armv8-a in case of assembler files that ...Ramana Radhakrishnan1-1/+2
2015-12-16[ARM] Add support for thumb1 pcrop relocations.Mickael Guene1-5/+104
2015-12-15Remove refernces to a non-existent silicon errata.Nick Clifton1-10/+3
2015-12-15Add support for RX V2 Instruction SetYoshinori Sato3-36/+225
2015-12-14[AArch64][PATCH 11/14] Add support for the 2H vector type.Matthew Wahab1-7/+6
2015-12-14[AArch64][PATCH 10/14] Rework code mapping vector types to operand qualifiers.Matthew Wahab1-6/+30
2015-12-11[AArch64][Patch 5/5] Add instruction PSB CSYNCMatthew Wahab1-1/+55
2015-12-11[AArch64][Patch 1/5] Support the ARMv8.2 Statistical Profiling Extension.Matthew Wahab1-0/+1
2015-12-10[AArch64][PATCH 2/2] Support ARMv8.2 DC CVAP instruction.Matthew Wahab1-0/+4
2015-12-10arc/gas: Accept, but ignore, dummy arguments.Andrew Burgess1-1/+2
2015-12-09Implement Intel OSPKE instructionsH.J. Lu1-0/+2
2015-12-09sparc: support %dN and %qN syntax for FP registers.Jose E. Marchesi1-5/+11
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