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2005-07-25bfd/H.J. Lu1-0/+6
2005-07-25 Jan Hubicka <jh@suse.cz> H.J. Lu <hongjiu.lu@intel.com> * elf-bfd.h (_bfd_elf_large_com_section): New. * elf.c (_bfd_elf_large_com_section): New. Defined. * elf64-x86-64.c (elf64_x86_64_add_symbol_hook): New. (elf64_x86_64_elf_section_from_bfd_section): New. (elf64_x86_64_symbol_processing): New. (elf64_x86_64_common_definition): New. (elf64_x86_64_common_section_index): New. (elf64_x86_64_common_section): New. (elf64_x86_64_merge_symbol): New. (elf64_x86_64_additional_program_headers): New. (elf64_x86_64_special_sections): New. (elf_backend_section_from_bfd_section): New. Defined. (elf_backend_add_symbol_hook): Likewise. (elf_backend_common_section_index): Likewise. (elf_backend_common_section): Likewise. (elf_backend_common_definition): Likewise. (elf_backend_merge_symbol): Likewise. (elf_backend_special_sections): Likewise. (elf_backend_additional_program_headers): Likewise. binutils/ 2005-07-25 H.J. Lu <hongjiu.lu@intel.com> * readelf.c (dump_relocations): Handle SHN_X86_64_LCOMMON. (get_symbol_index_type): Likewise. (get_elf_section_flags): Handle SHF_X86_64_LARGE. gas/ 2005-07-25 Jan Hubicka <jh@suse.cz> H.J. Lu <hongjiu.lu@intel.com> * config/obj-elf.c: Include "elf/x86-64.h" if TC_I386 is defined. (elf_com_section_ptr): New. (elf_begin): Set elf_com_section_ptr to bfd_com_section_ptr. (elf_common_parse): Make it global. Use elf_com_section_ptr instead of bfd_com_section_ptr. (obj_elf_change_section): Handle x86-64 large bss sections. * config/obj-elf.h (elf_com_section_ptr): New. (elf_common_parse): New. * config/tc-i386.c (handle_large_common): New. (md_pseudo_table): Add "largecomm". (x86_64_section_letter): New. (x86_64_section_word): New. * config/tc-i386.h (x86_64_section_word): New. (x86_64_section_letter): New. (md_elf_section_letter): New. Defined. (md_elf_section_word): Likewise. include/elf/ 2005-07-25 Jan Hubicka <jh@suse.cz> * x86-64.h (SHN_X86_64_LCOMMON): New. (SHF_X86_64_LARGE): New. ld/ 2005-07-25 Jan Hubicka <jh@suse.cz> H.J. Lu <hongjiu.lu@intel.com> * emulparams/elf_x86_64.sh (LARGE_SECTIONS): New. * scripttempl/elf.sc: Updated for large section support.
2005-07-18gas/Jan Beulich1-1/+1
2005-07-18 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (md_begin): Use IS_ELF. (tc_i386_fix_adjustable): Likewise. (md_estimate_size_before_relax): Likewise. (md_apply_fix): Likewise. (i386_target_format): Likewise. (lex_got): Define to NULL when not ELF or when LEX_AT. Check IS_ELF. (i386_immediate): Remove #ifdef LEX_AT. (i386_displacement): Likewise. * config/tc-i386.h (x86_cons): Prototype only when ELF and when not LEX_AT.
2005-07-15gas/H.J. Lu1-1/+2
2007-07-15 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.h (CpuVMX): New. (CpuUnknownFlags): Add CpuVMX. gas/testsuite/ 2007-07-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add vmx and x86-64-vmx. * gas/i386/vmx.d: New file. * gas/i386/vmx.s: Likewise. * gas/i386/x86-64-vmx.d: Likewise. * gas/i386/x86-64-vmx.s: Likewise. include/opcode/ 2007-07-15 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel VMX Instructions. opcodes/ 2007-07-15 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions. (VMX_Fixup): New. Fix up Intel VMX Instructions. (Em): New. (Gm): New. (VM): New. (dis386_twobyte): Updated entries 0x78 and 0x79. (twobyte_has_modrm): Likewise. (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9. (OP_G): Handle m_mode.
2005-07-08 * frags.h: Remove ANSI_PROTOTYPES conditional code.Ben Elliston1-2/+0
* config/obj-elf.h: Likewise. * config/tc-h8300.h: Likewise. * config/tc-h8500.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-m68k.h: Likewise. * config/tc-ppc.h: Likewise. * config/tc-s390.h: Likewise. * config/tc-sh.h: Likewise. * config/tc-sparc.h: Likewise. * config/tc-tic30.c: Likewise. * config/tc-w65.h: Likewise. * config/tc-xtensa.h: Likewise.
2005-07-062005-07-06 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+2
* config/tc-i386.c (cpu_arch): Add sse3. * config/tc-i386.h (CpuSSE3): Renamed from ... (CpuPNI): This. Defined as CpuSSE3. * doc/c-i386.texi: Document .sse3.
2005-07-05gas/Jan Beulich1-1/+4
2005-07-05 Jan Beulich <jbeulich@novell.com> * config/tc-i386.h (CpuSVME): New. (CpuUnknownFlags): Include CpuSVME. * config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron as alias of sledgehammer. (md_assemble): Include invlpga in the check for insns with two source operands. (process_operands): Include SVME insns in the check for ignored segment overrides. Adjust diagnostic. (i386_index_check): Special-case SVME insns with memory operands. gas/testsuite/ 2005-07-05 Jan Beulich <jbeulich@novell.com> * gas/i386/svme.d: New. * gas/i386/svme.s: New. * gas/i386/svme64.d: New. * gas/i386/i386.exp: Run new tests. include/opcode/ 2005-07-05 Jan Beulich <jbeulich@novell.com> * i386.h (i386_optab): Add new insns. opcodes/ 2005-07-05 Jan Beulich <jbeulich@novell.com> * i386-dis.c (SVME_Fixup): New. (grps): Use it for the lidt entry. (PNI_Fixup): Call OP_M rather than OP_E. (INVLPG_Fixup): Likewise.
2005-06-07gas:Zack Weinberg1-1/+1
* cgen.c, cgen.h, tc.h, write.c, config/obj-coff.c * config/tc-a29k.c, config/tc-alpha.c, config/tc-alpha.h * config/tc-arc.c, config/tc-arc.h, config/tc-arm.c * config/tc-arm.h, config/tc-avr.c, config/tc-avr.h * config/tc-cris.c, config/tc-crx.c, config/tc-d10v.c * config/tc-d10v.h, config/tc-d30v.c, config/tc-d30v.h * config/tc-dlx.c, config/tc-dlx.h, config/tc-fr30.h * config/tc-frv.c, config/tc-frv.h, config/tc-h8300.c * config/tc-h8500.c, config/tc-hppa.c, config/tc-hppa.h * config/tc-i370.c, config/tc-i370.h, config/tc-i386.c * config/tc-i386.h, config/tc-i860.c, config/tc-i860.h * config/tc-i960.c, config/tc-i960.h, config/tc-ia64.c * config/tc-ip2k.c, config/tc-ip2k.h, config/tc-iq2000.c * config/tc-iq2000.h, config/tc-m32r.c, config/tc-m32r.h * config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c * config/tc-m68k.h, config/tc-m88k.c, config/tc-maxq.c * config/tc-mcore.c, config/tc-mcore.h, config/tc-mips.c * config/tc-mips.h, config/tc-mmix.c, config/tc-mn10200.c * config/tc-mn10300.c, config/tc-msp430.c, config/tc-ns32k.c * config/tc-openrisc.h, config/tc-or32.c, config/tc-or32.h * config/tc-pdp11.c, config/tc-pj.c, config/tc-pj.h * config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c * config/tc-s390.h, config/tc-sh64.c, config/tc-sh.c * config/tc-sh.h, config/tc-sparc.c, config/tc-sparc.h * config/tc-tahoe.c, config/tc-tic30.c, config/tc-tic4x.c * config/tc-tic54x.c, config/tc-tic80.c, config/tc-v850.c * config/tc-v850.h, config/tc-vax.c, config/tc-vax.h * config/tc-w65.c, config/tc-xstormy16.c, config/tc-xstormy16.h * config/tc-xtensa.c, config/tc-z8k.c: Replace all instances of the string "_apply_fix3" with "_apply_fix". * po/POTFILES.in, po/gas.pot: Regenerate. bfd: * coff-i386.c: Change md_apply_fix3 to md_apply_fix in comment. cgen: * doc/porting.texi: Change all mention of md_apply_fix3 and gas_cgen_md_apply_fix3 to md_apply_fix and gas_cgen_md_apply_fix respectively.
2005-05-052005-05-05 Paul Brook <paul@codesourcery.com>Paul Brook1-0/+3
bfd/ * config.bfd: Use bfd_elf32_i386_vxworks_vec for i?86-*-vxworks. * configure.in: Add bfd_elf32_i386_vxworks_vec. i386 targets need elf-vxworks.lo. * configure: Regenerate. * Makefile.am (BFD32_BACKENDS): Add elf-vxworks.lo. (BFD32_BACKENDS_CFILES): Add elf-vxworks.c. (elf32-i386.lo): Depend on elf-vxworks.h. (elf-vxworks.lo): New rule. * Makefile.in: Regenerate. * elf-bfd.h (elf_backend_data): Update type of elf_backend_emit_relocs. (_bfd_elf_link_output_relocs): Update prototype. * elflink.c (_bfd_elf_link_output_relocs): Always use bed->elf_backend_emit_relocs when outputting relocations. * elfxx-target.h (elf_backend_emit_relocs): Default to _bfd_elf_link_output_relocs. * targets.c (bfd_elf32_i386_vxworks_vec): Declare. (_bfd_target_vector): Add bfd_elf32_i386_vxworks_vec. * elf32-i386.c: Add elf32-i386-vxworks target BFD. (elf_i386_plt0_entry): Remove padding. (elf_i386_pic_plt0_entry): Ditto. (PLTRESOLVE_RELOCS_SHLIB, PLTRESOLVE_RELOCS): Define. (PLT_NON_JUMP_SLOT_RELOCS): Define. (elf_i386_link_hash_table): Add srelplt2, hgot, hplt, is_vxworks and plt0_pad_byte fields. (elf_i386_link_hash_table_create): Zero them. (elf_i386_create_dynamic_sections): Create static relocation section. (allocate_dynrelocs): Allocate space for static PLT relocations. (elf_i386_size_dynamic_sections): Save shortcuts to PLT and GOT symbols. Give PLT symbols function type. Don't strip PLT sections if we have exported symbols from them. (elf_i386_finish_dynamic_symbol): Fill in VxWorks PLT static relocation section. Don't mark _GLOBAL_OFFSET_TABLE_ as absolute on VxWorks. (elf_i386_finish_dynamic_sections): Allow different pad bytes. Add relocation for GOT location. Fill in PLT static relocations. (elf_i386_vxworks_link_hash_table_create): New function. (elf_i386_vxworks_link_output_symbol_hook): New function. * elf-vxworks.h: New file. gas/ * config/tc-i386.h (ELF_TARGET_FORMAT): Define for TE_VXWORKS. gas/testsuite/ * gas/i386/i386.exp: Don't run divide test on vxworks. ld/ * Makefile.am: Add eelf_i386_vxworks. * Makefile.in: Regenerate. * configure.tgt: Make i?86-*-vxworks use targ_emul=elf_i386_vxworks. * emulparams/elf_i386_vxworks.sh: New file. * emulparams/vxworks.sh: New file. * scripttempl/elf.sc: Add DATA_END_SYMBOLS and ETEXT_NAME.
2005-05-05Update the address and phone number of the FSFNick Clifton1-2/+2
2004-11-23gas/Jan Beulich1-6/+8
2004-11-23 Jan Beulich <jbeulich@novell.com> * config/tc-i386.h (CpuMMX2): Declare. Artificial classifier to indicate the MMX extensions added by both SSE and 3DNow!A. (Cpu3dnowA): Declare. (CpuUnknownFlags): Update. * config/tc-i386.c (cpu_sub_arch_name): Declare. (cpu_arch): i586 and pentium do not imply MMX. i686 and pentiumpro do neither imply SSE nor MMX. k6 implies MMX. k6_2 additionally implies 3DNow!. Athlon additionally implies 3DNow!A. Several new entries (those starting with a dot are for sub-arch specification). (set_cpu_arch): Handle sub-arch specifications. (parse_insn): Distinguish between instructions not supported because of insufficient CPU features and because of 64-bit mode. * doc/c-i386.texi: Describe enhanced .arch directive. include/opcode/ 2004-11-23 Jan Beulich <jbeulich@novell.com> * i386.h (i386_optab): paddq and psubq, even in their MMX form, are available only with SSE2. Change the MMX additions introduced by SSE and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A instructions by their now designated identifier (since combining i686 and 3DNow! does not really imply 3DNow!A).
2004-11-04gas/Jan Beulich1-12/+0
2004-11-04 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (set_intel_syntax): Allow % in symbol names when intel syntax and no register prefix, allow $ in symbol names when intel syntax. (set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX. (intel_float_operand): Add fourth return value indicating math control operations. Make classification more precise. (md_assemble): Complain if memory operand of mov[sz]x has no size specified. (parse_insn): Translate word operands to floating point instructions operating on integers as well as control instructions to short ones as expected by AT&T syntax. Translate 'd' suffix to short one only for floating point instructions operating on non-integer operands. (match_template): Remove fldcw special case. Adjust q-suffix handling to permit it on fild/fistp/fisttp in AT&T mode. (process_suffix): Don't guess DefaultSize insns' suffix from stackop_size for certain floating point control instructions. Guess suffix for branch and [ls][gi]dt based on flag_code. Split error messages for Intel and AT&T syntax, and make the condition more strict for the former. Adjust suppressing of generation of operand size overrides. (intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE, OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add more error checking. * config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines. gas/testsuite/ 2004-11-04 Jan Beulich <jbeulich@novell.com> * gas/i386/i386.exp: Execute new tests intelbad and intelok. * gas/i386/intelbad.[sl]: New test to check for various things not permitted in Intel mode. * gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d: Adjust for change to segment register store. * gas/i386/intelok.[sd]: New test to check various Intel mode specific things get handled correctly. * gas/i386/x86_64.[sd]: Remove unsupported constructs referring to 'high' and 'low' parts of an operand, which the parser previously accepted while neither telling that it's not supported nor that it ignored the remainder of the line following these supposed keywords. include/opcode/ 2004-11-04 Jan Beulich <jbeulich@novell.com> * i386.h (sldx_Suf): Remove. (FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize. (q_FP): Define, implying no REX64. (x_FP, sl_FP): Imply FloatMF. (i386_optab): Split reg and mem forms of moving from segment registers so that the memory forms can ignore the 16-/32-bit operand size distinction. Adjust a few others for Intel mode. Remove *FP uses from all non-floating-point instructions. Unite 32- and 64-bit forms of movsx, movzx, and movd. Adjust floating point operations for the above changes to the *FP macros. Add DefaultSize to floating point control insns operating on larger memory ranges. Remove left over comments hinting at certain insns being Intel-syntax ones where the ones actually meant are already gone. opcodes/ 2004-11-04 Jan Beulich <jbeulich@novell.com> * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define. (indirEb): Remove. (Mp): Use f_mode rather than none at all. (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode replaces what previously was x_mode; x_mode now means 128-bit SSE operands. (dis386): Make far jumps and calls have an 'l' prefix only in AT&T mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq. pinsrw's second operand is Edqw. (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt, fldenv, frstor, fsave, fstenv all should also have suffixes in Intel mode when an operand size override is present or always suffixing. More instructions will need to be added to this group. (putop): Handle new macro chars 'C' (short/long suffix selector), 'I' (Intel mode override for following macro char), and 'J' (for adding the 'l' prefix to far branches in AT&T mode). When an alternative was specified in the template, honor macro character when specified for Intel mode. (OP_E): Handle new *_mode values. Correct pointer specifications for memory operands. Consolidate output of index register. (OP_G): Handle new *_mode values. (OP_I): Handle const_1_mode. (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate respective opcode prefix bits have been consumed. (OP_EM, OP_EX): Provide some default handling for generating pointer specifications.
2004-10-18 * config/tc-i386.c (O_secrel): Delete.Alan Modra1-0/+9
(tc_pe_dwarf2_emit_offset): New function. * config/tc-i386.h (O_secrel): Define as O_md1. (TC_DWARF2_EMIT_OFFSET): Define.
2004-10-08bfd/Daniel Jacobowitz1-0/+3
* config.bfd: Include 64-bit support for i[3-7]86-*-solaris2*. * elf64-x86-64.c (elf64_x86_64_section_from_shdr): New function. (elf_backend_section_from_shdr): Define. binutils/ * readelf.c (get_x86_64_section_type_name): New function. (get_section_type_name): Use it. gas/ * config/tc-i386.c: Include "elf/x86-64.h". (i386_elf_section_type): New function. * config/tc-i386.h (md_elf_section_type): Define. (i386_elf_section_type): New prototype. gas/testsuite/ * gas/i386/i386.exp: Don't run divide test for targets where '/' is a comment. Run x86-64-unwind for 64-bit ELF targets. * gas/i386/x86-64-unwind.d, gas/i386/x86-64-unwind.s: New. include/ * elf/common.h (PT_SUNW_EH_FRAME): Define. * elf/x86-64.h (SHT_X86_64_UNWIND): Define. ld/ * configure.tgt: Include elf_x86_64 for i[3-7]86-*-solaris2*.
2004-10-01(TARGET_FORMAT): Remove LynxOS COFF definition.Nick Clifton1-5/+1
2004-04-20Add support for a .secrel32 x86 reloc to allow DWARF" debug information to usedNick Clifton1-0/+6
with COFF based x86 ports.
2004-03-122004-03-12 Michal Ludvig <mludvig@suse.cz>Michal Ludvig1-2/+3
* gas/config/tc-i386.c (output_insn): Handle PadLock instructions. * gas/config/tc-i386.h (CpuPadLock): New define. (CpuUnknownFlags): Added CpuPadLock. * include/opcode/i386.h (i386_optab): Added xstore/xcrypt insns. * opcodes/i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines. (dis386_twobyte): Opcode 0xa7 is PADLOCK_0. (padlock_table): New struct with PadLock instructions. (print_insn): Handle PADLOCK_SPECIAL.
2003-11-21 * config/tc-hppa.c: Fix comment typos.Kazu Hirata1-1/+1
* config/tc-i370.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-iq2000.h: Likewise.
2003-08-14 * config/tc-i386.h: Remove BFD_ASSEMBLER tests and all !BFD_ASSEMBLERAlan Modra1-71/+4
code. * config/tc-i386.c: Likewise. (RELOC_ENUM): Don't define. Replace throughout with enum.
2003-06-23gas/H.J. Lu1-1/+2
2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (md_assemble): Support Intel Precott New Instructions. * gas/config/tc-i386.h (CpuPNI): New. (CpuUnknownFlags): Add CpuPNI. gas/testsuite/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add prescott. * gas/i386/prescott.d: New file. * gas/i386/prescott.s: Likewise. include/opcode/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel Precott New Instructions. opcodes/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in Intel Precott New Instructions. (PREGRP27): New. Added for "addsubpd" and "addsubps". (PREGRP28): New. Added for "haddpd" and "haddps". (PREGRP29): New. Added for "hsubpd" and "hsubps". (PREGRP30): New. Added for "movsldup" and "movddup". (PREGRP31): New. Added for "movshdup" and "movhpd". (PREGRP32): New. Added for "lddqu". (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry. Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for entry 0xd0. Use PREGRP32 for entry 0xf0. (twobyte_has_modrm): Updated. (twobyte_uses_SSE_prefix): Likewise. (grps): Use PNI_Fixup in the "sidtQ" entry. (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30, PREGRP31 and PREGRP32. (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb. Use "fisttpll" in entry 1 in opcode 0xdd. Use "fisttp" in entry 1 in opcode 0xdf.
2003-06-102003-06-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+7
* NEWS: Updated for the new -n option for the i386 assembler. * config/tc-i386.c (optimize_align_code): New. (md_shortopts): Add 'n'. (md_parse_option): Handle 'n'. (md_show_usage): Add '-n'. * config/tc-i386.h (optimize_align_code): Declared. (md_do_align): Optimize code alignment only if optimize_align_code is not 0. * doc/as.texinfo: Add the new -n option. * doc/c-i386.texi: Document the new -n option.
2003-05-27 * dw2gencfi.c, dw2gencfi.h: Rewrite from scratch.Richard Henderson1-7/+7
* as.c (main): Always call cfi_finish. * config/tc-i386.c (x86_dwarf2_return_column): New. (x86_cie_data_alignment): New. (md_begin): Set them. (tc_x86_cfi_init): Remove. (tc_x86_regname_to_dw2regnum): Fix 32-bit register numbers; return int, not unsigned long; don't as_bad here. (tc_x86_frame_initial_instructions): Streamline; use updated api. * config/tc-i386.h (tc_cfi_init): Remove. (DWARF2_DEFAULT_RETURN_COLUMN): New. (DWARF2_CIE_DATA_ALIGNMENT): New. * gas/cfi/cfi-i386.d: Update for dw2gencfi rewrite. * gas/cfi/cfi-x86_64.d: Likewise. * gas/cfi/cfi-i386-2.d: New. * gas/cfi/cfi-i386-2.s: New.
2003-05-20 * dw2gencfi.c, dw2gencfi.h: New files.Alan Modra1-0/+15
* config/tc-i386.c (tc_x86_cfi_init): New function. * config/tc-i386.h (TARGET_USE_CFIPOP, tc_cfi_init): New defines. * as.c (parse_args): Set verbose flag on --verbose. (main): Call tc_cfi_init()/cfi_finish(). * as.h (verbose): New external variable. * read.c (pobegin): Insert CFI pops to the list. * symbols.c (local_symbol_make): Make symbol external. * symbols.h (local_symbol_make): New prototype. * Makefile.am: Add dw2gencfi.[ch] files. Run "make dep-am". * Makefile.in: Regenerate. * doc/as.texinfo: Added node "CFI directives" with description of all implemented .cfi_* directives. * doc/Makefile.in: Regenerate. * po/POTFILES.in: Regenerate.
2003-01-23 * symbols.c (S_FORCE_RELOC): Add "strict" param.Alan Modra1-9/+4
* symbols.h (S_FORCE_RELOC): Likewise. * config/obj-aout.h (S_FORCE_RELOC): Likewise. * config/obj-bout.h (S_FORCE_RELOC): Likewise. * config/obj-coff.h (S_FORCE_RELOC): Likewise. * config/obj-ieee.h (S_FORCE_RELOC): Likewise. * config/obj-vms.h (S_FORCE_RELOC): Likewise. * write.c (generic_force_reloc): New function. (TC_FORCE_RELOCATION): Use it here instead of S_FORCE_RELOC. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. (adjust_reloc_syms): Adjust S_FORCE_RELOC call. * as.h (generic_force_reloc): Declare. * doc/internals.texi (S_FORCE_RELOC): Update. (TC_FORCE_RELOCATION_SUB_SAME): Update. * config/tc-alpha.c (alpha_force_relocation): Adjust to use generic_force_reloc. (alpha_fix_adjustable): Likewise. * config/tc-arm.c (arm_force_relocation): Likewise. * config/tc-cris.c (md_cris_force_relocation): Likewise. * config/tc-frv.c (frv_force_relocation): Likewise. * config/tc-i386.c (md_apply_fix3): Likewise. * config/tc-ia64.c (ia64_force_relocation): Likewise. * config/tc-ip2k.c (ip2k_force_relocation): Likewise. * config/tc-m32r.c (m32r_force_relocation): Likewise. * config/tc-m68hc11.c (tc_m68hc11_force_relocation): Likewise. * config/tc-mcore.c (mcore_force_relocation): Likewise. * config/tc-mips.c (mips_force_relocation): Likewise. * config/tc-mmix.c (mmix_force_relocation): Likewise. * config/tc-ppc.c (ppc_force_relocation): Likewise. * config/tc-s390.c (tc_s390_force_relocation): Likewise. * config/tc-sh.c (sh_force_relocation): Likewise. (md_pcrel_from_section): Likewise. * config/tc-sparc.c (tc_gen_reloc): Likewise. * config/tc-v850.c (v850_force_relocation): Likewise. * config/tc-xstormy16.c (xstormy16_force_relocation): Likewise. * config/tc-i386.h (TC_FORCE_RELOCATION): Likewise. * config/tc-mcore.h (TC_FORCE_RELOCATION): Likewise. * config/tc-sparc.h (tc_fix_adjustable): Likewise. * config/tc-d10v.c (d10v_force_relocation): Delete. * config/tc-d10v.h (TC_FORCE_RELOCATION): Don't define. * config/tc-dlx.c (md_dlx_force_relocation): Delete. * config/tc-dlx.h (TC_FORCE_RELOCATION): Don't define. * config/tc-fr30.c (fr30_force_relocation): Delete. * config/tc-fr30.h (TC_FORCE_RELOCATION): Don't define. * config/tc-mn10300.c (mn10300_force_relocation): Delete. * config/tc-mn10300.h (TC_FORCE_RELOCATION): Don't define. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. * config/tc-i960.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise. * config/tc-hppa.c (hppa_force_relocation): Adjust S_FORCE_RELOC call. * config/tc-mips.c (RELAX_BRANCH_TOOFAR): Warning fix. * config/tc-mips.h (TC_FORCE_RELOCATION_SUB_SAME): Don't define. * config/tc-openrisc.c (openrisc_force_relocation): Delete. * config/tc-openrisc.h (TC_FORCE_RELOCATION): Don't define. * config/tc-sparc.c (elf32_sparc_force_relocation): Delete. * config/tc-sparc.h (TC_FORCE_RELOCATION): Don't define for ELF. * config/tc-i386.c (i386_force_relocation): Delete. * config/tc-i386.h (TC_FORCE_RELOCATION): Don't define for BFD_ASSEMBLER. (EXTERN_FORCE_RELOC): Fix TE_PE and STRICT_PE_FORMAT nesting. * config/tc-m68k.h (TC_FORCE_RELOCATION): Don't define. * config/tc-pj.h (TC_FORCE_RELOCATION): Don't define. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Don't call S_FORCE_RELOC. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. * config/tc-sh64.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
2002-11-30s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. SimplifyAlan Modra1-1/+1
comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
2002-11-11* config/tc-i386.h (EXTERN_FORCE_RELOC): Define only if STRICT_PE_FORMAT.Christopher Faylor1-1/+3
2002-10-15 * config/tc-i386.h (EXTERN_FORCE_RELOC): Define.Alan Modra1-1/+9
(MD_APPLY_SYM_VALUE): Define for PE too.
2002-09-172002-09-16 Bruno Haible <bruno@clisp.org>David O'Brien1-1/+8
* elf32-i386.c: Don't defined ELF_ARCH etc. if this file is included by a target variant implementation. * elf64-alpha.c: Likewise. * elf32-i386-fbsd.c: New file. * elf64-alpha-fbsd.c: New file. * targets.c: Support bfd_elf32_i386_freebsd_vec and bfd_elf64_alpha_freebsd_vec. * configure.in: Accept the vectors bfd_elf32_i386_freebsd_vec, bfd_elf64_alpha_freebsd_vec. * Makefile.am (BFD32_BACKENDS): Add elf32-i386-fbsd.lo. (BFD32_BACKENDS_CFILES): Add elf32-i386-fbsd.c. (BFD64_BACKENDS): Add elf64-alpha-fbsd.lo. (BFD64_BACKENDS_CFILES): Add elf64-alpha-fbsd.c. (elf32-i386-fbsd.lo, elf64-alpha-fbsd.lo): Add dependencies. * config.bfd: For FreeBSD targets, set targ_defvec to a FreeBSD specific targets. Define OLD_FREEBSD_ABI_LABEL if appropriate. * config/tc-i386.h (ELF_TARGET_FORMAT): New macro. (TARGET_FORMAT): Use ELF_TARGET_FORMAT instead of "elf32-i386". * config/tc-i386.c (i386_target_format): Likewise. * config/tc-alpha.h (ELF_TARGET_FORMAT): New macro. (TARGET_FORMAT): Use ELF_TARGET_FORMAT instead of "elf64-alpha". * emulparams/elf_i386_fbsd.sh: Set OUTPUT_FORMAT to elf32-i386-freebsd. * emulparams/elf64alpha_fbsd.sh: Set OUTPUT_FORMAT to elf64-alpha-freebsd. Approved by: Alan Modra <amodra@bigpond.net.au> Message-ID: <20020715021113.GJ30362@bubble.sa.bigpond.net.au>
2002-09-05gas reloc rewrite.Alan Modra1-37/+21
2002-08-09 * config/tc-i386.h: Reorganize.Alan Modra1-79/+76
2002-07-09 * config/tc-i386.c (md_pseudo_table <file>): Warning fix.Alan Modra1-2/+9
(BFD_RELOC_8, BFD_RELOC_8_PCREL): Define for non-BFD. (md_apply_fix3): Formatting. Remove redundant test. (tc_gen_reloc): Remove redundant code. (tc_i386_force_relocation): Delete. Movy body of function to.. * config/tc-i386.h (TC_FORCE_RELOCATION): .. here.
2002-05-23 * write.c (size_seg): Check adjustment to last frag.Alan Modra1-2/+4
(SUB_SEGMENT_ALIGN): If HANDLE_ALIGN defined, pad out last frag to section alignment. * config/obj-coff.c (SUB_SEGMENT_ALIGN): Likewise. * config/obj-ieee.c (SUB_SEGMENT_ALIGN): Likewise. (write_object_file): Invoke md_do_align if available, and use frag_align_code on text sections. * config/obj-vms.h (SUB_SEGMENT_ALIGN): Now two args. * config/tc-m88k.h (SUB_SEGMENT_ALIGN): Likewise. * config/tc-ppc.h (SUB_SEGMENT_ALIGN): Likewise. * config/tc-sh.h (SUB_SEGMENT_ALIGN): Likewise. * config/tc-i386.h (SUB_SEGMENT_ALIGN): Likewise. Define for BFD_ASSEMBLER too.
2002-03-09 * config/tc-i386.h (REX_OPCODE): Define.Alan Modra1-9/+11
(REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): Define. (rex_byte): typedef to int. * config/tc-i386.c: Group prototypes and vars together. Formatting fixes. Remove occurrences of "register" keyword. (true): Delete. (false): Delete. (mode_from_disp_size): Add INLINE keyword to prototype. (fits_in_signed_byte): Likewise. (fits_in_unsigned_byte): Likewise. (fits_in_unsigned_word): Likewise. (fits_in_signed_word): Likewise. (fits_in_unsigned_long): Likewise. (fits_in_signed_long): Likewise. (type_names): Constify. (intel_float_operand): Constify param. (add_prefix): Use REX_OPCODE. (md_assemble): Likewise. Modify for changed rex_byte. (parse_insn): Split out of md_assemble. (parse_operands): Likewise. (swap_operands): Likewise. (optimize_imm): Likewise. (optimize_disp): Likewise. (match_template): Likewise. (check_string): Likewise. (process_suffix): Likewise. (check_byte_reg): Likewise. (check_long_reg): Likewise. (check_qword_reg): Likewise. (check_word_reg): Likewise. (finalize_imm): Likewise. (process_operands): Likewise. (build_modrm_byte): Likewise. (output_insn): Likewise. (output_branch): Likewise. (output_jump): Likewise. (output_interseg_jump): Likewise. (output_disp): Likewise. (output_imm): Likewise.
2001-11-15Update all uses of md_apply_fix to use md_apply_fix3. Make it a void function.Nick Clifton1-3/+0
2001-11-15 * config/tc-i386.h (md_end): Define.Alan Modra1-1/+5
(i386_elf_emit_arch_note): Declare. (CpuUnknown): Delete. * config/tc-i386.c (default_arch): Constify. (smallest_imm_type): Remove CpuUnknown test. (md_assemble): Don't bother checking cpu_arch_flags non-zero. (i386_elf_emit_arch_note): New function.
2001-07-23 * config/tc-alpha.h: Fix formatting.Kazu Hirata1-1/+1
* config/tc-arc.c: Likewise. * config/tc-d10v.h: Likewise. * config/tc-hppa.c: Likewise. * config/tc-i370.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i960.h: Likewise. * config/tc-ia64.c: Likewise. * config/tc-ia64.h: Likewise. * config/tc-m32r.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m88k.c: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-pdp11.c: Likewise. * config/tc-pj.h: Likewise. * config/tc-s390.c: Likewise. * config/tc-sparc.c: Likewise. * config/tc-sparc.h: Likewise. * config/tc-tic80.c: Likewise. * config/tc-w65.h: Likewise.
2001-03-13Support for @GOTOFF in .long expressions.Alan Modra1-0/+9
2001-03-08Fix copyright noticesNick Clifton1-2/+3
2001-02-19001-02-18 David O'Brien <obrien@FreeBSD.org>David O'Brien1-0/+3
* configure.in (cpu_type, arch): Add a generic FreeBSD specification as all FreeBSD platforms should look the same at this level. * configure: Rebuilt. * config/tc-i386.c: Add support for old FreeBSD a.out hosts. Approved by: Philip Blundell <philb@gnu.org> Message-Id: <E14URxF-00023n-00@kings-cross.london.uk.eu.org>
2001-01-13 * tc-i386.h (TARGET_MACH): New macro.Jan Hubicka1-0/+2
(i386_mach): Declare. * tc-i386.c (i386_mach): New function.
2001-01-11 * config/tc-i386.h (TC_RELOC_GLOBAL_OFFSET_TABLE): Removed, it'sAndreas Jaeger1-10/+1
not used anywhere.
2001-01-03 * tc-i386.h (CpuK6, CpuAthlon, CpuSledgehammer, CpuMMX, Cpu3dnow,Jan Hubicka1-8/+10
CpuUnknown): Renumber (CpuP4, CpuSSE2): New. (CpuUnknownFlags): Add CpuP4 and CpuSSE2 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions introduced by Pentium4
2000-12-28 * as.h (rs_align_test): New.Richard Henderson1-4/+3
* frags.c (NOP_OPCODE): Move default from read.c. (MAX_MEM_FOR_RS_ALIGN_CODE): New default. (frag_align_code): New. * frags.h (frag_align_code): Declare. * read.c (NOP_OPCODE): Remove. (do_align): Use frag_align_code. * write.c (NOP_OPCODE): Remove. (get_recorded_alignment): New. (cvt_frag_to_fill): Handle rs_align_test. (relax_segment): Likewise. (subsegs_finish): Align last subseg in section to the section alignment. Use frag_align_code. * write.h (get_recorded_alignment): Declare. * config/obj-coff.c (size_section): Handle rs_align_test. (fill_section, fixup_mdeps): Likewise. (write_object_file): Use frag_align_code. * config/tc-alpha.c (alpha_align): Use frag_align_code. (alpha_handle_align): New. * config/tc-alpha.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-i386.h (md_do_align): Use frag_align_code. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-ia64.c (ia64_md_do_align): Don't do code alignment. (ia64_handle_align): New. * config/tc-ia64.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m32r.c (m32r_do_align): Remove. (m32r_handle_align): New. (fill_insn): Use frag_align_code. * config/tc-m32r.h (md_do_align): Remove. (HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m88k.c, config/tc-m88k.h: Similarly. * config/tc-mips.c, config/tc-mips.h: Similarly. * config/tc-sh.c (sh_cons_align): Use rs_align_test. (sh_handle_align): Likewise. Handle rs_align_code. (sh_do_align): Remove. * config/tc-sh.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-sparc.c (sparc_cons_align): Use rs_align_test. (sparc_handle_align): Likewise. Handle rs_align_code. * config/tc-sparc.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New.
2000-12-20 * tc-i386.h (i386_target_format): Define even for ELFs.Jan Hubicka1-49/+86
(QWORD_MNEM_SUFFIX): New macro. (CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags): New macros (CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber. (IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix, ImmExt): Renumber. (Size64, No_qSuf, NoRex64, Rex64): New macros. (Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros. (Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32, InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc, SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber. (Reg, WordReg): Add Reg64. (Imm): Add Imm32S and Imm64. (EncImm): New. (Disp): Add Disp64 and Disp32S. (AnyMem): Add Disp32S. (RegRex, RegRex64): New macros. (rex_byte): New type. * tc-i386.c (set_16bit_code_flag): Kill. (fits_in_unsigned_long, fits_in_signed_long): New functions. (reloc): New parameter "signed"; support x86_64. (set_code_flag): New. (DEFAULT_ARCH): New macro; default to "i386". (default_arch): New static variable. (struct _i386_insn): New fields Operand_PCrel; rex. (flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT"; (flag_code): New enum and static variable. (use_rela_relocations): New static variable. (flag_code_names): New static variable. (cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64. (cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to K6 and Athlon. (i386_align_code): Return plain "nop" for x86_64. (mode_from_disp_size): Support Disp32S. (smallest_imm_type): Support Imm32S and Imm64. (offset_in_range): Support size of 8. (set_cpu_arch): Do not clobber to Cpu64/CpuNo64. (md_pseudo_table): Add "code64"; use set_code_flat. (md_begin): Emit sane error message on hash failure. (tc_i386_fix_adjustable): Support x86_64 relocations. (md_assemble): Support QWORD_MNEM_SUFFIX, REX registers, instructions supported on particular arch just partially, output of 64bit immediates, handling of Imm32S and Disp32S type. (i386_immedaite): Support x86_64 relocations; support 64bit constants. (i386_displacement): Likewise. (i386_index_check): Cleanup; support 64bit addresses. (md_apply_fix3): Support x86_64 relocation and rela. (md_longopts): Add "32" and "64". (md_parse_option): Add OPTION_32 and OPTION_64. (i386_target_format): Call even for ELFs; choose between elf64-x86-64 and elf32-i386. (i386_validate_fix): Refuse GOTOFF in 64bit mode. (tc_gen_reloc): Support rela relocations and x86_64. (intel_e09_1): Support QWORD. * i386.h (i386_optab): Replace "Imm" with "EncImm". (i386_regtab): Add flags field.
2000-12-11 * tc-i386.c (md_assemble): Refuse 's' and 'l' suffixes in the intelJan Hubicka1-10/+7
mode; convert 'd' suffix to 's' or 'l'; remove all DWORD_MNEM_SUFFIX references. (intel_e09_1): Convert QWORD to 'l' suffix for FP operations; refuse otherwise. * tc-i386.h (DWORD_MNEM_SUFFIX): Kill. (No_dSuf): Kill. * i386.h (*_Suf): Remove No_dSuf. (d_suf, wld_Suf,sld_Suf, sldx_Suf, bwld_Suf, d_FP, sld_FP, sldx_FP) Remove. (i386_optab): Remove 'd' in the suffixes.
2000-10-05Correct handling of non-global syms in linkonce sections.Alan Modra1-2/+9
Tidy a few comments.
2000-09-162000-09-15 Kazu Hirata <kazu@hxi.com> Kazu Hirata1-14/+10
* config/tc-h8300.h: Fix formatting. * config/tc-h8500.c: Likewise. * config/tc-h8500.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.c: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.h: Likewise. * config/tc-ia64.c: Likewise. * config/tc-ia64.h: Likewise.
2000-08-23* config/tc-i386.h <OBJ_MAYBE_ELF, OBJ_MAYBE_COFF>Alexandre Oliva1-1/+1
(TC_FIX_ADJUSTABLE): Define.
2000-08-23* config/tc-i386.h (TC_FIX_ADJUSTABLE): Do *NOT* define if targetAlexandre Oliva1-1/+1
environment is pe.
2000-08-22* write.c (TC_FIX_ADJUSTABLE): Define to 1, if not defined.Alexandre Oliva1-4/+6
(fixup_segment) Use it instead of TC_DONT_FIX_NON_ADJUSTABLE. * config/tc-i386.h (TC_DONT_FIX_NON_ADJUSTABLE): Remove. <OBJ_ELF, OBJ_COFF, TE_PE> (TC_FIX_ADJUSTABLE): Define. * config/tc-arm.h (TC_DONT_FIX_NON_ADJUSTABLE): Remove. <OBJ_ELF> (TC_FIX_ADJUSTABLE): Define. * config/tc-i960.h, config/tc-m68k.h, config/tc-v850.h: Likewise.
2000-08-18* write.c (fixup_segment) [TC_DONT_FIX_NON_ADJUSTABLE]: UseAlexandre Oliva1-0/+4
obj_fix_adjustable() and tc_fix_adjustable() to tell whether to add a symbol's address. Removed all target-specific #ifdefs that used to accomplished the same. * config/tc-v850.h (TC_DONT_FIX_NON_ADJUSTABLE): Define. * config/tc-m68k.h (TC_DONT_FIX_NON_ADJUSTABLE): Define. * config/tc-arm.h (TC_DONT_FIX_NON_ADJUSTABLE): Define. * config/tc-i960.h (TC_DONT_FIX_NON_ADJUSTABLE): Define. * config/tc-i386.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
generated by cgit v1.1 at 2024-09-11 05:47:09 +0000