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2015-03-20Limit multi-byte nop instructions to 10 bytesH.J. Lu1-0/+5
There is no performance advantage to use multi-byte nop instructions greater than 10 bytes. This patch limits multi-byte nop instructions to 10 bytes. Since there is only one way to encode multi-byte nop instructions now, it also removed redundant nop tests. gas/ * config/tc-i386.c (i386_align_code): Limit multi-byte nop instructions to 10 bytes. gas/testsuite/ * gas/i386/i386.exp: Don't run nops-1-bdver1, nops-1-bdver2, nops-1-bdver3, nops-1-bdver4, nops-1-znver1, nops-1-btver1 nops-1-btver2, x86-64-nops-1-nocona, x86-64-nops-1-bdver1, x86-64-nops-1-bdver2, x86-64-nops-1-bdver3, x86-64-nops-1-bdver4, x86-64-nops-1-znver1, x86-64-nops-1-btver1 nor x86-64-nops-1-btver2. * gas/i386/nops-1-core2.d: Updated. * gas/i386/nops-1-k8.d: Likewise. * gas/i386/nops-4a-i686.d: Likewise. * gas/i386/nops-5-i686.d: Likewise. * gas/i386/nops-5.d: Likewise. * gas/i386/nops-6.d: Likewise. * gas/i386/x86-64-nops-1-core2.d: Likewise. * gas/i386/x86-64-nops-1-g64.d: Likewise. * gas/i386/x86-64-nops-1-k8.d: Likewise. * gas/i386/x86-64-nops-1.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. * gas/i386/x86-64-nops-3.d: Likewise. * gas/i386/x86-64-nops-4-core2.d: Likewise. * gas/i386/x86-64-nops-4-k8.d: Likewise. * gas/i386/x86-64-nops-4.d: Likewise. * gas/i386/x86-64-nops-5-k8.d: Likewise. * gas/i386/x86-64-nops-5.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-1.d: Likewise. * gas/i386/ilp32/x86-64-nops-2.d: Likewise. * gas/i386/ilp32/x86-64-nops-3.d: Likewise. * gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise. * gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-4.d: Likewise. * gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-5.d: Likewise. * gas/i386/nops-1-bdver1.d: Removed. * gas/i386/nops-1-bdver2.d: Likewise. * gas/i386/nops-1-bdver3.d: Likewise. * gas/i386/nops-1-bdver4.d: Likewise. * gas/i386/nops-1-btver1.d: Likewise. * gas/i386/nops-1-btver2.d: Likewise. * gas/i386/nops-1-znver1.d: Likewise. * gas/i386/x86-64-nops-1-bdver1.d: Likewise. * gas/i386/x86-64-nops-1-bdver2.d: Likewise. * gas/i386/x86-64-nops-1-bdver3.d: Likewise. * gas/i386/x86-64-nops-1-bdver4.d: Likewise. * gas/i386/x86-64-nops-1-btver1.d: Likewise. * gas/i386/x86-64-nops-1-btver2.d: Likewise. * gas/i386/x86-64-nops-1-nocona.d: Likewise. * gas/i386/x86-64-nops-1-znver1.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
2015-03-19Add support for G13 and G14 flag bits in RL78 ELF binaries.Nick Clifton1-0/+8
inc * rl78.h (E_FLAG_RL78_G10): Redefine. (E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13 E_FLAG_RL78_G14): New flags. bin * readelf.c (get_machine_flags): Decode RL78's G13 and G14 flags. gas * config/tc-rl78.c (enum options): Add G13 and G14. (md_longopts): Add -mg13 and -mg14. (md_parse_option): Handle -mg13 and -mg14. (md_show_usage): List -mg13 and -mg14. * doc/c-rl78.texi: Add description of -mg13 and -mg14 options. bfd * elf32-rl78.c (rl78_cpu_name): New function. Prints the name of the RL78 core based upon the flags. (rl78_elf_merge_private_bfd_data): Handle merging of G13 and G14 flags. (rl78_elf_print_private_bfd_data): Use rl78_cpu_name. (elf32_rl78_machine): Always return bfd_mach_rl78.
2015-03-18Fix debug section compression so that it is only performed if it would make ↵Jon Turney1-0/+9
the section smaller. PR binutils/18087 gas * doc/as.texinfo: Note that when gas compresses debug sections the compression is only performed if it makes the section smaller. * write.c (compress_debug): Do not compress a debug section if doing so would make it larger. tests * gas/i386/dw2-compress-1.d: Do not expect the .debug_abbrev or .debug_info sections to be compressed. binu * doc/binutils.texi: Note that when objcopy compresses debug sections the compression is only performed if it makes the section smaller. bfd * coffgen.c (make_a_section_from_file): Only prepend a z to a debug section's name if the section was actually compressed. * elf.c (_bfd_elf_make_section_from_shdr): Likewise. * compress.c (bfd_init_section_compress_status): Do not compress the section if doing so would make it bigger. In such cases leave the section alone and return COMPRESS_SECTION_NONE.
2015-03-17Add znver1 processorGanesh Gopalasubramanian1-0/+7
2015-03-16Removes a #if 1 ... #endif accidentally left in the source code.Nick Clifton1-0/+4
* dwarf2dbg.c (out_header): Remove spurious #if 1.
2015-03-13[AArch64] Don't warn on XZR/SP overlapping when it's in load/storeJiong Wang1-0/+5
2015-03-13 Jiong Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg number 31. gas/testsuite/ * gas/aarch64/diagnostic.s: New testcases. * gas/aarch64/diagnostic.l: New error match.
2015-03-13[AArch64] Don't tail-pads sections to the alignmentJiong Wang1-0/+4
2015-03-13 Jiong Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero. gas/testsuite/ * gas/aarch64/tail_padding.s: New testcase. * gas/aarch64/tail_padding.d: New expectation file.
2015-03-12Add i6400 entry to the MIPS CPU table.Andrew Bennett1-0/+5
gas/ * config/tc-mips.c (mips_cpu_info_table): Add i6400 entry. * doc/c-mips.texi: Document i6400 -march option.
2015-03-12Fixes a problem generating relocs for thumb function calls to local symbols ↵Nick Clifton1-0/+9
defined in other sections. PR gas/17444 * config/tc-arm.h (MD_APPLY_SYM_VALUE): Pass the current segment to arm_apply_sym_value. Update prototype. * config/tc-arm.c (arm_apply_sym_value): Add segment argument. Do not apply the value if the symbol is in a different segment to the current segment.
2015-03-11Fix powerpc gas abort on invalid instruction fixupsAlan Modra1-0/+5
* config/tc-ppc.c (md_assemble): Don't abort on 8 byte insn fixups. (md_apply_fix): Report an error on data-only fixups used with insns.
2015-03-10S/390: Add check for length field operandAndreas Krebbel1-0/+5
gas/ 2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gas/config/tc-s390.c (md_gather_operands): Check for valid length field operands.
2015-03-10Fixes a bug in the ARM port of GAS when parsing inverted register lists.Michael Perkins1-0/+6
* config/tc-arm.c (parse_operands): Fix bug setting writeback values for '^' on OP_REGLSTs. (do_push_pop): Add new writeback constraint.
2015-03-10[ARM]Fix "align directive causes MAP_DATA symbol to be lost"Sterling Augustine1-0/+5
gas/ 2015-03-10 Renlin Li <renlin.li@arm.com> * config/tc-arm.c (mapping_state): Remove first MAP_DATA emitting code. (mapping_state_2): Emit first MAP_DATA symbol here. gas/testsuite/ 2015-03-05 Renlin Li <renlin.li@arm.com> * gas/arm/dis-data.d: Adjust the desired output. * gas/arm/dis-data2.d: Ditto.
2015-03-10[AArch64] Set the minimum alignment on code segmentsJiong Wang1-0/+5
gas/ 2015-03-10 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (mapping_state): Set minimum alignment for code sections. gas/testsuite 2015-03-10 Matthew Wahab <matthew.wahab@arm.com> * gas/aarch64/codealign.d: Add test for code section alignment. * gas/aarch64/codealign.s: New file.
2015-03-10Fixes a bug building the ARM Linux kernel with a toolchain compiled with ↵Nick Clifton1-0/+6
CPU_DEFAULT set. PR gas/17852 * config/tc-arm.c (md_begin): Ensure that selected_cpu is initialised when CPU_DEFAULT is defined.
2015-03-05Fixes a thinko in the implementation of the V850 -m8byte-align and ↵Nick Clifton1-0/+6
-m4byte-align command line options. * config/tc-v850.c (md_parse_option): Fix code to set or clear EF_RH850_DATA_ALIGN8 bit in ELF header, based upon the use of the -m8byte-align and -m4byte-align command line options.
2015-03-04Allow MOVK for R_AARCH64_TLSLE_MOVW_TPREL_G{0,1}NCRichard Sandiford1-0/+7
bfd/ PR gas/17843 * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Expect R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC to be used with MOVK rather than MOVZ. gas/ PR gas/17843 * config/tc-aarch64.c (process_movw_reloc_info): Allow R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC for MOVK. gas/testsuite/ PR gas/17843 * gas/aarch64/tls.s, gas/aarch64/tls.d: Add test for R_AARCH64_TLSLE_MOVW_TPREL_G0/R_AARCH64_TLSLE_MOVW_TPREL_G1_NC sequence. ld/testsuite/ PR gas/17843 * ld-aarch64/tlsle.s, ld-aarch64/tlsle.d: New test. * ld-aarch64/aarch64-elf.exp: Run it.
2015-02-28Pad only text sections at end by defaultAlan Modra1-0/+5
gas/ * write.c (SUB_SEGMENT_ALIGN): Don't pad non-code sections at end to their alignment. gas/testsuite/ * gas/sparc/pcrel.d: Update for changed padding in data sections. * gas/sparc/pcrel64.d: Likewise. ld/testsuite/ * ld-sparc/gotop32.rd: Update for changed padding in data sections. * ld-sparc/gotop32.td: Likewise. * ld-sparc/gotop64.rd: Likewise. * ld-sparc/gotop64.td: Likewise. * ld-tilegx/external.s: Align .data. * ld-tilepro/external.s: Likewise.
2015-02-26[AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21Marcus Shawcroft1-0/+7
2015-02-26Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.Marcus Shawcroft1-0/+7
2015-02-26Adding support for TLSIE_LD_GOTTREL_PREL19.Marcus Shawcroft1-0/+7
2015-02-26Adding ld_literal_type.Marcus Shawcroft1-0/+6
Extend the address modifier parsing to distinguish between the modifers used in LDR literal and LDR register offset address modes. The current parser incorrectly accepts the :got: modifier on a register offset instruction resulting in silent corruption of the output binary.
2015-02-26Adding adr_type and prevent adr :got:Marcus Shawcroft1-0/+6
The current implementation of the :got: assembler modifier does not distinguish the ADR and ADRP instruction. The :got: modifier does not make sense on and ADR instruction and should be error'd rather than the current behavior of applying an inappropriate relocation to the output and scrambling the underlying instruction silently.
2015-02-26Remove dead code.Marcus Shawcroft1-0/+4
2015-02-25avr/gas: Write out data to track .org/.align usage.Andrew Burgess1-0/+21
Adds support to the assembler to write out data for tracking the use of .org and .align directives. This data is collected within the assembler and written out to a section ".avr.prop" (if there's anything to write out). This patch does not add any tests. The next patch in this series will add a better mechanism for visualising the contents of .avr.prop which will make writing tests much easier. This patch also does not make any use of this collected data, that will also come along in a later patch; the intended consumer is the linker, during linker relaxation this information will be used to ensure that the .org and .align directives are honoured. bfd/ChangeLog: * elf32-avr.h (AVR_PROPERTY_RECORD_SECTION_NAME): Define. (AVR_PROPERTY_RECORDS_VERSION): Define. (AVR_PROPERTY_SECTION_HEADER_SIZE): Define. (struct avr_property_record): New structure. gas/ChangeLog: * config/tc-avr.c: Add elf32-avr.h include. (struct avr_property_record_link): New structure. (avr_output_property_section_header): New function. (avr_record_size): New function. (avr_output_property_record): New function. (avr_create_property_section): New function. (avr_handle_align): New function. (exclude_section_from_property_tables): New function. (create_record_for_frag): New function. (append_records_for_section): New function. (avr_create_and_fill_property_section): New function. (avr_post_relax_hook): New function. * config/tc-avr.h (md_post_relax_hook): Define. (avr_post_relax_hook): Declare. (HANDLE_ALIGN): Define. (avr_handle_align): Declare. (strut avr_frag_data): New structure. (TC_FRAG_TYPE): Define.
2015-02-25[gas][ARM] Document supported ARMv8 cores.Kyrylo Tkachov1-0/+5
2015-02-25 Matthew Wahab <matthew.wahab@arm.com> * doc/c-arm.texi (-mcpu=): Add cortex-a53, cortex-a57 and cortex-a72.
2015-02-24Adds support for generating notes in V850 binaries.Nick Clifton1-0/+11
bfd * elf32-v850.c (v850_set_note): New function. Creates a Renesas style note entry. (v850_elf_make_note_section): New function. Creates a note section. (v850_elf_create_sections): New function. Create a note section if one is not already present. (v850_elf_set_note): New function. Adds a note to a bfd. (v850_elf_copy_private_bfd_data): New function. Copies V850 notes. (v850_elf_merge_notes): New function. Merges V850 notes. (print_v850_note): New function. Displays a V850 note. (v850_elf_print_notes): New function. Displays all notes attached to a bfd. (v850_elf_merge_private_bfd_data): Call v850_elf_merge_notes. (v850_elf_print_private_bfd_data): Call v850_elf_print_notes. (v850_elf_fake_sections): Set the type of the V850 note section. * bfd-in.h (v850_elf_create_sections): Add prototype. (v850_elf_set_note): Add prototype. * bfd-in2.h: Regenerate. binutils* readelf.c (get_machine_flags): Remove deprecated V850 machine flags. (get_v850_section_type_name): New function. Handles V850 special sections. (get_section_type_name): Add support for V850. (get_v850_elf_note_type): New function. Returns the name of a V850 note. (print_v850_note): New function. Prints a V850 note. (process_v850_notes): New function. Prints V850 notes. (process_note_sections): Add support for V850. binutils/testsute * binutils-all/objcopy.exp: Skip the strip-10 test for the V850. gas * config/tc-v850.c (soft_float): New variable. (v850_data_8): New variable. (md_show_usage): Add -msoft-float/-mhard-float. (md_parse_option): Likewise. (md_begin): Set the default value of soft_float. (v850_md_end): New function. Creates a note section. * config/tc-v850.h (md_end): Define. * doc/c-v850.texi: Document -msoft-float/-mhard-float. gas/testsuite * gas/elf/elf.exp: Add special version of the section2 test for the V850. * gas/elf/section2.e-v850: New file. include/elf * v850.h (EF_RH850_SIMD): Delete deprecated flag. (EF_RH850_CACHE): Likewise. (EF_RH850_MMU): Likewise. (EF_RH850_DATA_ALIGN8): Likewise. (SHT_RENESAS_IOP): Fix typo in name. (SHT_RENESAS_INFO): Define. (V850_NOTE_SECNAME): Define. (SIZEOF_V850_NOTE): Define. (V850_NOTE_NAME): Define. (enum v850_notes): New enum. (NUM_V850_NOTES): Define. ld/ChangeLog 2015-02-24 Nick Clifton <nickc@redhat.com> * Makefile.am (ev850.c): Add dependency upon $(srcdir)/emultempl/v850elf.em. (ev850_rh850.c): Likewise. * Makefile.in: Regenerate. * emultempl/v850elf.em: New file. * emulparams/v850.sh (EXTRA_EM_FILE): Define. * emulparams/v850_rh850.sh (EXTRA_EM_FILE): Define. * scripttempl/v850.sc: Add .note.renesas section. * scripttempl/v850_rh850.sc: Likewise. ld/testsuite * ld-elf/extract-symbol-1sec.d: Expect to fail on the V850.
2015-02-23Add support for the h8300-linux target.Yoshinori Sato1-0/+12
ld * Makefile.am: (ALL_EMULATION_SOURCES): Add new emulations. * Makefile.in: Regenerate. * configure.tgt: Add h8300-*-linux * emulparams/h8300elf_linux.sh: Add new emulation. * emulparams/h8300helf_linux.sh: Likewise. * emulparams/h8300self_linux.sh: Likewise. * emulparams/h8300sxelf_linux.sh: Likewise. bfd * config.bfd: Add h8300-*-linux. * configure.ac: Add h8300_elf32_linux_vec. * configure: Regenerate. * elf32-h8300.c: Likewise. * targets.c(_bfd_target_vector): Likewise. gas * config/tc-h8300.c (line_separater_chars): Add a version for h8300-linux that includes a separator. (default_mach): New variable. (md_main): Use it. (md_longopts): Add '--march' option. (md_parse_option): Parse the new option. * config/tc-h8300.h (TARGET_FORMAT): Add elf32-h8300-linux. * configure.tgt: Add h8300-*-linux * doc/c-h8300.texi: Document --march.
2015-02-23Fixes the generation of dwarf line debug information for the msp430, even in ↵Nick Clifton1-0/+9
the presence of function sections and linker garbage collection. PR 17940 * dwarf2dbg.c (out_header): When generating dwarf sections use real symbols not temps for the start and end symbols. * config/tc-msp430.h (TC_FORCE_RELOCATION_SUB_SAME): Also prevent adjustments to relocations in debug sections. (TC_LINKRELAX_FIXUP): Likewise. * elf32-msp430.c (msp430_elf_relax_delete_bytes): Adjust debug symbols at end of sections. Adjust function sizes.
2015-02-19gas doc warning fixesAlan Modra1-0/+5
* doc/as.texinfo (Local Symbol Names): Don't use ':' in pxref. * doc/c-i386.texi: Reorder i386-Bugs after i386-Arch.
2015-02-11[AArch64] Fix code formatting in the cpu-tableJiong Wang1-0/+4
2015-02-11 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (aarch64_cpus): Fix code formatting.
2015-02-11[ARM] Add support for Cortex-A72Jiong Wang1-0/+4
2015-02-11 Matthew Wahab <matthew.wahab@arm.com> * config/tc-arm.c: Add support for Cortex-A72.
2015-02-09[ARM][gas] Use as_tsktsk instead of as_warn for deprecation messages.Kyrylo Tkachov1-0/+15
* config/tc-arm.c (warn_deprecated_sp): Use as_tsktsk instead of as_warn for deprecation messages. (encode_arm_addr_mode_2): Likewise. (check_obsolete): Likewise. (do_rd_rm_rn): Likewise. (do_co_reg): Likewise. (do_setend): Likewise. (do_t_mov_cmp): Likewise. (do_neon_ldr_str): Likewise. (opcode_lookup): Likewise. (if_fsm_post_encode): Likewise. (md_assemble): Likewise. * gas/arm/armv1.l: Remove 'Warning: ' from expected messages for deprecations. * gas/arm/armv8-a-bad.l: Likewise. * gas/arm/armv8-a-it-bad.l: Likewise. * gas/arm/depr-swp.l: Likewise. * gas/arm/ldsgeb.l: Likewise. * gas/arm/ldsgeh.l: Likewise. * gas/arm/thumb2_bad_reg.l: Likewise. * gas/arm/thumb32.l: Likewise. * gas/arm/udf.l: Likewise. * gas/arm/vstr-arm-bad.l: Likewise.
2015-02-06gas: fix a few omissions in .cfi_label handlingJan Beulich1-0/+7
While actually starting to use that new directive, I noticed a few oversights of the original commit. gas/ 2015-02-06 Jan Beulich <jbeulich@suse.com> * dw2gencfi.c (select_cie_for_fde): Also bail on CFI_label. (cfi_change_reg_numbers): Also do nothing for CFI_label. (cfi_pseudo_table): Also handle .cfi_label when not supporting CFI directives.
2015-02-05Fix msp430 build with gcc-5Alan Modra1-0/+5
gcc-5 correctly complains "loop exit may only be reached after undefined behavior". I was going to correct this by checking the index before dereferencing the array rather than the other way around, but then I noticed it is possible for extract_cmd to write the terminating zero one past the end of "cmd". Fixing that means no index check is needed in md_assemble. * config/tc-msp430.c (md_assemble): Correct size passed to extract_cmd. Remove index check.
2015-02-04[AArch64] Add support for Cortex-A72Jiong Wang1-0/+5
2015-02-04 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (aarch64_cpus): Add support for Cortex-A72. * doc/c-aarch64.texi (-mcpu=): Add "cortex-a72".
2015-02-04Fix encoding of "addw ax, [hl]" and "subw ax, [hl]".Nick Clifton1-0/+5
* config/rl78-parse.y (addsubw): Fix encoding of [HL] variant of these instructions.
2015-02-03[AARCH64] Document .arch and .arch_extension directiveJiong Wang1-0/+5
2015-02-03 Renlin Li <renlin.li@arm.com> gas/ * doc/c-aarch64.texi (.arch): Document the directive. (.arch_extension): Likewise.
2015-02-03Fix use of uninitialised memory by the RL78 port of GAS.Nick Clifton1-0/+4
* config/tc-rl78.h (TC_PARSE_CONS_EXPRESSION): Define.
2015-01-28FT32 initial supportAlan Modra1-0/+9
FT32 is a new 32-bit RISC core developed by FTDI for embedded applications. * configure.ac: Add FT32 support. * configure: Regenerate. bfd/ * Makefile.am: Add FT32 files. * archures.c (enum bfd_architecture): Add bfd_arch_ft32. (bfd_mach_ft32): Define. (bfd_ft32_arch): Declare. (bfd_archures_list): Add bfd_ft32_arch. * config.bfd: Handle FT32. * configure.ac: Likewise. * cpu-ft32.c: New file. * elf32-ft32.c: New file. * reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17, BFD_RELOC_FT32_18): Define. * targets.c (_bfd_target_vector): Add ft32_elf32_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * po/SRC-POTFILES.in: Regenerate. binutils/ * readelf.c: Add FT32 support. gas/ * Makefile.am: Add FT32 files. * config/tc-ft32.c: New file. * config/tc-ft32.h: New file. * configure.tgt: Add FT32 support. * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. gas/testsuite/ * gas/ft32/ft32.exp: New file. * gas/ft32/insn.d: New file. * gas/ft32/insn.s: New file. include/ * dis-asm.h (print_insn_ft32): Declare. include/elf/ * common.h (EM_FT32): Define. * ft32.h: New file. include/opcode/ * ft32.h: New file. ld/ * Makefile.am: Add FT32 files. * configure.tgt: Handle FT32 target. * emulparams/elf32ft32.sh: New file. * scripttempl/ft32.sc: New file. * Makefile.in: Regenerate. opcodes/ * Makefile.am: Add FT32 files. * configure.ac: Handle FT32. * disassemble.c (disassembler): Call print_insn_ft32. * ft32-dis.c: New file. * ft32-opc.c: New file. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate.
2015-01-27NDS32/gas: Limit the format of pseudo instruction la.Kuan-Lin Chen1-0/+5
2015-01-27NDS32/gas: Fix md_parse_name hook.Kuan-Lin Chen1-0/+5
2015-01-19Extend .reloc to accept some BFD_RELOCsAlan Modra1-0/+5
Tests that bfd_perform_reloc doesn't freak over a NONE reloc at end of section. gas/ * read.c (s_reloc): Match BFD_RELOC_NONE, BFD_RELOC{8,16,32,64}. * write.c (get_frag_for_reloc): Allow match just past end of frag. gas/testsuite/ * gas/all/none.s, * gas/all/none.d: New test. * gas/all/gas.exp: Run it.
2015-01-16S/390: Add support for IBM z13.Andreas Krebbel1-0/+17
- 32 128 bit vector registers (overlapping with the existing 16 64 bit floating point registers) - vector double instructions - vector integer instructions - scalar vector instructions (allowing to have more floating point registers for scalar operations) - vector string instructions gas/ChangeLog: * config/tc-s390.c (struct pd_reg): Remove. (pre_defined_registers): Remove. (REG_NAME_CNT): Remove. (reg_name_search): Calculate the register number instead of doing a lookup. (register_name, tc_s390_regname_to_dw2regnum): Adopt to the new reg_name_search signature. (s390_parse_cpu): Support the new arch string z13. (s390_insert_operand): Support for vector registers with the extra field for the fifth bit of each vector register operand. (md_gather_operand): Adjust to the new handling of optional parameters. * doc/as.texinfo: Document the z13 cpu string. gas/testsuite/ChangeLog: * gas/s390/esa-g5.d: Add a variant without the optional operand. * gas/s390/esa-g5.s: Likewise. * gas/s390/esa-z9-109.d: Likewise. * gas/s390/esa-z9-109.s: Likewise. * gas/s390/zarch-z9-109.d: Likewise. * gas/s390/zarch-z9-109.s: Likewise. * gas/s390/zarch-z10.d: For variants with a zero optional argument it is not dumped by objdump anymore. * gas/s390/zarch-zEC12.d: Likewise. * gas/s390/zarch-z13.d: New file. * gas/s390/zarch-z13.s: New file. * gas/s390/s390.exp: Run the test for the z13 files. include/opcode/ChangeLog: * s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13. ld/testsuite/ChangeLog: * ld-s390/tlsbin.dd: The nopr register operand is optional and not printed if 0 anymore. opcodes/ChangeLog: * s390-dis.c (s390_extract_operand): Support vector register operands. (s390_print_insn_with_opcode): Support new operands types and add new handling of optional operands. * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove and include opcode/s390.h instead. (struct op_struct): New field `flags'. (insertOpcode, insertExpandedMnemonic): New parameter `flags'. (dumpTable): Dump flags. (main): Parse flags from the s390-opc.txt file. Add z13 as cpu string. * s390-opc.c: Add new operands types, instruction formats, and instruction masks. (s390_opformats): Add new formats for .insn. * s390-opc.txt: Add new instructions.
2015-01-13[ARM] vcmp/vcmpe should accept #0x0 as an operandJiong Wang1-0/+5
gas/ 2015-01-13 Matthew Wahab <matthew.wahab@arm.com> * config/tc-arm.c (parse_ifimm_zero): Accept #0x0 as a synonym for #0, restoring previous behaviour. gas/testsuite/ 2015-01-13 Matthew Wahab <matthew.wahab@arm.com> * gas/arm/ual-vcmp.s: Add vcmp, vcmpe with #0x0 operand. * gas/ual/vcmp.d: Update expected output. * gas/ual/vcmp-zero-bad.l: Likewise
2015-01-12gas: allow labeling of CFI instructionsJan Beulich1-0/+13
When runtime patching code (like e.g. done by the Linux kernel) there may be cases where the set of stack frame alterations differs between unpatched and patched code. Consequently the corresponding unwind data needs patching too. Locating the right places within an FDE, however, is rather cumbersome without a way to insert labels in the resulting section. Hence this patch introduces a new directive, .cfi_label. Note that with the way CFI data gets emitted currently (at the end of the assembly process) this can't support local FB- and dollar-labels. gas/ 2015-01-12 Jan Beulich <jbeulich@suse.com> * gas/dw2gencfi.c (cfi_add_label, dot_cfi_label): New. (cfi_pseudo_table): Add "cfi_label". (output_cfi_insn): Handle CFI_label. (select_cie_for_fde): Als terminate CIE when encountering CFI_label. * dw2gencfi.h (cfi_add_label): Declare. (struct cfi_insn_data): New member "sym_name". (CFI_label): New. * read.c (read_symbol_name): Drop "static". * read.h (read_symbol_name): Declare. gas/testsuite/ 2015-01-12 Jan Beulich <jbeulich@suse.com> gas/cfi/cfi-label.d, gas/cfi/cfi-label.s: New. gas/cfi/cfi.exp: Run new tests.
2015-01-12arm: properly range check immediate operands of VSHL and VQSHLJan Beulich1-0/+5
These two, other than VQSHLU, didn't have their immediates properly range checked so far. (Re-sending unchanged from the original v2 due to never having got an answer to https://sourceware.org/ml/binutils/2013-04/msg00121.html.) gas/ 2015-01-12 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_neon_shl_imm): Check immediate range. (do_neon_qshl_imm): Likewise. gas/testsuite/ 2015-01-12 Jan Beulich <jbeulich@suse.com> * gas/arm/neon-addressing-bad.s: Add test for invalid VSHL, VQSHL, and VQSHLU immediates. * gas/arm/neon-addressing-bad.l: Update accordingly.
2015-01-12Assorted compiler warning fixesAlan Modra1-0/+4
The C standard doesn't guarantee a function pointer can be cast to void* and vice versa. binutils/ * prdbg.c (print_debugging_info): Don't use void* for function pointer param. * budbg.h (print_debugging_info): Update prototype. gas/ * read.c (s_altmacro, s_reloc): Make definition static.
2015-01-10gas/avr: Prevent incorrect overflow errors for diff fixups.Andrew Burgess1-0/+5
When fixups are converted to a difference type within md_apply_fix, we previously left the contents of VALP (the value that was initially computed within write.c:fixup_segment) unchanged. This is harmless, except that this value is used within write.c:fixup_segment once we return from md_apply_fix to perform an overflow check. In some cases, the value computed in write.c:fixup_segment is so wrong that an overflow error can be triggered. These errors are incorrect. This patch avoids the overflow errors by adjusting the value in write.c:fixup_segment using the VALP pointer in md_apply_fix. A test for this issue is included. gas/ChangeLog: * config/tc-avr.c (md_apply_fix): Update the contents of VALP for diff fixups. gas/testsuite/ChangeLog: * gas/avr/large-debug-line-table.d: New file. * gas/avr/large-debug-line-table.s: New file.
2015-01-09This patch adds the necessary support to the assembler to allow wiringPhilipp Tomsich1-0/+6
the X-Gene scheduling description up in the respective GCC backend. * config/tc-arm.c (arm_cpus): Add support for APM X-Gene 1 and X-Gene 2. * doc/c-arm.texi (ARM Options): Mention xgene1 and xgene2.
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