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masking facility for PATH3 transfers.
[ChangeLog.sky]
Sun Apr 5 12:11:45 1998 Frank Ch. Eigler <fche@cygnus.com>
* sky-libvpe.c (exec-inst): Added "M" bit detection for upper
instruction.
* sky-pke.c (pke_check_stall): Added more assertions.
(pke_code_mskpath3): Use new GPUIF M3P control register.
* sky-pke.h (VU[01]_CIA): New macros that give VU CIA
pseudo-register addresses.
* sky-vu.h (vu_device, VectorUnitState): Merged structs.
(VectorUnitState.mflag): New field.
(VU_REG_{CMSAR0,CMSAR1,FBRST}) Added missing control registers.
* sky-vu.c (vu0_busy): New function.
(vu0_q_busy): New function.
(vu0_macro_issue): New function.
(vu0_micro_interlock_released): New function.
(vu0_busy_in_{micro,macro}_mode): Deleted stubs.
(vu0_macro_hazard_check): Deleted stubs.
(vu_attach): Adapted code to merged device & state struct.
(read_vu_special_reg): Compute VBS0/VBS1 bits in STAT register.
[ChangeLog]
start-sanitize-sky
Sun Apr 5 12:05:44 1998 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (*): Adapt code to merged VU device & state structs.
(decode_coproc): Execute COP2 each macroinstruction without
pipelining, by stepping VU to completion state. Adapted to
read_vu_*_reg style of register access.
* mips.igen ([SL]QC2): Removed these COP2 instructions.
* r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
* sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
end-sanitize-sky
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Sun Apr 5 12:34:56 1998 Frank Ch. Eigler <fche@cygnus.com>
* t-pke3.trc: Modified to confirm parts of GPUIF PATH3-masking
functionality.
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mips/*: Tune mips simulator - allow all memory transfer code to be inlined.
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Make IGEN responsible for co-ordinating inlining of generated files.
By default, aclocal.m4 disabled all inlining.
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* gas/dvp/dvp.exp: Run it.
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own fragment.
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writes.
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(MOSTLYCLEANFILES): Add binutils.log, binutils.sum, and abcdefgh*.
(mostlyclean-local): New target.
* Makefile.in: Rebuild.
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(DISTCLEANFILES): Add site.exp and site.bak.
* Makefile.in: Rebuild.
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rather than in a shell variable and using AC_SUBST.
* Makefile.am (DISTCLEANFILES): Remove ldscripts. Add tdirs.
(distclean-local): New target.
* configure, Makefile.in: Rebuild.
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* i386.h: Remove NoModrm flag from all insns: it's never checked.
Add IsString flag to string instructions.
(IS_STRING): Don't define.
(LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
(ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
(SS_PREFIX_OPCODE): Define.
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* config/tc-i386.h: Reorder operand flags and opcode modifier
flags for clarity. Remove unused definitions: Unknown,
ImmUnknown, DispUnknown, NoModrm.
* config/tc-i386.c (type_names): Add missing Debug type.
(md_assemble): Better duplicate prefix checking. Quicker string
instruction check via new opcode_modifier flag.
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<schwab@issan.informatik.uni-dortmund.de>
* elf32-m68k.c (elf_m68k_size_dynamic_sections): Generate section
symbols when creating a shared library.
(elf_m68k_adjust_dynindx): New function, used by above code.
(elf_m68k_finish_dynamic_sections): Initialize the section
symbols.
(elf_m68k_relocate_section): Change abort to BFD_ASSERT.
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(s_mips_weakext): Define.
* ecoff.c (ecoff_directive_weakext): Don't define if defined(TC_MIPS).
* config/obj-ecoff.c (obj_pseudo_table): Don't add weakext if
defined(TC_MIPS).
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is an error if the value can not be computed at assembly time.
* config/tc-mn10300.c (tc_gen-reloc): Likewise.
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NULL. From Avery Pennarun <averyp@gdc.ca>.
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* LRS: Reformat a bit to keep text under 80 columns.
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* remote.texi: Mention mips monitor targets.
* gdbint.texinfo: Describe SP_REGNUM, STEP_SKIPS_DELAY.
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* Makefile.in: add ash make rules
* configure.in: add ash to native_only and host_tools lists
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* interp.c: incorporate vif register load/store
* sky-pke.[ch]: add register load/store routines
* sku-vu.c: P register is float
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ISAs.
Enable tx39 as igen again.
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Thu Apr 2 12:47:41 1998 Frank Ch. Eigler <fche@cygnus.com>
* sol-thread.c (sol_thread_store_registers): Save & restore new
value of single updated register to prevent accidental clobbering.
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* config/sparc/sparclite.mt: Link in the erc32 simulator.
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regardless of the target's word bitsize.
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* ns32k-tdep.c (flip_bytes, ns32k_localcount,
ns32k_get_enter_addr, sign_extend): Restore functions mysteriously
deleted.
* ns32knbsd-nat.c: New (?) file to support fetching and storing
registers on NetBSD hosts.
* nbsd.mh (NATDEPFILES): put ns32knbsd-nat.o instead of
ns32k-nat.o
* ns32km3-nat.c (reg_offset): Get order of floating point
registers correct. Add extra 32382 register offsets.
(REG_ADDRESS): define to point at correct part of thread
state. Use calls to "warning" instead of "message".
* tm-nbsd.h, tm-ns32km3.h (REGISTER_NAMES, NUM_REGS,
REGISTER_BYTES, REGISTER_BYTE): redefine allowing for 32382
fpu registers.
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* ns32k-dis.c (bit_extract_simple): New function to extract bits
from an arbitrary valid buffer instead of fetching them on demand
using fetch_data().
(invalid_float): use bit_extract_simple() instead of bit_extract().
contributed to me for gdb 4.17.
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* NEWS: m68k-motorola-sysv host support added.
* coffread.c (coff_start_symtab): Accept the filename as an argument,
set it here. Callers updated.
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<hjl@gnu.org>:
* ar.c (usage): Mention S modifier.
(main): Add S modifier.
* ar.1, binutils.texi: Document S modifier.
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(richard.earnshaw@arm.com) to fix addressing mode 2 using rrx.
Add super interworking support.
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<schwab@issan.informatik.uni-dortmund.de>
* elf32-m68k.c (elf_m68k_relocate_section, case R_68K_PLT*O): Fix
assertion.
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<schwab@issan.informatik.uni-dortmund.de>
* doc/as.texinfo: Use @itemx for a secondary item in a table.
* doc/c-hppa.texi: Likewise.
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<schwab@issan.informatik.uni-dortmund.de>
* binutils.texi: Use @itemx for a secondary item in a table.
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interp.c: integrate VU register read/writes
sim-main.h : track tm-txvu.h
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of REL style.
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for relocation.
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