aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2024-01-01sim: use build-gnulib with build-time tools [PR sim/30882]users/vapier/sim/gnulib-buildMike Frysinger30-23/+80
Some of our build-time tools are fairly complicated and require some POSIX APIs that the build system doesn't provide. Leverage the new build-gnulib tree to provide fallback implementations automatically.
2024-01-01gnulib: enable a --build setup for sim [PR sim/30882]Mike Frysinger4-0/+71
The sim tree has some build-time programs for generating source files that are a bit complicated and expect a POSIX-compatible system. Use the existing gnulib project to provide missing APIs.
2024-01-01gnulib: support building for --build [PR sim/30882]Mike Frysinger5-19/+65
The sim tree has some build-time programs for generating source files that are a bit complicated and expect a POSIX-compatible system. But some targets (e.g. mingw) might not provide up-to-date support. Since we already have gnulib in the tree, leverage that to also build for the --build system. The top-level configure logic will pass down --with-build-subdir when the subdir is built for it. Use that to adjust the output variable names and paths. This allows us to include the gnulib makefile frags for both --host and --build simultaneously.
2024-01-01sim: ppc: merge misc igen APIsMike Frysinger10-292/+82
The common igen code provides the same misc APIs as the ppc version, so delete the ppc code and pull in the common one. There is one minor difference: the ppc code has a unique dumpf function. The common code switched to lf_printf for the same functionality, but since that requires changes throughout the igen codebase, delay that cleanup for now so we can merge the rest.
2024-01-01sim: ppc: rework igen error to match commonMike Frysinger10-22/+25
Switch to an ERROR macro and tweak the error signature to match the common igen version in preparation for merging the two implementations.
2024-01-01sim: igen: extend error to take argumentsMike Frysinger1-2/+2
The ppc igen error helper allows arbitrary printf calls, so extend the common one to do the same.
2024-01-01sim: ppc: rename igen max_insn_bit_sizeMike Frysinger3-5/+5
We want to avoid conflicts with the common igen enums. This should get migrated over to the common parsing logic, but for now, switch the name to avoid redefinition.
2024-01-01sim: igen: minor constify logicMike Frysinger1-2/+2
Copy some improvements from the ppc igen code.
2024-01-01sim: ppc: unify igen filter_filename implementationsMike Frysinger7-91/+8
Now that both igen implementations are in the top-level, we can unify the filter_filename implementation between them since they're the same (literally the same code).
2024-01-01sim: ppc: replace filter_filename with lbasenameMike Frysinger2-15/+8
The lbasename function from libiberty provides the same API as this custom function. The common/ code already made the switch, so make the same change to the ppc code to avoid target duplication.
2024-01-01sim: ppc: hoist igen compilation into top-levelMike Frysinger3-153/+325
This simplifies the build a bit (especially for deps in port subdirs), and avoids recursive make. This in turn speeds up the build, and lets us reuse existing build-time vs host-time logic from Makefile.am.
2024-01-01sim: ppc: drop build-config.h usageMike Frysinger8-73/+0
This header is only used by the igen tool, and none of the igen code depends on the configure-time checks. Delete the logic to simplify to prepare for moving it to the local.mk code.
2024-01-01sim: ppc: simplify filter_host.c logicMike Frysinger2-7/+19
Switch this from a build-time generation to a static include. This makes the build rules a bit simpler, especially as we move them to Automake from hand-written makefiles.
2024-01-01sim: igen: remove libigen.a when cleaningMike Frysinger2-8/+8
2024-01-01sim: ppc: drop unused host bitsize settingsMike Frysinger3-5/+0
This is never set anywhere, so it's always empty. Scrub it.
2024-01-01sim: frv: fix cmpb uninitialized variable usageMike Frysinger2-0/+2
This code sets up the cc variable based on the comparison of other registers, but it does so incrementally with bit operations, and it never initializes the cc variable. Initialize it to 0 which the cmpba insn is already doing.
2024-01-01sim: arm: mark local read-only arrays as static constMike Frysinger1-2/+2
Move it into read-only data sections to avoid constructing them on the stack at runtime.
2024-01-01sim: warnings: enable -Wunused-variableMike Frysinger2-2/+2
2024-01-01cpu: or1k: drop unused l.swa flagMike Frysinger3-3/+1
The "flag" argument isn't set/used in this insn, so drop it. This fixes an unused variable warning in the generated sim.
2024-01-01sim: fix pervasive typoTom Tromey9-42/+42
I noticed a typo in a sim constant. This patch fixes it. permenant -> permanent
2024-01-01Automatic date update in version.inGDB Administrator1-1/+1
2023-12-31Run 'black' on tui-window.pyTom Tromey1-2/+4
Mark pointed out that a recent patch of mine caused the buildbot to complain about the formatting of some Python test code. This patch re-runs 'black' to fix the problem.
2023-12-31[gdb/testsuite] Fix typo in gdb.base/catch-syscall.expTom de Vries1-1/+1
On aarch64-linux with a gdb build without libexpat, I run into: ... (gdb) PASS: gdb.base/catch-syscall.exp: determine pipe syscall: \ catch syscall 59 continue Continuing. Catchpoint 5 (call to syscall 59), 0x0000fffff7e04578 in pipe () from \ /lib64/libc.so.6 (gdb) FAIL: gdb.base/catch-syscall.exp: determine pipe syscall: continue ... In the test-case, this pattern handles either the syscall name or number for the pipe syscall: ... -re -wrap "Catchpoint $decimal \\(call to syscall (pipe|$SYS_pipe)\\).*" { ... but the pattern for the pipe2 syscall mistakenly uses SYS_pipe instead of SYS_pipe2: ... -re -wrap "Catchpoint $decimal \\(call to syscall (pipe2|$SYS_pipe)\\).*" { ... and consequently doesn't handle the pipe2 syscall number. Fix the typo by using SYS_pipe2 instead. Tested on aarch64-linux.
2023-12-31Automatic date update in version.inGDB Administrator1-1/+1
2023-12-30Add keywords to TuiWindow.writeTom Tromey2-4/+8
The gdb docs promise that methods with more than two or more arguments will accept keywords. However, I found that TuiWindow.write didn't allow them. This patch adds the missing support.
2023-12-30[gdb/testsuite] Fix gdb.base/gdb-index-err.exp for root userTom de Vries1-1/+7
When running test-case gdb.base/gdb-index-err.exp in a container as root user, I run into: ... FAIL: gdb.base/gdb-index-err.exp: flag=: \ try to write index to a non-writable directory FAIL: gdb.base/gdb-index-err.exp: flag=-dwarf-5: \ try to write index to a non-writable directory ... The test-case creates a directory without write permissions: ... $ ls -ald private dr-xr-xr-x 2 root root 4096 Dec 29 06:26 private/ ... but apparently the root user is still able to write in it. Fix this by making the test unsupported for the root user. Tested on x86_64-linux. Reviewed-By: Lancelot SIX <lancelot.six@amd.com> PR testsuite/31197 Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31197
2023-12-30LoongArch: Commas inside double quotesAlan Modra1-1/+5
This adds an extra feature: Commas inside double quotes are not an arg delimiter, and thus can be part of the arg. * loongarch-coder.c (loongarch_split_args_by_comma): Commas inside quotes are not arg delimiters.
2023-12-30Regen bfd-in2.hAlan Modra1-1/+0
Please DON'T edit this file. READ THE COMMENT!
2023-12-30MAINTAINERS: Update my email addressJoseph Myers2-2/+2
There will be another update in January.
2023-12-30Automatic date update in version.inGDB Administrator1-1/+1
2023-12-29x86: Append "#pass" to APX testsH.J. Lu5-0/+5
Append "#pass" to APX tests for targets which pad text sections with NOPs. * testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d: Append "#pass". * testsuite/gas/i386/x86-64-apx-ndd-optimize.d: Likewise. * testsuite/gas/i386/x86-64-apx-ndd.d: Likewise. * testsuite/gas/i386/x86-64-apx-pushp-popp-intel.d: Likewise. * testsuite/gas/i386/x86-64-apx-pushp-popp.d: Likewise.
2023-12-29x86: Don't use .insn with '/'H.J. Lu1-3/+3
'/' starts a comment for some targets. Use .byte instead of .insn with '/'. * testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s: Use .byte instead of .insn with '/'.
2023-12-29Fix x86-64: Add R_X86_64_CODE_4_GOTPCRELXH.J. Lu1-0/+1
commit 3d5a60de52556f6a53d71d7e607c6696450ae3e4 Author: H.J. Lu <hjl.tools@gmail.com> Date: Thu Jun 8 10:01:03 2023 -0700 x86-64: Add R_X86_64_CODE_4_GOTPCRELX added a new field, fx_tcbit3, to fix. But it didn't initialize it. Fix it by clearing it in fix_new_internal. * wrtite.c (fix_new_internal): Clear fx_tcbit3.
2023-12-29dwarf, fortran: add support for DW_TAG_entry_pointNils-Christian Kempke8-5/+479
Fortran provides additional entry points for subroutines and functions. These entry points may use only a subset (or a different set) of the parameters of the original subroutine. The entry points may be described via the DWARF tag DW_TAG_entry_point. This commit adds support for parsing the DW_TAG_entry_point DWARF tag. Currently, between ifx/ifort/gfortran, only ifort is actually emitting this tag. Both, ifx and gfortran use the DW_TAG_subprogram tag as workaround/alternative. Thus, this patch really only adds more ifort support. Even so, some of the attached tests still fail for ifort, due to some wrong line info generated for the entry points in ifort. After this patch it is possible to set a breakpoint in gdb with the ifort compiled example at the entry points 'foo' and 'foobar', which was not possible before. As gcc and ifx do not emit the tag I also added a test to gdb.dwarf2 which uses some underlying c compiled code and adds some Fortran style DWARF to it emitting the DW_TAG_entry_point. Before this patch it was not possible to actually define breakpoint at the entry point tags. For gfortran there actually exists a bug on bugzilla, asking for the use of DW_TAG_entry_point over DW_TAG_subprogram: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=37134 This patch was originally posted here https://sourceware.org/legacy-ml/gdb-patches/2017-07/msg00317.html but its review/pinging got lost after a while. I reworked it to fit the current GDB. Co-authored-by: Bernhard Heckel <bernhard.heckel@intel.com> Co-authored-by: Tim Wiederhake <tim.wiederhake@intel.com> Approved-by: Tom Tromey <tom@tromey.com>
2023-12-29gdb, dwarf: add assert to dwarf2_get_pc_boundsNils-Christian Kempke1-0/+1
In dwarf2_get_pc_bounds we were writing unchecked to *lowpc. This commit adds a gdb_assert to first check that lowpc != nullptr. Approved-by: Tom Tromey <tom@tromey.com>
2023-12-29gdb, dwarf: move part of dwarf2_get_pc_bounds into separate functionNils-Christian Kempke1-21/+50
This commit is in preparation of the next commit. There, we will add a second variation to retrieve the pc bounds for DIEs tagged with DW_TAG_entry_point. Instead of dwarf_get_pc_bounds_ranges_or_highlow_pc we will call a separate method for entry points. As the validity checks at the endo f dwarf2_get_pc_bounds are the same for both variants, we introduced the new dwarf_get_pc_bounds_ranges_or_highlow_pc method, outsourcing part of dwarf2_get_pc_bounds. This commit should have no functional impact on GDB. Approved-by: Tom Tromey <tom@tromey.com>
2023-12-29LoongArch: ld: Add support for tls le relax.changjiachen6-1/+320
Add tls le relax related testsuites in ld. The new test cases are mainly tested in three aspects: 1. tls le relax function correctness test. 2. tls le relax boundary check test. 3. tls le relax function compatibility test. ld/testsuite/ChangeLog: * ld/testsuite/ld-loongarch-elf/relax.exp: Modify test. * ld/testsuite/ld-loongarch-elf/old-tls-le.s: New test. * ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s: Likewise. * ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s: Likewise. * ld/testsuite/ld-loongarch-elf/relax-tls-le.s: Likewise. * ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s: Likewise.
2023-12-29LoongArch: gas: Add support for tls le relax.changjiachen5-0/+85
Add tls le relax related relocs support and testsuites in gas. The main test is three new relocation items, R_LARCH_TLS_LE_ADD_R, R_LARCH_TLS_LE_HI20_R, R_LARCH_TLS_LE_LO12_R can be generated properly and tls le insn format check. gas/ChangeLog: * config/tc-loongarch.c: (loongarch_args_parser_can_match_arg_helper): Add support for relax. * gas/testsuite/gas/loongarch/reloc.d: Likewise. * gas/testsuite/gas/loongarch/reloc.s: Likewise. * gas/testsuite/gas/loongarch/loongarch.exp: Likewise. * gas/testsuite/gas/loongarch/tls_le_insn_format_check.s: New test.
2023-12-29LoongArch: opcodes: Add support for tls le relax.changjiachen1-0/+1
Add new opcode for tls le relax. opcode/ChangeLog: * loongarch-opc.c: Add new loongarch opcode.
2023-12-29LoongArch: include: Add support for tls le relax.changjiachen1-0/+12
Add new relocs number for tls le relax. include/ChangeLog: * elf/loongarch.h: (RELOC_NUMBER (R_LARCH_TLS_LE_HI20_R, 121)): New relocs number. (RELOC_NUMBER (R_LARCH_TLS_LE_ADD_R, 122)): Likewise. (RELOC_NUMBER (R_LARCH_TLS_LE_LO12_R, 123)): Likewise.
2023-12-29LoongArch: bfd: Add support for tls le relax.changjiachen6-5/+169
Add tls le relax support and related relocs in bfd. New relocation related explanation can refer to the following url: https://github.com/loongson/la-abi-specs/blob/release/laelf.adoc This support does two main things: 1. Implement support for three new relocation items in bfd. The three new relocation items are shown below: R_LARCH_TLS_LE_ADD_R R_LARCH_TLS_LE_HI20_R R_LARCH_TLS_LE_LO12_R 2. ADD a new macro RELOCATE_TLS_TP32_HI20 Handle problems caused by symbol extensions in TLS LE, The processing is similar to the macro RELOCATE_CALC_PC32_HI20 method. 3. Implement the tls le relax function. bfd/ChangeLog: * bfd-in2.h: Add relocs related to tls le relax. * elfnn-loongarch.c: (loongarch_relax_tls_le): New function. (RELOCATE_TLS_TP32_HI20): New macro. (loongarch_elf_check_relocs): Add new reloc support. (perform_relocation): Likewise. (loongarch_elf_relocate_section): Handle new relocs related to relax. (loongarch_elf_relax_section): Likewise. * elfxx-loongarch.c: (LOONGARCH_HOWTO (R_LARCH_TLS_LE_ADD_R)): New reloc how to type. (LOONGARCH_HOWTO (R_LARCH_TLS_LE_HI20_R)): Likewise. (LOONGARCH_HOWTO (R_LARCH_TLS_LE_LO12_R)): Likewise. * libbfd.h: Add relocs related to tls le relax. * reloc.c: Likewise.
2023-12-29RISC-V: THEAD: Add 5 assembly pseudoinstructions for XTheadVector extensionJin Ma3-0/+29
In order to make it easier to complete the compiler's support for the XTheadVector extension and to be as compatible as possible with the programming model of the 'V' extension ([1]), we consider adding a few pseudo instructions ([2]). th.vmmv.m vd,vs => th.vmand.mm vd,vs,vs th.vneg.v vd,vs => th.vrsub.vx vd,vs,x0 th.vncvt.x.x.v vd,vs,vm => th.vnsrl.vx vd,vs,x0,vm th.vfneg.v vd,vs => th.vfsgnjn.vv vd,vs,vs th.vfabs.v vd,vs => th.vfsgnjx.vv vd,vs,vs Ref: [1] https://gcc.gnu.org/pipermail/gcc-patches/2023-December/641302.html [2] https://github.com/T-head-Semi/thead-extension-spec/pull/40 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for new pseudoinstructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. opcodes/ChangeLog: * riscv-opc.c: Add new pseudoinstructions.
2023-12-29Automatic date update in version.inGDB Administrator1-1/+1
2023-12-28ld: Mention support for Intel APX relocations in NEWSH.J. Lu1-0/+2
2023-12-28Gold: Handle R_X86_64_CODE_4_GOTPC32_TLSDESC/R_X86_64_CODE_4_GOTTPOFFH.J. Lu8-37/+203
Handle R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC. Convert add name@gottpoff(%rip), %reg mov name@gottpoff(%rip), %reg to add $name@tpoff, %reg mov $name@tpoff, %reg and lea name@tlsdesc(%rip), %reg to mov $name@tpoff, %reg mov name@gottpoff(%rip), %reg if the instruction is encoded with the REX2 prefix when possible. elfcpp/ * x86_64.h (R_X86_64_CODE_4_GOTTPOFF): New. (R_X86_64_CODE_4_GOTPC32_TLSDESC): Likewise. gold/ * x86_64.cc (Target_x86_64::optimize_tls_reloc): Handle R_X86_64_CODE_4_GOTPC32_TLSDESC and R_X86_64_CODE_4_GOTTPOFF. (Target_x86_64::Scan::get_reference_flags): Likewise. (Target_x86_64::Scan::local): Likewise. (Target_x86_64::Scan::global): Likewise. (Target_x86_64::Relocate::relocate): Likewise. (Target_x86_64::Relocate::relocate_tls): Likewise. (Target_x86_64::Relocate::tls_desc_gd_to_ie): Handle R_X86_64_CODE_4_GOTPC32_TLSDESC. (Target_x86_64::Relocate::tls_desc_gd_to_le): Likewise. (Target_x86_64::Relocate::tls_ie_to_le): Handle. R_X86_64_CODE_4_GOTTPOFF. * testsuite/Makefile.am: Add x86_64_ie_to_le test. * testsuite/Makefile.in: Regenerated. * testsuite/x86_64_gd_to_le.s: Add R_X86_64_CODE_4_GOTPC32_TLSDESC test. * testsuite/x86_64_gd_to_le.sh: Check GDesc to LE conversion. * testsuite/x86_64_ie_to_le.s: New file. * testsuite/x86_64_ie_to_le.sh: Likewise.
2023-12-28x86-64: Add R_X86_64_CODE_4_GOTTPOFF/R_X86_64_CODE_4_GOTPC32_TLSDESCH.J. Lu14-21/+329
For add name@gottpoff(%rip), %reg mov name@gottpoff(%rip), %reg add # define R_X86_64_CODE_4_GOTTPOFF 44 and for lea name@tlsdesc(%rip), %reg add # define R_X86_64_CODE_4_GOTPC32_TLSDESC 45 if the instruction starts at 4 bytes before the relocation offset. They are similar to R_X86_64_GOTTPOFF and R_X86_64_GOTPC32_TLSDESC, respectively. Linker can covert GOTTPOFF to add $name@tpoff, %reg mov $name@tpoff, %reg and GOTPC32_TLSDESC to mov $name@tpoff, %reg mov name@gottpoff(%rip), %reg if the instruction is encoded with the REX2 prefix when possible. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. (elf_x86_64_check_tls_transition): Handle R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC. (elf_x86_64_tls_transition): Likewise. (elf_x86_64_scan_relocs): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. (md_assemble): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF. (output_insn): Don't add empty REX prefix with REX2 prefix. (output_disp): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. (md_apply_fix): Likewise. (i386_validate_fix): Generate BFD_RELOC_X86_64_CODE_4_GOTTPOFF or BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC if ixp->fx_tcbit3 is set. (tc_gen_reloc): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. * testsuite/gas/i386/x86-64-gottpoff.d: New file. * testsuite/gas/i386/x86-64-gottpoff.s: Likewise. * testsuite/gas/i386/x86-64-tlsdesc.d: Likewise. * testsuite/gas/i386/x86-64-tlsdesc.s: Likewise. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC ld/ * testsuite/ld-x86-64/tlsbindesc.d: Updated. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc.s: Add R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC tests.
2023-12-28gold: Handle R_X86_64_CODE_4_GOTPCRELXH.J. Lu8-10/+54
Handle R_X86_64_CODE_4_GOTPCRELX and convert mov name@GOTPCREL(%rip), %r31 to lea name@GOTPCREL(%rip), %r31 if the instruction is encoded with the REX2 prefix when possible. elfcpp/ * x86_64.h (R_X86_64_CODE_4_GOTPCRELX): New. gold/ * x86_64.cc (Target_x86_64::can_convert_mov_to_lea): Handle R_X86_64_CODE_4_GOTPCRELX. (Target_x86_64::Scan::get_reference_flags): Likewise. (Target_x86_64::Scan::local): Likewise. (Target_x86_64::Scan::possible_function_pointer_reloc): Likewise. (Target_x86_64::Scan::global): Likewise. (Target_x86_64::Relocate::relocate): Likewise. * testsuite/x86_64_mov_to_lea1.s: Add a test for R_X86_64_CODE_4_GOTPCRELX. * testsuite/x86_64_mov_to_lea2.s: Likewise. * testsuite/x86_64_mov_to_lea3.s: Likewise. * testsuite/x86_64_mov_to_lea4.s: Likewise. * testsuite/x86_64_mov_to_lea5.s: Likewise. * testsuite/x86_64_mov_to_lea.sh: Updated.
2023-12-28x86-64: Add R_X86_64_CODE_4_GOTPCRELXH.J. Lu19-27/+382
For mov name@GOTPCREL(%rip), %reg test %reg, name@GOTPCREL(%rip) binop name@GOTPCREL(%rip), %reg where binop is one of adc, add, add, cmp, or, sbb, sub, xor instructions, add # define R_X86_64_CODE_4_GOTPCRELX 43 if the instruction starts at 4 bytes before the relocation offset. It similar to R_X86_64_GOTPCRELX. Linker can treat R_X86_64_CODE_4_GOTPCRELX as R_X86_64_GOTPCREL or convert the above instructions to lea name(%rip), %reg mov $name, %reg test $name, %reg binop $name, %reg if the instruction is encoded with the REX2 prefix when possible. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_4_GOTPCRELX. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (elf_x86_64_convert_load_reloc): Handle R_X86_64_CODE_4_GOTPCRELX. (elf_x86_64_scan_relocs): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * write.h (fix): Add fx_tcbit3. Change fx_unused to 1 bit. * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (tc_gen_reloc): Likewise. (output_disp): Set fixP->fx_tcbit3 for REX2 prefix. (i386_validate_fix): Generate BFD_RELOC_X86_64_CODE_4_GOTPCRELX if fixp->fx_tcbit3 is set. * config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (TC_FORCE_RELOCATION_ABS): Likewise. * testsuite/gas/i386/x86-64-gotpcrel.s: Add tests for R_X86_64_CODE_4_GOTPCRELX. * testsuite/gas/i386/x86-64-localpic.s: Likewise. * testsuite/gas/i386/x86-64-gotpcrel.d: Updated. * testsuite/gas/i386/x86-64-localpic.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_4_GOTPCRELX. ld/ * testsuite/ld-x86-64/apx-load1.s: New file. * testsuite/ld-x86-64/apx-load1a.d: Likewise. * testsuite/ld-x86-64/apx-load1b.d: Likewise. * testsuite/ld-x86-64/apx-load1c.d: Likewise. * testsuite/ld-x86-64/apx-load1d.d: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run apx-load1a, apx-load1b, apx-load1c and apx-load1d.
2023-12-28gas: Mention initial support for Intel APX in NEWSH.J. Lu1-0/+2
2023-12-28x86: Add NT_X86_SHSTK noteSchimpe, Christina2-0/+5
Define NT_X86_SHSTK which is the note for x86 Shadow Stack (SHSTK) to support Intel SHSTK in Linux kernel. For now only userspace shadow stack and kernel IBT are supported by the linux kernel. This note should be used instead of NT_X86_CET introduced in the commit "x86: Add NT_X86_CET note", as it is outdated and only used by old binutils versions.
generated by cgit v1.1 at 2024-07-17 04:54:06 +0000