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2006-05-26daily updateAlan Modra1-1/+1
2006-05-26*** empty log message ***gdbadmin1-1/+1
2006-05-25 * src-release (DEVO_SUPPORT): Add config.rpath.Daniel Jacobowitz2-1/+5
2006-05-25 * elf.c (sym_is_global): Return a bfd_boolean.Alan Modra2-36/+39
(ignore_section_sym): New function. (elf_map_symbols): Use ignore_section_sym to discard some syms. (_bfd_elf_symbol_from_bfd_symbol): Ensure section belongs to bfd before using elf_section_syms.
2006-05-25 * MAINTAINERS: Update my email address.Joern Rennecke2-1/+5
2006-05-252006-05-25 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-12/+36
* config.bfd: (sh-*-linux*): Treat as 64bit target. (sh*l*-*-netbsdelf*): Likewise. (sh-*-netbsdelf*): Likewise. (shl*-*-elf*): Likewise. (sh[1234]l*-*-elf*): Likewise. (sh3el*-*-elf*): Likewise. (shl*-*-kaos*): Likewise. (sh-*-elf*): Likewise. (sh[1234]*-elf*): Likewise. (sh-*-rtems*): Likewise. (sh-*-kaos*): Likewise.
2006-05-25include/opcodes/Richard Sandiford8-37/+107
* m68k.h (mcf_mask): Define. opcodes/ * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd and fmovem entries. Put register list entries before immediate mask entries. Use "l" rather than "L" in the fmovem entries. * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it out from INFO. (m68k_scan_mask): New function, split out from... (print_insn_m68k): ...here. If no architecture has been set, first try printing an m680x0 instruction, then try a Coldfire one. gas/testsuite/ * gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions. * gas/m68k/mcf-fpu.d: Adjust accordingly.
2006-05-252006-05-25 Paolo Bonzini <bonzini@gnu.org>Paolo Bonzini4-10/+17
* Makefile.def (bfd, opcodes): Fix lib_path. * Makefile.tpl (POSTSTAGE1_FLAGS_TO_PASS): Replace ADAC with ADAFLAGS. (restrap): Move under "@if gcc-bootstrap". Fix typo. * Makefile.in: Regenerate.
2006-05-25 * gas/bfin/vector2.s, gas/bfin/vector2.d: Test to ensure (m) is notJie Zhang3-0/+13
thrown away.
2006-05-25 * config/bfin-parse.y (asm_1): Better check and deal withJie Zhang2-38/+44
vector and scalar Multiply 16-Bit Operands instructions.
2006-05-25bfd/H.J. Lu5-19/+501
2006-05-24 H.J. Lu <hongjiu.lu@intel.com> PR ld/1485 * config.bfd: Set want64 to true if 64bit bfd is used. (sh-*-linux*): Use targ64_selvecs for 64bit targets. (sh*l*-*-netbsdelf*): Likewise. (sh-*-netbsdelf*): Likewise. (shl*-*-elf*): Likewise. (sh[1234]l*-*-elf*): Likewise. (sh3el*-*-elf*): Likewise. (shl*-*-kaos*): Likewise. (sh-*-elf*): Likewise. (sh[1234]*-elf*): Likewise. (sh-*-rtems*): Likewise. (sh-*-kaos*): Likewise. ld/ 2006-05-24 H.J. Lu <hongjiu.lu@intel.com> PR ld/1485 * configure.in: Use ${srcdir}/../bfd/config.bfd to check 64bit bfd. Support 64bit host for --enable-targets=all. * configure: Regenerated.
2006-05-25*** empty log message ***gdbadmin1-1/+1
2006-05-25daily updateAlan Modra1-1/+1
2006-05-242006-05-24 Paul Brook <paul@codesourcery.com>Paul Brook13-14/+232
bfd/ * elf-bfd.h (elf_backend_data): Add elf_backend_output_arch_local_syms * elf32-arm.c (output_arch_syminfo): Define. (elf32_arm_ouput_plt_map_sym, elf32_arm_output_plt_map, elf32_arm_output_arch_local_syms): New functions. (elf_backend_output_arch_local_syms): Define. * elflink.c (bfd_elf_final_link): Call elf_backend_output_arch_local_syms. * elfxx-target.h (elf_backend_output_arch_local_syms): Provide default definition. (elfNN_bed): Add elf_backend_output_arch_local_syms. ld/testsuite/ * ld-arm/arm-app-abs32.d: Update expected output. * ld-arm/arm-app.d: Ditto. * ld-arm/arm-lib-plt32.d: Ditto. * ld-arm/arm-lib.d: Ditto. * ld-arm/mixed-app-v5.d: Ditto. * ld-arm/mixed-app.d: Ditto. * ld-arm/mixed-lib.d: Ditto.
2006-05-242006-05-24 Paul Brook <paul@codesourcery.com>Paul Brook2-53/+101
* elf32-arm.c (put_arm_insn, put_thumb_insn): New functions. (elf32_thumb_to_arm_stub, elf32_arm_to_thumb_stub, elf32_arm_finish_dynamic_symbol): Use them.
2006-05-24Enable gprof for cross builds.Mark Shinwell3-2/+7
2006-05-24Add TLS support for hppa-linuxNick Clifton8-2972/+3505
2006-05-24Updated Frewnch translationNick Clifton2-1392/+1562
2006-05-24Updated Vietnamese and Irish translationsNick Clifton4-742/+975
2006-05-24Add support for AVR6 familyNick Clifton27-183/+1631
2006-05-242006-05-23 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu9-0/+216
PR ld/2655 PR ld/2657 * ld-elf/eh1.d: New file. * ld-elf/eh1.s: Likewise. * ld-elf/eh1a.s: Likewise. * ld-elf/eh2.d: Likewise. * ld-elf/eh2a.s: Likewise. * ld-elf/eh3.d: Likewise. * ld-elf/eh3.s: Likewise. * ld-elf/eh3a.s: Likewise.
2006-05-242006-05-23 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-39/+19
PR ld/2655 PR ld/2657 * elf-eh-frame.c (_bfd_elf_write_section_eh_frame): Properly update CIE/FDE length. Don't pad to the section alignment.
2006-05-24merge from gccDJ Delorie2-0/+8
2006-05-24*** empty log message ***gdbadmin1-1/+1
2006-05-24daily updateAlan Modra1-1/+1
2006-05-23 * mt-tdep.c (mt_register_name): Correct out-of-range logic toMark Mitchell2-9/+42
include additional registers. * mt-tdep.c (mt_gdb_regnums): Add ZI2, ZQ2, Ichannel2, Iscramb2, Qscramb2, Qchannel2. (mt_register_name): Likewise. (mt_copro_register_type): Describe ZI2 and ZQ2. * mt-tdep.c (mt_gdb_regnums): Define MT_COPRO_PSEUDOREG_MAC_REGNUM. (mt_register_name): Use it. (mt_copro_register_type): Likewise. (mt_register_type): Likewise. (mt_pseudo_register_read): Likewise. Read the MAC register, not the coprocessor register. (mt_pseudo_register_write): Likewise.
2006-05-23 [ gas/ChangeLog ]Thiemo Seufer11-94/+321
* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename. (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS, ISA_HAS_MXHC1): New macros. (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments. (mips_cpu_info): Change to use combined ASE/IS_ISA flag. (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines. (mips_after_parse_args): Change default handling of float register size to account for 32bit code with 64bit FP. Better sanity checking of ISA/ASE/ABI option combinations. (s_mipsset): Support switching of GPR and FPR sizes via .set {g,f}p={32,64,default}. Better sanity checking for .set ASE options. (mips_elf_final_processing): We should record the use of 64bit FP registers in 32bit code but we don't, because ELF header flags are a scarce ressource. (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef, 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions. (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA. * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document missing -march options. Document .set arch=CPU. Move .set smartmips to ASE page. Use @code for .set FOO examples. [ gas/testsuite/Changelog ] * gas/mips/mips-gp32-fp64-pic.d, mips/mips-gp32-fp64.d, gas/mips/mips-gp64-fp32-pic.d, gas/mips/mips-gp64-fp32.l, gas/mips/mips-gp64-fp64.d: Adjust test cases to the changes assembler output. * gas/mips/mips-gp32-fp64.l, gas/mips/mips-gp64-fp32-pic.l: New files, catch assembler warnings.
2006-05-23Updated translationNick Clifton2-1413/+1584
2006-05-23 * config/tc-bfin.c (bfin_start_line_hook): Bump line countersJie Zhang2-1/+17
if needed.
2006-05-23 * elf32-bfin.c (bfinfdpic_relocate_section): Clear reloc forJie Zhang2-9/+24
deteted entries in .eh_frame section.
2006-05-23Commit the missing bits of my last patch.Jie Zhang1-3/+3
2006-05-23 * config/bfin-defs.h (bfin_equals): Remove declaration.Jie Zhang4-47/+9
* config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr". * config/tc-bfin.c (bfin_name_is_register): Remove. (bfin_equals): Remove. * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1. (bfin_name_is_register): Remove declaration.
2006-05-23 * elf32-bfin.c (bfin_check_relocs): Use __GLOBAL_OFFSET_TABLE_Jie Zhang2-6/+16
instead of _GLOBAL_OFFSET_TABLE_. (bfin_relocate_section): Ditto. (_bfin_create_got_section): Ditto. (elf32_bfinfdpic_create_dynamic_sections): Use __PROCEDURE_LINKAGE_TABLE_ instead of _PROCEDURE_LINKAGE_TABLE_. (bfin_finish_dynamic_symbol): Use __DYNAMIC instead of _DYNAMIC.
2006-05-23 * elf64-ppc.c (compare_symbols): Prefer strong dynamic globalAlan Modra2-0/+31
function syms over other syms.
2006-05-23*** empty log message ***gdbadmin1-1/+1
2006-05-23daily updateAlan Modra1-1/+1
2006-05-22(Cygwin Native): Fix last change.Eli Zaretskii2-4/+15
2006-05-222006-05-22 Steve Ellcey <sje@cup.hp.com>Steve Ellcey55-6032/+17190
* MAINTAINERS: Change intl updating instructions. * config.rpath: Copy from GCC tree. * intl: Replace contents of intl directory with intl from GCC tree.
2006-05-22bfd/Daniel Jacobowitz5-21/+105
* elflink.c (_bfd_elf_add_dynamic_entry): Remove DT_TEXTREL check. (bfd_elf_final_link): Add a late DT_TEXTREL check. * elfxx-mips.c (MIPS_ELF_READONLY_SECTION): Define. (mips_elf_create_dynamic_relocation): Set DF_TEXTREL. (_bfd_mips_elf_check_relocs): Delete MIPS_READONLY_SECTION. Use MIPS_ELF_READONLY_SECTION. (_bfd_mips_elf_size_dynamic_sections): Clear DF_TEXTREL after creating DT_TEXTREL. (_bfd_mips_elf_finish_dynamic_sections): Clear textrel markers if no text relocations were generated. ld/testsuite/ * ld-mips-elf/textrel-1.d: Relax some patterns.
2006-05-22 * po/ru.po: Updated translation.Daniel Jacobowitz2-1397/+1505
2006-05-22* iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.Nick Clifton2-5/+6
2006-05-22* gas/mips/mips32-dsp.l: Fix expected unsigned decoding of -1 in warning ↵Nick Clifton3-145/+151
messages. * gas/mips/mips32-mt.l: Likewise.
2006-05-22* scripttempl/elf32crx.sc (.rdata): Add .rodata.*.Nick Clifton2-1/+5
2006-05-22fix typoNick Clifton1-1/+1
2006-05-22* ld-eld/start.s (start): Add this symbol for SH targets.Nick Clifton2-0/+9
(main): Add this symbol for HPPA targets.
2006-05-22* crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.Nick Clifton2-1/+5
2006-05-22Updated Dutch translationNick Clifton2-194/+423
2006-05-22Remove ChangeLog entries, since the template files were already up to date.Nick Clifton6-24/+0
2006-05-22Update translation templatesNick Clifton6-0/+24
2006-05-22* gdb.texinfo (Cygwin Native): Document set/show cygwin-exceptions.Christopher Faylor2-0/+14
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