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comments and single quotes. Fixes a problem found on hpux.
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simulator.
To match the linker.
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stack up to 0x80000.
* emulparms/mn10300.sh (OTHER_RELOCATING_SECTIONS): Likewise.
Because we're seeing .text for some of the plumhall tests which exceeds
0x40000 bytes on these machines.
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is actually in ../common/aclocal.m4.)
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../common/aclocal.m4).
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scheme which is more compatible with WinGDB builds.
* configure.in: Improve comment on how to run autoconf.
* configure: Re-run autoconf to get new ../common/aclocal.m4.
* Makefile.in: Use autoconf substitution to install common
makefile fragment.
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into here. Makes insertion into makefiles easier. Also, change
the way that callback.o, gentmap, targ-vals.h, targ-map.c,
targ-map.o, and run are built. They are now built in the
individual simulator directories, taking sources from ../common as
necessary. This replaces the merging of libcommon.a into
linsim.a, which was problematic for the WinGDB build process.
* run.c: Include config.h from . instead of ../common.
* Make-common.in: Remove. It's no longer necessary.
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from common are now built in the individual simualtor directories.
This fixes problems with the WinGDB build procedure.
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* configure.in: build gdb for mn10200
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entries are presorted so that entries with the same mnemonic are
adjacent to each other in the table. Sort the entries for each
instruction so that this is true.
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routines for little endian data.
* coffcode.h (coff_write_object_contents): Set magic to
TIC80_ARCH_MAGIC for TIc80.
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Mon Nov 25 10:45:14 1996 Doug Evans <dje@seba.cygnus.com>
* write.c: Delete "ifndef md_relax_frag" around is_dnrange.
(relax_segment, case rs_org): Move code inside braces. Move locals
target,after inside too.
(relax_segment, case rs_machine_dependent): Guts moved to ...
(relax_frag): New function.
Call md_prepare_relax_scan if defined.
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Start mn10200 gdb port by adding copies of mn10300
target-specific files with all instances of mn10300 changed
to mn10200 to start with.
* mn10200-tdep.c: new
* config/mn10200/tm-mn10200.h: new, REGISTER_SIZE is 24 bits not 32,
SP_REGNUM and FP_REGNUM are different, also no lar or lir.
* config/mn10200/mn10200.mt: new
* configure.tgt: add mn10200 entry
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Start mn10200 gdb port by adding copies of mn10300
target-specific files with all instances of mn10300 changed
to mn10200 to start with.
* mn10200-tdep.c: new
* config/mn10200/tm-mn10200.h: new, REGISTER_SIZE is 24 bits not 32,
SP_REGNUM and FP_REGNUM are different, also no lar or lir.
* config/mn10200/mn10200.mt: new
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Solaris threads.
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* mn10300-tdep.c: wrote/fixed implementations of
mn10300_frame_chain, mn10300_init_extra_frame_info,
mn10300_frame_saved_pc
* config/mn10300/tm-mn10300.h: redefine INIT_EXTRA_FRAME_INFO
and INIT_FRAME_PC macros
Backtracing starting to work correctly.
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are using gcc when using the -export-dynamic option. Fixes a
problem with building under Solaris/SunPro cc.
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was correct!
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as the default.
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to define `_stack'.
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Link in simulator on MIPS embedded targets.
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SEC_ALLOC. Count SEC_READONLY sections as text.
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the .reginfo or .MIPS.options section if configured for an
embedded target.
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'p' operand specifier.
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m68k family cpus which support long branch addressing modes.
(m68k_ip, md_convert_frag_1, md_estimate_size_before_relax,
md_create_long_jump): Use it.
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<schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c: Include <libiberty.h>.
(print_insn_m68k): Sort the opcode table on the most significant
nibble of the opcode.
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mips_4650.
PR 11507.
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"vsub", "vst", "xnor", and "xor" instructions.
(V_a1): Renamed from V_a, msb of accumulator reg number.
(V_a0): Add macro, lsb of accumulator reg number.
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be the destination register.
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function up into several smaller ones and arranged for
the instruction printing function to be callable recursively
to print vector instructions that have both a load and a
math instruction packed into a single opcode.
* tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
to explain why it comes after the other vector opcodes.
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with a zero PC as frameless to improve backtraces from core dumps
caused by dereferencing a NULL function pointer.
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* m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
move insns to handle immediate operands.
From Andreas Schwab:
* m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
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New macros for building vector instruction opcodes.
(tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
FMT_LI, which were unused. The field is now a flags field.
Remove some opcodes that are possible, but illegal, such
as long immediate instructions with doubles for immediate
values. Add "vadd" and "vld" instructions.
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(FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
(TIC80_VECTOR): Define a flag bit for the flags. This one means
that the opcode can have two vector instructions in a single
32 bit word and we have to encode/decode both.
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auxiliary_filters, and make it char **.
* lexsup.c (parse_args): Handle -f by setting up an array.
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Use
new name of auxiliary_filters.
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auxiliary_filters parameter to be const char * const *. Accept a
NULL terminated array.
* bfd-in.h (bfd_elf32_size_dynamic_sections): Update declaration.
(bfd_elf32_size_dynamic_sections): Update declaration.
* bfd-in2.h: Rebuild.
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* config/mn10300/tm-mn10300.h: fix BREAKPOINT definition
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--auxiliary.
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Something I noticed while working on the mn10200.
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