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2015-11-15sim: m32c: add a basic testsuiteMike Frysinger5-0/+92
2015-11-15sim: testsuite: support basic vars in flagsMike Frysinger2-1/+12
Sometimes in tests, we need supplemental files like linker scripts or board helper files. There's no way to set those flags in the tests currently and relative paths don't work (breaks out of tree builds). Update the main option parser to replace some strings on the fly. Now tests can do things like: Long term we'll want to switch the framework to use the dejagnu helpers like dg-xxx that gcc & gdb utilize. But that'll require more rework.
2015-11-15sim: drop extern C linkage from most sim interface headersMike Frysinger8-59/+9
Since these headers merely have enum's, drop the extern C linkage markings. Helps to reduce the copy & paste spam.
2015-11-14Bump version to 2.26.51Tristan Gingold13-63/+88
bfd/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.26.51 * configure: Regenerate. binutils/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
2015-11-15Automatic date update in version.inGDB Administrator1-1/+1
2015-11-14Fix problem where bss symbols for copy relocations are marked local.Cary Coutant2-2/+10
gold/ PR gold/19244 PR gold/18548 * symtab.cc (Symbol_table::do_define_in_output_data): Check for forced local symbols only for predefined symbols.
2015-11-14Automatic date update in version.inGDB Administrator1-1/+1
2015-11-13PR 19051: support of inferior call with gnu vector support on ARMYao Qi2-14/+63
This patch teaches GDB to support gnu vector in inferior calls. As a result, fails in gdb.base/gnu_vector.exp are fixed. The calling convention of gnu vector isn't documented in the AAPCS, because it is the GCC extension. I checked the gcc/config/arm/arm.c, understand how GCC pass arguments and return values, and do the same in GDB side. The patch is tested with both hard float and soft float on arm-linux. gdb: 2015-11-13 Yao Qi <yao.qi@linaro.org> PR tdep/19051 * arm-tdep.c (arm_type_align): Return the right alignment value for vector. (arm_vfp_cprc_sub_candidate): Return true for 64-bit and 128-bit vector types. (arm_return_in_memory): Handel vector type.
2015-11-13Refactor arm_return_in_memoryYao Qi2-78/+90
Current arm_return_in_memory isn't friendly to adding new things in it. Moreover, a lot of stuff are about APCS, which is not used nowadays (AAPCS is being used). This patch is to refactor arm_return_in_memory, so that some code can be shared for both APCS and AAPCS at the beginning of arm_return_in_memory, and then each ABI (APCS and AAPCS) are processed separately. gdb: 2015-11-13 Yao Qi <yao.qi@linaro.org> * arm-tdep.c (arm_return_in_memory): Rewrite it. (arm_return_value): Call arm_return_in_memory for TYPE_CODE_COMPLEX.
2015-11-13Remove d10v from testsuiteYao Qi5-210/+15
This patch removes the leftover of the d10v stuff in the testsuite directory. The d10v port was removed in GDB 6.7, but I happen to see that there are still some leftovers about d10v in testsuite. gdb/testsuite: 2015-11-13 Yao Qi <yao.qi@linaro.org> * gdb.base/call-sc.exp (test_scalar_returns): Remove the comments about d10v. (test_scalar_returns): Likewise. * gdb.base/d10v.ld: Remove. * gdb.base/overlays.exp: Remove the target triplet checking for d10v-*-*. * gdb.base/structs.exp (test_struct_returns): Remove the comments about d10v. (test_struct_calls): Likewise.
2015-11-13gdb.base/gnu_vector.exp: Don't test output from the inferiorYao Qi3-17/+17
gdb.base/gnu_vector.c printf the vector and gdb.base/gnu_vector.exp expects the output by gdb_test_multiple. Nowadays, the test doesn't expect the output from inferior_spawn_id, which is wrong. Even we change the test to expect from inferior_spawn_id for the inferior output, it is still possible the inferior exit before tcl/expect gets the inferior output. We see this fail on both s390x-linux and ppc-linux on buildbot, FAIL: gdb.base/gnu_vector.exp: verify vector return value (the program exited) https://sourceware.org/ml/gdb-testers/2015-q4/msg04922.html https://sourceware.org/ml/gdb-testers/2015-q4/msg04952.html In order to address these two shortcomings above in gnu_vector.exp, this patch rewrites the test a little bit. Get rid of checking the inferior output, and instead checking them by printing them. In this way, the test can also be run on the target without inferior io (gdb,noinferiorio is set in the board file). gdb/testsuite: 2015-11-13 Yao Qi <yao.qi@linaro.org> * gdb.base/gnu_vector.exp: Check the return value by "p res". * gdb.base/gnu_vector.c: Don't include stdio.h. (main): Don't print res and call add_some_intvecs.
2015-11-13Add markers for release 2.26Tristan Gingold7-0/+20
binutils/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.26. gas/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.26. ld/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.26.
2015-11-13Automatic date update in version.inGDB Administrator1-1/+1
2015-11-12Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model."Marcus Shawcroft6-103/+2
This reverts commit 3ebe65c0ff9f8f76c9971b1cc078273298f0c693. Reverted due to PR19188
2015-11-12[AArch64] Add support for Cortex-A35James Greenhalgh3-0/+8
This patch adds support to the AArch64 back-end for the Cortex-A35 processor, as recently announced by ARM. The ARM Cortex-A35 provides full support for the ARMv8-A architecture, including the CRC extension, with optional Advanced-SIMD and Floating-Point support. We therefore set feature flags for this CPU to AARCH64_ARCH_V8 and AARCH64_FEATURE_CRC, in the same fashion as Cortex-A53 and Cortex-A57. Tested in a cross environment for AArch64 with no issues.
2015-11-12Fix dates in Changelog for previous commit.Ramana Radhakrishnan2-2/+2
582cfe03cb7496371bc6d83af49b6324d0c36887
2015-11-12Add support for Cortex-A35Ramana Radhakrishnan3-0/+8
2015-11-12 James Greenhalgh <james.greenhalgh@arm.com> * config/tc-arm.c (arm_cpus): Likewise. * doc/c-arm.texi (-mcpu=): Likewise.
2015-11-12Fix PR gas/19217Ramana Radhakrishnan4-23/+26
2015-11-11 Matthew Wahab <matthew.wahab@arm.com> PR gas/19217 * config/tc-arm.c (move_or_literal_pool): Remove redundant feature check. Fix some code formatting. Drop use of MOVT. Add some comments. 2015-11-11 Matthew Wahab <matthew.wahab@arm.com> PR gas/19217 * gas/arm/thumb2_ldr_immediate_armv6t2.d: Update expected output.
2015-11-12Use gdb_byte * instead of void * in push_stack_itemYao Qi2-1/+6
gdb: 2015-11-12 Yao Qi <yao.qi@linaro.org> * arm-tdep.c (push_stack_item): Change contents type to const gdb_byte *.
2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner39-164/+2273
include/opcode/ * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries. Add PPC_OPCODE_VSX3 to the vsx entry. (powerpc_init_dialect): Set default dialect to power9. * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1, extract_l1 insert_xtq6, extract_xtq6): New static functions. (insert_esync): Test for illegal L operand value. (DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6, XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA, XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK, XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3, PPCVSX3): New defines. (powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu, fcmpo, ftdiv, ftsqrt>: Use XBF_MASK. <mcrxr>: Use XBFRARB_MASK. <addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq., bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc., cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first, cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx, lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll, lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw, modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last, rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx, stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx, subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh, vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd, vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d, vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx, vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq, vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd, vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait, xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp, xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp, xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz, xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp, xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp, xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo, xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo, xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo, xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp, xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp, xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp, xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw, xxinsertw, xxperm, xxpermr, xxspltib>: New instructions. <doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9. <tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands. include/elf/ * ppc.h (R_PPC_REL16DX_HA): New reloction. * ppc64.h (R_PPC64_REL16DX_HA): Likewise. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. (ppc_elf_addr16_ha_reloc): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_relocate_section): Likewise. (is_insn_dq_form): Handle lxv and stxv instructions. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA. (ppc64_elf_ha_reloc): Likewise. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * reloc.c (BFD_RELOC_PPC_REL16DX_HA): New. elfcpp/ * powerpc.h (R_POWERPC_REL16DX_HA): Define. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA. (md_apply_fix): Likewise. (ppc_handle_align): Handle power9's group ending nop. gas/testsuite/ * gas/ppc/altivec3.s: New test. * gas/ppc/altivec3.d: Likewise. * gas/ppc/vsx3.s: Likewise. * gas/ppc/vsx3.d: Likewise. * gas/ppc/power9.s: Likewise. * gas/ppc/power9.d: Likewise. * gas/ppc/ppc.exp: Run them. * gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests. * gas/ppc/power8.d: Likewise. * gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ... <lxvd2x, stxvd2x>: ...to this. * gas/ppc/vsx.d: Likewise. gold/ * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Likewise. ld/testsuite/ * ld-powerpc/addpcis.d: New test. * ld-powerpc/addpcis.s: New test. * ld-powerpc/powerpc.exp: Run it.
2015-11-12Automatic date update in version.inGDB Administrator1-1/+1
2015-11-11gdb/testsuite/gdb.trace: Deduplicate set_point assembly.Marcin Kościelnicki10-181/+104
The assembly code for emitting the proper tracepointable instruction was duplicated in many places. Keep it in one place, to reduce work needed for new targets. gdb/testsuite/ChangeLog: * gdb.trace/change-loc.h: include "trace-common.h", remove SYMBOL macro. (func5): Removed. (func4): Use FAST_TRACEPOINT_LABEL. * gdb.trace/ftrace-lock.c: include "trace-common.h", remove SYMBOL macro. (func): Removed. (thread_function): Use FAST_TRACEPOINT_LABEL. * gdb.trace/ftrace.c: include "trace-common.h", remove SYMBOL macro. (func): Remove. (marker): Use FAST_TRACEPOINT_LABEL. * gdb.trace/pendshr1.c: include "trace-common.h", remove SYMBOL macro. (pendfunc1): Remove. (pendfunc): Use FAST_TRACEPOINT_LABEL. * gdb.trace/pendshr2.c: include "trace-common.h", remove SYMBOL macro. (foo): Remove. (pendfunc2): Use FAST_TRACEPOINT_LABEL. * gdb.trace/trace-break.c: include "trace-common.h", remove SYMBOL macro. (func): Remove. (marker): Use FAST_TRACEPOINT_LABEL. * gdb.trace/trace-common.h: New header. * gdb.trace/trace-condition.c: include "trace-common.h", remove SYMBOL macro. (func): Remove. (marker): Use FAST_TRACEPOINT_LABEL. * gdb.trace/trace-mt.c: include "trace-common.h", remove SYMBOL macro. (func): Remove. (thread_function): Use FAST_TRACEPOINT_LABEL.
2015-11-11Replace long int * cast with PTRACE_TYPE_RET *Simon Marchi2-2/+8
These casts uses the typedef target type (long int *) instead of the typedef name. This was a little mistake in one of the big C++ cast patches. gdb/ChangeLog: * inf-ptrace.c (inf_ptrace_fetch_register): Change long int * cast to PTRACE_TYPE_RET *. (inf_ptrace_store_register): Likewise.
2015-11-11gdb: Make use of 'add_info' to create info sub-commands.Andrew Burgess4-27/+25
Switch to using 'add_info' function for creating basic info sub-commands. gdb/ChangeLog: * avr-tdep.c (_initialize_avr_tdep): Switch to 'add_info' for creating info sub-commands. * gnu-nat.c (add_task_commands): Likewise. * macrocmd.c (_initialize_macrocmd): Likewise.
2015-11-11gdb: Use class_info when creating info commands.Andrew Burgess2-1/+5
The 'add_info' function is used for creating info commands, these commands should be created as 'class_info' rather than 'no_class'. gdb/ChangeLog: * cli/cli-decode.c (add_info): Switch to class_info.
2015-11-11Automatic date update in version.inGDB Administrator1-1/+1
2015-11-10gdb/testsuite/gdb.trace: Deduplicate pcreg/spreg/fpreg.Marcin Kościelnicki13-145/+47
These variables were used in many gdb.trace tests. Keep them in one place, to reduce work needed for new targets. gdb/testsuite/ChangeLog: * gdb.trace/backtrace.exp: Use global fpreg/spreg definition, add $ in front. * gdb.trace/change-loc.exp: Use global pcreg definition. * gdb.trace/collection.exp: Use global pcreg/fpreg/spreg definition. * gdb.trace/entry-values.exp: Use global spreg definition, add $ in front. * gdb.trace/mi-trace-frame-collected.exp: Use global pcreg definition. * gdb.trace/pending.exp: Likewise. * gdb.trace/report.exp: Use global pcreg/fpreg/spreg definition. * gdb.trace/trace-break.exp: Likewise. * gdb.trace/trace-condition.exp: Use global pcreg definition, add $ in front. * gdb.trace/unavailable.exp: Use global pcreg/fpreg/spreg definition. * gdb.trace/while-dyn.exp: Use global fpreg definition, add $ in front. * lib/trace-support.exp: Define fpreg, spreg, pcreg variables.
2015-11-10Add Qualcomm qdf24xx support.Jim Wilson5-0/+15
gas/ * config/tc-aarch64.c (aarch64_cpus): Add qdf24xx. * config/tc-arm.c (arm_cpus): Likewise. * doc/c-arm.texi, doc/c-aarch64.texi: Likewise.
2015-11-10Update the RX simulator to handle the latest opcode types.Nick Clifton2-1/+24
* rx.c (id_names): Add nop4, nop5, nop6 and nop7. (decode_opcode): Likewise. (get_op): Handle RX_Operand_Zero_Indirect. Handle RX_Bad_Size and RX_MAX_SIZE. (put_op): Likewise. (N_MAP): Increase to 90.
2015-11-10Handle x86 VTINHERIT/VTENTRY relocs when deleting relocationsH.J. Lu3-2/+16
* elf32-i386.c (elf_i386_relocate_section): Handle VTINHERIT and VTENTRY relocations when deleting relocations. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-11-10Properly move kept relocations when deleting relocationsH.J. Lu3-2/+16
* elf32-i386.c (elf_i386_relocate_section): Properly move kept relocations when deleting relocations. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-11-10Fix performance regression on x86 with ld -rH.J. Lu3-8/+98
Similar fix to "commit c316a17c40e44e8798b34ff84130904f2e7a53de". * elf32-i386.c (elf_i386_relocate_section): Use read and write pointers to reloc array, rather than memmove when deleting a reloc. Don't use RELOC_AGAINST_DISCARDED_SECTION. Adjust reloc counts at end of loop. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-11-10sim: cr16/d10v: localize translation funcsMike Frysinger7-52/+27
These functions are only used in the interp module, so there's no point in exporting them and declaring them in the external sim interface.
2015-11-10Fix performance regression due to ld -r memmoveAlan Modra3-69/+157
The idea here is that instead of using memmove to shuffle the relocs array every time one is deleted, to add a "wrel" pointer and copy from rel[0] to wrel[0] as we go. * elf64-ppc.c (ppc64_elf_relocate_section): Use read and write pointers to reloc array, rather than memmove when deleting a reloc. Don't use RELOC_AGAINST_DISCARDED_SECTION. Adjust reloc counts at end of loop. * elf32-ppc.c (ppc_elf_relocate_section): Likewise.
2015-11-10sim: m32c: move test code to testsuiteMike Frysinger8-26/+17
Various target code belongs in the testsuite/ subdir, so move the m32c code to match all the other targets.
2015-11-10sim: m32c: drop redundant dependency infoMike Frysinger2-13/+4
2015-11-10sim: h8300: drop unused littleendian variableMike Frysinger2-13/+5
2015-11-10Automatic date update in version.inGDB Administrator1-1/+1
2015-11-09Recognize .pdr debug sections.Vladimir Radosavljevic2-1/+7
gold/ * layout.h (Layout::is_debug_info_section): Recognize .pdr debug sections.
2015-11-09Remove unnecessary target dependencies on relocation format.Cary Coutant12-23/+78
2015-11-09 Cary Coutant <ccoutant@gmail.com> Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com> gold/ * copy-relocs.h (Copy_relocs::copy_reloc): Replace reloc parameter with type, offset, addend. (Copy_relocs::save): Likewise. * copy-relocs.cc (Copy_relocs::copy_reloc): Likewise. (Copy_relocs::save): Likewise. * aarch64.cc (Target_aarch64::copy_reloc): Pass r_type, r_offset, and r_addend to Copy_relocs::copy_reloc. * arm.cc (Target_arm::copy_reloc): Likewise. * i386.cc (Target_i386::copy_reloc): Likewise. * mips.cc (Target_mips::copy_reloc): Likewise. * powerpc.cc (Target_powerpc::copy_reloc): Likewise. * s390.cc (Target_s390::copy_reloc): Likewise. * sparc.cc (Target_sparc::copy_reloc): Likewise. * tilegx.cc (Target_tilegx::copy_reloc): Likewise. * x86_64.cc (Target_x86_64::copy_reloc): Likewise.
2015-11-09[Ada] GDB crash during "finish" of function with out parametersJoel Brobecker7-0/+129
Consider a function with the following signature... function F (R : out Rec_Type) return Enum_Type; ... where Rec_Type is a simple record: type Rec_Type is record Cur : Integer; end record; Trying to "finish" from that function causes GDB to SEGV: (gdb) fin Run till exit from #0 bar.f (r=...) at bar.adb:5 0x00000000004022fe in foo () at foo.adb:5 5 I : Enum_Type := F (R); [1] 18949 segmentation fault (core dumped) /[..]/gdb This is related to the fact that funtion F has a parameter (R) which is an "out" parameter being passed by copy. For those, GNAT transforms the return value to be a record with multiple fields: The first one is called "RETVAL" and contains the return value shown in the source, and the remaining fields have the same name as the "out" or "in out" parameters which are passed by copy. So, in the example above, function F returns a struct that has one field who name is "r". Because "RETVAL" starts with "R", GDB thinks it's a wrapper field, because it looks like the encoding used for variant records: -- member_name ::= {choice} | others_choice -- choice ::= simple_choice | range_choice -- simple_choice ::= S number -- range_choice ::= R number T number <<<<<----- here -- number ::= {decimal_digit} [m] -- others_choice ::= O (upper case letter O) See ada_is_wrapper_field: return (name != NULL && (startswith (name, "PARENT") || strcmp (name, "REP") == 0 || startswith (name, "_parent") || name[0] == 'S' || name[0] == 'R' || name[0] == 'O')); As a result of this, when trying to print the RETURN value, we think that RETVAL is a wrapper, and thus recurse into print_field_values... if (ada_is_wrapper_field (type, i)) { comma_needed = print_field_values (TYPE_FIELD_TYPE (type, i), valaddr, (offset + TYPE_FIELD_BITPOS (type, i) / HOST_CHAR_BIT), stream, recurse, val, options, comma_needed, type, offset, language); ... which is a problem since print_field_values assumes that the type it is given ("TYPE_FIELD_TYPE (type, i)" here), is also a record type. However, that's not the case, since RETVAL is an enum. That eventually leads GDB to a NULL type when trying to extract fields out of the enum, which then leads to a SEGV when trying to dereference it. Ideally, we'd want to be a little more careful in identifying wrapper fields, by enhancing ada_is_wrapper_field to be a little more complete in its analysis of the field name before declaring it a variant record wrapper. However, it's not super easy to do so, considering that the choices can be combined together when complex choices are used. Eg: -- [...] the choice 1 .. 4 | 7 | -10 would be represented by -- R1T4S7S10m Given that we are working towards getting rid of GNAT encodings, which means that the above will eventually disappear, we took the more pragmatic approach is just treating RETVAL as a special case. gdb/ChangeLog: * ada-lang.c (ada_is_wrapper_field): Add special handling for fields called "RETVAL". gdb/testsuite/ChangeLog: * gdb.ada/fin_fun_out: New testcase.
2015-11-09gas: Fix left shift of negative value.Dominik Vogt48-65/+118
This patch fixes all occurences of left-shifting negative constants in C cod which is undefined by the C standard. gas/ChangeLog: * read.c (parse_bitfield_cons): Fix left shift of negative value. * config/tc-xstormy16.c (md_section_align): Likewise. * config/tc-xgate.c (md_section_align): Likewise. * config/tc-visium.c (md_section_align): Likewise. * config/tc-v850.c (md_section_align): Likewise. * config/tc-tic6x.c (md_section_align): Likewise. * config/tc-sh.c (SH64PCREL32_M, SH64PCREL48_M, SH64PCREL32_M) (MOVI_32_M, MOVI_48_M, MOVI_32_M, md_section_align): Likewise. * config/tc-sh64.c (shmedia_md_estimate_size_before_relax): Likewise. * config/tc-score.c (s3_section_align): Likewise. * config/tc-score7.c (s7_section_align): Likewise. * config/tc-s390.c (md_section_align): Likewise. * config/tc-rx.c (md_section_align): Likewise. * config/tc-rl78.c (md_section_align): Likewise. * config/tc-ppc.c (md_section_align): Likewise. * config/tc-or1k.c (md_section_align): Likewise. * config/tc-nds32.c (md_section_align): Likewise. * config/tc-mt.c (md_section_align): Likewise. * config/tc-msp430.c (md_section_align): Likewise. * config/tc-mn10300.c (md_section_align): Likewise. * config/tc-mn10200.c (md_section_align): Likewise. * config/tc-mips.c (md_section_align): Likewise. * config/tc-microblaze.c (parse_imm): Likewise. * config/tc-mep.c (md_section_align): Likewise. * config/tc-m68k.c (md_section_align): Likewise. * config/tc-m68hc11.c (md_section_align): Likewise. * config/tc-m32r.c (md_section_align): Likewise. * config/tc-m32c.c (md_section_align): Likewise. * config/tc-lm32.c (md_section_align): Likewise. * config/tc-iq2000.c (md_section_align): Likewise. * config/tc-ip2k.c (md_section_align): Likewise. * config/tc-ia64.c (dot_save, dot_vframe): Likewise. * config/tc-i960.c (md_number_to_field, md_section_align): Likewise. * config/tc-i386.c (md_section_align): Likewise. * config/tc-i370.c (md_section_align): Likewise. * config/tc-frv.c (md_section_align): Likewise. * config/tc-fr30.c (md_section_align): Likewise. * config/tc-epiphany.c (md_section_align): Likewise. * config/tc-d30v.c (md_section_align): Likewise. * config/tc-d10v.c (md_section_align): Likewise. * config/tc-cr16.c (l_cons): Likewise. * config/tc-bfin.c (md_section_align): Likewise. * config/tc-arm.c (md_section_align): Likewise. * config/tc-arc.c (md_section_align): Likewise. * config/bfin-parse.y (expr_1): Likewise. gas/testsuite/ChangeLog: * gas/all/test-gen.c (random_order_16s, random_order_24s) (random_order_32s): Fix left shift of negative value.
2015-11-09binutils: Fix left shift of negative value.Dominik Vogt2-1/+5
This patch fixes all occurences of left-shifting negative constants in C code which is undefined by the C standard. binutils/ChangeLog: * dwarf.c (read_leb128): Fix left shift of negative value.
2015-11-09bfd: Fix left shift of negative value.Dominik Vogt6-7/+16
This patch fixes all occurences of left-shifting negative constants in C code which is undefined by the C standard. bfd/ChangeLog: * elf64-ppc.c (ppc64_elf_size_stubs, ppc64_elf_build_stubs): Fix left shift of negative value. * libbfd.c (safe_read_leb128): Likewise. * dwarf2.c (place_sections): Likewise. * bfd-in.h (align_power): Likewise. * bfd-in2.h (align_power): Likewise.
2015-11-09Use ELF_STRING_ARM_unwind in arm-tdep.cYao Qi2-1/+6
We've already has the definition like this, #define ELF_STRING_ARM_unwind ".ARM.exidx" so it is better to use the macro rather than the string. gdb: 2015-11-09 Yao Qi <yao.qi@linaro.org> * arm-tdep.c (arm_exidx_new_objfile): Use ELF_STRING_ARM_unwind.
2015-11-09New function displaced_step_in_progress_threadYao Qi2-3/+24
This patch adds a new function displaced_step_in_progress_thread, which returns whether the thread is in progress of displaced stepping. gdb: 2015-11-09 Yao Qi <yao.qi@linaro.org> * infrun.c (displaced_step_in_progress_thread): New function. (handle_inferior_event_1): Call it.
2015-11-09Move copy_u.w to MSA64 ASE, remove copy_u.d.Robert Suchanek8-46/+37
opcodes/ChangeLog: * mips-opc.c (mips_builtin_opcodes): Change "copy_u.w" to MSA64 ASE, remove "copy_u.d". gas/testsuite/ChangeLog: * gas/mips/micromips@msa.d: Remove "copy_u.w". * gas/mips/msa.d: Likewise. * gas/mips/msa.s: Likweise. * gas/mips/mipsr6@msa.d: Likewise. Replace addresses with regex. * gas/mips/msa64.d: Add "copy_u.w". Remove "copy_u.d". * gas/mips/msa64.s: Likewise. * gas/mips/micromips@msa64.d: Likewise.
2015-11-09Configury changes for obstack optimizationAlan Modra4-0/+44
Provides defines used to determine whether glibc obstacks are compatible. Generally speaking, 32-bit targets won't need to use obstack.o from libiberty if glibc is used, while 64-bit targets will, until glibc gets the new obstack code. libiberty/ * configure.ac: Get size of size_t. * config.in: Regenerate. * configure: Regenerate.
2015-11-09Silence obstack.c -Wc++compat warningAlan Modra2-2/+9
Fixes warning: request for implicit conversion from ‘void *’ to ‘struct _obstack_chunk *’ not permitted in C++ [-Wc++-compat] I moved the assignment to h->chunk to fix an overlong line, then decided it would be better after the alloc failure check just to do things the same way as in _obstack_newchunk. * obstack.c (_obstack_newchunk): Silence -Wc++compat warning. (_obstack_begin_worker): Likewise. Move assignment to h->chunk after alloc failure check.
2015-11-09Modify obstack.[hc] to avoid having to include other gnulib filesAlan Modra5-14/+55
Using the standard gnulib obstack source requires importing quite a lot of other files from gnulib, and requires build changes. include/ PR gdb/17133 * obstack.h (__attribute_pure__): Expand _GL_ATTRIBUTE_PURE. libiberty/ PR gdb/17133 * obstack.c (__alignof__): Expand alignof_type from alignof.h. (obstack_exit_failure): Don't use exitfail.h. (_): Include libintl.h when HAVE_LIBINTL_H and nls enabled. Provide default. Don't include gettext.h. (_Noreturn): Define. * obstacks.texi: Adjust node references to external libc info files.
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