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2016-06-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd/elf32-arm.c (cmse_scan): Declare and initialize j in the
innermost conditional block containing all its uses.
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Backport from mainline
Fix Thumb-Thumb farcall v6-M (no profile) test
2016-01-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* ld-arm/arm-elf.exp (Thumb-Thumb farcall v6-M (no profile)): Set
address of .foo section when linking.
* ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Place myfunc in .foo
section.
* ld-arm/farcall-thumb-thumb-m-no-profile.d: Adapt expected output to
the above changes.
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Backport from mainline
Add test for ARMv6-M farcall with no profile info
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
ld/testsuite/
* ld-arm/arm-elf.exp: Run new test "Thumb-Thumb farcall v6-M (no
profile)".
* ld-arm/farcall-thumb-thumb-m-no-profile-a.s: New file.
* ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Likewise.
* ld-arm/farcall-thumb-thumb-m-no-profile.d: Likewise.
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2016-06-20 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Mark sections holding
ARMv8-M secure entry functions.
ld/testsuite/
* ld-arm/arm-elf.exp (Secure gateway veneers (ARMv8-M Baseline)): Also
pass --gc-sections to ld.
(Secure gateway veneers (ARMv8-M Mainline)): Likewise.
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embedded-binutils-2_26-branch
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This patch fixes another edge case related to alignment property
records - reloc offsets adjacent to property record offsets were not
getting adjusted during relaxation.
bfd/
PR ld/20254
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc
offsets until reloc_toaddr.
ld/
PR ld/20254
* testsuite/ld-avr/avr-prop-6.d: New test.
* testsuite/ld-avr/avr-prop-6.s: New test.
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Add the GOT base for R_386_GOT32/R_386_GOT32X relocations against IFUNC
symbols if there is no base register and disallow them for PIC.
bfd/
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): Add the .got.plt
section address for R_386_GOT32/R_386_GOT32X relocations against
IFUNC symbols if there is no base register and return error for
PIC.
* elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC
GOT32 adjustment for static executables.
ld/
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b,
pr20244-2c and pr20244-2d.
* testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b.
* testsuite/ld-i386/pr20244-2.s: New file.
* testsuite/ld-i386/pr20244-2a.d: Likewise.
* testsuite/ld-i386/pr20244-2b.d: Likewise.
* testsuite/ld-i386/pr20244-2c.d: Likewise.
* testsuite/ld-i386/pr20244-2d.d: Likewise.
* testsuite/ld-i386/pr20244-3a.c: Likewise.
* testsuite/ld-i386/pr20244-3b.S: Likewise.
* testsuite/ld-i386/pr20244-3c.S: Likewise.
* testsuite/ld-i386/pr20244-3d.S: Likewise.
Add 2 i386 tests to call IFUNC functions via GOT
ld/
* testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b.
* testsuite/ld-i386/ifunc-1a.c: New file.
* testsuite/ld-i386/ifunc-1b.S: Likewise.
* testsuite/ld-i386/ifunc-1c.S: Likewise.
* testsuite/ld-i386/ifunc-1d.S: Likewise.
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When relocating R_386_GOT32 in "op $0, bar@GOT", we shouldn't subtract
GOT base without a base register and we should disallow it without a
base register for PIC.
bfd/
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): When relocating
R_386_GOT32, return error without a base register for PIC and
subtract the .got.plt section address only with a base register.
ld/
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
* testsuite/ld-i386/pr20244-1.s: New file.
* testsuite/ld-i386/pr20244-1a.d: Likewise.
* testsuite/ld-i386/pr20244-1b.d: Likewise.
* testsuite/ld-i386/pr20244-1c.d: Likewise.
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To call an external function, the direct branch to the PLT entry can be
replaced by an indirect branch via the GOT slot, which is similar to the
first instruction in the PLT slot. Instead using the PLT slot as function
address, the function address is retrieved from the GOT slot. The
R_386_GOT32X relocation can be used to compute the address of the symbol’s
GOT entry without base register when PIC is disabled. In non-PIC
executable,
call/jmp *func@GOT
should be used for indirect branch via the GOT slot and
movl func@GOT, %eax
should be used to load function address. Unlike PIC case, no register
is needed to access GOT. If linker determines the function is defined
locally, it converts indirect branch via the GOT slot to direct branch
with a nop prefix and converts load via the GOT slot to load immediate
or lea.
* testsuite/ld-i386/libno-plt-1b.dd: New file.
* testsuite/ld-i386/libno-plt-1b.rd: Likewise.
* testsuite/ld-i386/no-plt-1a.dd: Likewise.
* testsuite/ld-i386/no-plt-1a.rd: Likewise.
* testsuite/ld-i386/no-plt-1b.dd: Likewise.
* testsuite/ld-i386/no-plt-1b.rd: Likewise.
* testsuite/ld-i386/no-plt-1c.dd: Likewise.
* testsuite/ld-i386/no-plt-1c.rd: Likewise.
* testsuite/ld-i386/no-plt-1d.dd: Likewise.
* testsuite/ld-i386/no-plt-1d.rd: Likewise.
* testsuite/ld-i386/no-plt-1e.dd: Likewise.
* testsuite/ld-i386/no-plt-1e.rd: Likewise.
* testsuite/ld-i386/no-plt-1f.dd: Likewise.
* testsuite/ld-i386/no-plt-1f.rd: Likewise.
* testsuite/ld-i386/no-plt-1g.dd: Likewise.
* testsuite/ld-i386/no-plt-1g.rd: Likewise.
* testsuite/ld-i386/no-plt-1h.dd: Likewise.
* testsuite/ld-i386/no-plt-1h.rd: Likewise.
* testsuite/ld-i386/no-plt-1i.dd: Likewise.
* testsuite/ld-i386/no-plt-1i.rd: Likewise.
* testsuite/ld-i386/no-plt-1j.dd: Likewise.
* testsuite/ld-i386/no-plt-1j.rd: Likewise.
* testsuite/ld-i386/no-plt-check1a.S: Likewise.
* testsuite/ld-i386/no-plt-check1b.S: Likewise.
* testsuite/ld-i386/no-plt-extern1a.S: Likewise.
* testsuite/ld-i386/no-plt-extern1b.S: Likewise.
* testsuite/ld-i386/no-plt-func1.c: Likewise.
* testsuite/ld-i386/no-plt-main1.c: Likewise.
* testsuite/ld-i386/no-plt.exp: Likewise.
* testsuite/ld-i386/pass.out: Likewise.
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To call an external function, the direct branch to the PLT entry can be
replaced by an indirect branch via the GOT slot, which is similar to the
first instruction in the PLT slot. Instead using the PLT slot as function
address, the function address is retrieved from the GOT slot. If linker
determines the function is defined locally, it converts indirect branch
via the GOT slot to direct branch with a nop prefix and converts load via
the GOT slot to load immediate or lea,
* testsuite/ld-x86-64/libno-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
* testsuite/ld-x86-64/no-plt-check1.S: Likewise.
* testsuite/ld-x86-64/no-plt.exp: Likewise.
* testsuite/ld-x86-64/no-plt-extern1.S: Likewise.
* testsuite/ld-x86-64/no-plt-func1.c: Likewise.
* testsuite/ld-x86-64/no-plt-main1.c: Likewise.
* testsuite/ld-x86-64/pass.out: Likewise.
Support any relocation order
* testsuite/ld-x86-64/no-plt-1a.rd: Support any relocation order.
* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
* testsuite/ld-x86-64/no-plt.exp: Fix a typo.
Update x86-64 no-PLT tests for x32
X32 has different output formats for readelf and objdump as well as a
different conversion of load symbol address via GOT.
* testsuite/ld-x86-64/libno-plt-1b.dd: Updated for x32.
* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
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This patch fixes an edge case in linker relaxation that causes symbol
values to be computed incorrectly in the presence of align directives
in input source code.
bfd/
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
and relocs only if shrinking occurred.
ld/
* testsuite/ld-avr/avr-prop-5.d: New.
* testsuite/ld-avr/avr-prop-5.s: New.
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* objcopy.c (copy_main): Init newsym->othersym.
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Since compiler may pass --as-needed to ld by default, link
tmpdir/copyreloc-main.o before tmpdir/copyreloc-lib.so.
* testsuite/ld-i386/i386.exp: Link tmpdir/copyreloc-main.o
before tmpdir/copyreloc-lib.so and test --as-needed.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
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Since compiler may pass --as-needed to ld by default, link .o file
before .so file in x86-64 tests.
PR ld/19774
* testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr17689b.o before
tmpdir/pr17689.so, fix gotpcrel1 test and add more --as-needed
tests.
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Since compiler may pass --as-needed to ld by default, link .o file
before .so file in i386/x86-64 tests.
PR ld/19774
* testsuite/ld-i386/i386.exp: Link tmpdir/pr18900.o before
tmpdir/pr18900.so and test --as-needed. Link tmpdir/gotpc1.o
before tmpdir/got1d.so and test --as-needed.
* testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr18900.o before
tmpdir/pr18900.so and test --as-needed.
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This reverts the pr16467 change, which was incorrect due to faulty
analysis of the pr16467 testcase. The failure was not due to a
mismatch in symbol type (ifunc/non-ifunc) but due to a symbol loop
being set up.
See https://sourceware.org/ml/binutils/2016-06/msg00013.html for some
rambling on versioned symbols and ELF shared library symbol overriding
that explain this patch.
bfd/
PR ld/20159
PR ld/16467
* elflink.c (_bfd_elf_merge_symbol): Revert PR16467 change.
(_bfd_elf_add_default_symbol): Don't indirect to/from defined
symbol given a version by a script different to the version
of the symbol being added.
(elf_link_add_object_symbols): Use _bfd_elf_strtab_save and
_bfd_elf_strtab_restore. Don't fudge dynstr references.
* elf-strtab.c (_bfd_elf_strtab_restore_size): Delete.
(struct strtab_save): New.
(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): New functions.
* elf-bfd.h (_bfd_elf_strtab_restore_size): Delete.
(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): Declare.
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opcodes/
Backport from master
2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
PR binutils/20196
* ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
opcodes for E6500.
gas/
Backport from master
2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
PR binutils/20196
* gas/testsuite/gas/ppc/e6500.s <lbarx, lharx, lwarx, ldarx,
stbcx., sthcx., stwcx., stdcx.>: Add tests.
* gas/testsuite/gas/ppc/e6500.d: Likewise.
* gas/testsuite/gas/ppc/power8.s: Likewise.
* gas/testsuite/gas/ppc/power8.d: Likewise.
* gas/testsuite/gas/ppc/power4.s <lwarx, ldarx, stwcx.,
stdcx.>: Add tests.
* gas/testsuite/gas/ppc/power4.d: Likewise.
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opcodes/
Backport from master
2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (CY): New define. Document it.
(powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
gas/
Backport from master
2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
* testsuite/gas/ppc/altivec3.d <vmsumudm>: Add test.
* testsuite/gas/ppc/altivec3.s: Likewise.
* testsuite/gas/ppc/power9.d <addex[.], lwzmx, vmsumudm>: Add tests.
* testsuite/gas/ppc/power9.s: Likewise.
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Don't convert R_386_GOT32 since we can't tell if it is applied
to "mov $foo@GOT, %reg" which isn't a load via GOT.
bfd/
Backport from master
* elf32-i386.c (elf_i386_check_relocs): Don't check R_386_GOT32
when setting need_convert_load.
PR ld/20117
* elf32-i386.c (elf_i386_convert_load): Don't convert
R_386_GOT32.
ld/
Backport from master
PR ld/20117
* testsuite/ld-i386/i386.exp: Run pr20117.
* testsuite/ld-i386/pr20117.d: New file.
* testsuite/ld-i386/pr20117.s: Likewise.
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2016-05-20 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (enum elf32_arm_stub_type): Remove
arm_stub_a8_veneer_lwm enumerator.
(arm_stub_a8_veneer_lwm): New global constant.
(elf32_arm_size_stubs): Break if stub was only updated.
gas/
* NEWS: Document support for ARMv8-M and its DSP and Security
Extensions.
gdb/
* arm-tdep.c (arm_elf_make_msymbol_special): A newline after variable
declaration.
include/elf/
* arm.h (enum arm_st_branch_type): Add ST_BRANCH_ENUM_SIZE enumerator.
(NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): Define macro.
(ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
(ARM_GET_SYM_BRANCH_TYPE): Use above variable to mask the bits for
branch type.
(ARM_SET_SYM_BRANCH_TYPE): Add a version with asserts used when
BFD_ASSERT is defined.
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embedded-binutils-2_26-branch
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