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2024-03-08Automatic date update in version.inGDB Administrator1-1/+1
2024-03-07Automatic date update in version.inGDB Administrator1-1/+1
2024-03-06Automatic date update in version.inGDB Administrator1-1/+1
2024-03-05Automatic date update in version.inGDB Administrator1-1/+1
2024-03-04Automatic date update in version.inGDB Administrator1-1/+1
2024-03-03Automatic date update in version.inGDB Administrator1-1/+1
2024-03-02Automatic date update in version.inGDB Administrator1-1/+1
2024-03-01Automatic date update in version.inGDB Administrator1-1/+1
2024-02-29aarch64: Fix the 2nd operand in gcsstr and gcssttr instructions.Srinath Parvathaneni4-51/+51
The assembler wrongly expects plain register name instead of memory-form 2nd operand for gcsstr and gcssttr instructions. This patch fixes the issue.
2024-02-29Automatic date update in version.inGDB Administrator1-1/+1
2024-02-28Automatic date update in version.inGDB Administrator1-1/+1
2024-02-27Automatic date update in version.inGDB Administrator1-1/+1
2024-02-26Automatic date update in version.inGDB Administrator1-1/+1
2024-02-25Automatic date update in version.inGDB Administrator1-1/+1
2024-02-24Automatic date update in version.inGDB Administrator1-1/+1
2024-02-23Automatic date update in version.inGDB Administrator1-1/+1
2024-02-22Automatic date update in version.inGDB Administrator1-1/+1
2024-02-21Automatic date update in version.inGDB Administrator1-1/+1
2024-02-20Automatic date update in version.inGDB Administrator1-1/+1
2024-02-19Automatic date update in version.inGDB Administrator1-1/+1
2024-02-18Automatic date update in version.inGDB Administrator1-1/+1
2024-02-17Automatic date update in version.inGDB Administrator1-1/+1
2024-02-15x86: Display -msse-check= default as noneH.J. Lu1-1/+1
Display -msse-check= default as none for "as --help" since its default is none, not warning. PR gas/31389 * config/tc-i386.c (md_show_usage): Change -msse-check= default to none. (cherry picked from commit 7a6a03c499ad899c1d1dd93beccbb62795feb1db)
2024-02-16Automatic date update in version.inGDB Administrator1-1/+1
2024-02-15Automatic date update in version.inGDB Administrator1-1/+1
2024-02-14Automatic date update in version.inGDB Administrator1-1/+1
2024-02-13PowerPC: Add support for Power11 optionsPeter Bergner4-6/+22
binutils/ * doc/binutils.texi (PowerPC -M option): Mention power11 and pwr11. gas/ * config/tc-ppc.c: (md_show_usage): Mention -mpower11 and -mpwr11. * doc/c-ppc.texi: Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power11" and "pwr11" entries. (powerpc_init_dialect): Default to "power11". (cherry picked from commit 4199cf1e152daab0460f08cc7dbd1f727ac3e4cc)
2024-02-13Automatic date update in version.inGDB Administrator1-1/+1
2024-02-12Automatic date update in version.inGDB Administrator1-1/+1
2024-02-11Automatic date update in version.inGDB Administrator1-1/+1
2024-02-10x86-64: Add R_X86_64_CODE_6_GOTTPOFFH.J. Lu15-45/+371
For add %reg1, name@gottpoff(%rip), %reg2 and add name@gottpoff(%rip), %reg1, %reg2 add #define R_X86_64_CODE_6_GOTTPOFF 50 if the instruction starts at 6 bytes before the relocation offset. They are similar to R_X86_64_GOTTPOFF. Linker can covert GOTTPOFF to add $name@tpoff, %reg1, %reg2 Rewrite fx_tcbit, fx_tcbit2 and fx_tcbit3 usage to generate R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX, R_X86_64_CODE_4_GOTPCRELX, R_X86_64_CODE_4_GOTTPOFF, R_X86_64_CODE_4_GOTPC32_TLSDESC and R_X86_64_CODE_6_GOTTPOFF. NB: There is no need to check BFD_RELOC_X86_64_CODE_4_GOTTPOFF in md_assemble since there is only BFD_RELOC_X86_64_GOTTPOFF at this stage, which will be converted to BFD_RELOC_X86_64_CODE_4_GOTTPOFF or BFD_RELOC_X86_64_CODE_6_GOTTPOFF in i386_validate_fix. 5 relocations: #define R_X86_64_CODE_5_GOTPCRELX 46 #define R_X86_64_CODE_5_GOTTPOFF 47 #define R_X86_64_CODE_5_GOTPC32_TLSDESC 48 #define R_X86_64_CODE_6_GOTPCRELX 49 #define R_X86_64_CODE_6_GOTPC32_TLSDESC 51 are added for completeness and they are unused. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX, R_X86_64_CODE_6_GOTTPOFF and R_X86_64_CODE_6_GOTPC32_TLSDESC. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX, R_X86_64_CODE_6_GOTTPOFF and R_X86_64_CODE_6_GOTPC32_TLSDESC. (elf_x86_64_check_tls_transition): Handle R_X86_64_CODE_6_GOTTPOFF. (elf_x86_64_tls_transition): Likewise. (elf_x86_64_scan_relocs): Handle R_X86_64_CODE_6_GOTTPOFF. Issue an error for R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX and R_X86_64_CODE_6_GOTPC32_TLSDESC. (elf_x86_64_relocate_section): Handle R_X86_64_CODE_6_GOTTPOFF. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_5_GOTPCRELX, BFD_RELOC_X86_64_CODE_5_GOTTPOFF, BFD_RELOC_X86_64_CODE_5_GOTPC32_TLSDESC, BFD_RELOC_X86_64_CODE_6_GOTPCRELX, BFD_RELOC_X86_64_CODE_6_GOTTPOFF and BFD_RELOC_X86_64_CODE_6_GOTPC32_TLSDESC. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. elfcpp/ * x86_64.h (R_X86_64_CODE_5_GOTPCRELX): New. (R_X86_64_CODE_5_GOTTPOFF): Likewise. (R_X86_64_CODE_5_GOTPC32_TLSDESC): Likewise. (R_X86_64_CODE_6_GOTPCRELX): Likewise. (R_X86_64_CODE_6_GOTTPOFF): Likewise. (R_X86_64_CODE_6_GOTPC32_TLSDESC): Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. (md_assemble): Don't check BFD_RELOC_X86_64_CODE_4_GOTTPOFF. Allow "add %reg1, foo@gottpoff(%rip), %reg2". (output_disp): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. Rewrite setting fx_tcbitX bits for BFD_RELOC_X86_64_GOTTPOFF, BFD_RELOC_X86_64_GOTPC32_TLSDESC and BFD_RELOC_32_PCREL. (md_apply_fix): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. (i386_validate_fix): Rewrite fx_tcbitX bit checking for BFD_RELOC_X86_64_GOTTPOFF, BFD_RELOC_X86_64_GOTPC32_TLSDESC and BFD_RELOC_32_PCREL. (tc_gen_reloc): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. * testsuite/gas/i386/x86-64-gottpoff.d: Updated. * testsuite/gas/i386/x86-64-gottpoff.s: Add tests for "add %reg1, foo@gottpoff(%rip), %reg2" and "add foo@gottpoff(%rip), %reg, %reg2". gold/ * x86_64.cc (Target_x86_64::optimize_tls_reloc): Handle R_X86_64_CODE_6_GOTTPOFF. (Target_x86_64::Scan::get_reference_flags): Likewise. (Target_x86_64::Scan::local): Likewise. (Target_x86_64::Scan::global): Likewise. (Target_x86_64::Relocate::relocate): Likewise. (Target_x86_64::Relocate::relocate_tls): Likewise. (Target_x86_64::Relocate::tls_ie_to_le): Handle. R_X86_64_CODE_6_GOTTPOFF. * testsuite/x86_64_ie_to_le.s: Add tests for "add %reg1, foo@gottpoff(%rip), %reg2" and "add foo@gottpoff(%rip), %reg, %reg2". * testsuite/x86_64_ie_to_le.sh: Updated. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX, R_X86_64_CODE_6_GOTTPOFF and R_X86_64_CODE_6_GOTPC32_TLSDESC. ld/ * testsuite/ld-x86-64/tlsbindesc.s: Add R_X86_64_CODE_6_GOTTPOFF tests. * testsuite/ld-x86-64/tlsbindesc.d: Updated. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise. (cherry picked from commit 5bc71c2a6b8efb27089baa1fecded82be4f550a7)
2024-02-10Automatic date update in version.inGDB Administrator1-1/+1
2024-02-09x86/APX: VROUND{P,S}{S,D} encodings require AVX512{F,VL}Jan Beulich2-6/+6
In eea4357967b6 ("x86/APX: VROUND{P,S}{S,D} can generally be encoded") I failed to add the AVX512* ISA dependency of the two new entries.
2024-02-09Automatic date update in version.inGDB Administrator1-1/+1
2024-02-09PR31208, strip can break ELF alignment requirementsAlan Modra1-1/+1
In https://sourceware.org/pipermail/binutils/2007-August/053261.html (git commit 3dea8fca8b86) I disabled a then new linker feature that removed empty PT_LOAD headers in cases where a user specified program headers, and for objcopy. This can be a problem for objcopy/strip and since objcopy operates on sections, any part of a PT_LOAD loading file contents not covered by a section will be omitted anyway. PR 31208 * elf.c (_bfd_elf_map_sections_to_segments): Pass remove_empty_load as true to elf_modify_segment_map for objcopy/strip. (cherry picked from commit 7f26d260ef76a4cb2873a7815bef187005528c19)
2024-02-08PR 31283 windmc: Parse input correctly on big endian hostsRichard W.M. Jones4-4/+259
On big endian hosts (eg. s390x) the windmc tool fails to parse even trivial files: $ cat test.mc ; $ ./binutils/windmc ./test.mc In test.mc at line 1: parser: syntax error. In test.mc at line 1: fatal: syntax error. The tool starts by reading the input as Windows CP1252 and then converting it internally into an array of UTF-16LE, which it then processes as an array of unsigned short (typedef unichar). There are lots of ways this is wrong, but in the specific case of big endian machines the little endian pairs of bytes are byte-swapped. For example, the ';' character in the input above is first converted to UTF16-LE byte sequence { 0x3b, 0x00 }, which is then cast to unsigned short. On a big endian machine the first unichar appears to be 0x3b00. The lexer is unable to recognize this as the comment character ((unichar)';') and so parsing fails. The simple fix is to convert the input to UTF-16BE on big endian machines (and do the reverse conversion when writing the output). Fixes: https://sourceware.org/bugzilla/show_bug.cgi?id=31283 Signed-off-by: Richard W.M. Jones <rjones@redhat.com> (cherry picked from commit 3f8f9745c75b333515f399fc2908ede2ed8014e9)
2024-02-08Automatic date update in version.inGDB Administrator1-1/+1
2024-02-07Automatic date update in version.inGDB Administrator1-1/+1
2024-02-06Link x86-64 mark-plt-1.so with --no-as-neededAlan Modra1-1/+1
Fixes FAIL: Build mark-plt-1.so where gcc is built with default --as-needed. * testsuite/ld-x86-64/x86-64.exp (Build mark-plt-1.so): Pass --no-as-needed. (cherry picked from commit 60c95acdaca94eca79b81ec75bfab97826cc0271)
2024-02-06Automatic date update in version.inGDB Administrator1-1/+1
2024-02-05Automatic date update in version.inGDB Administrator1-1/+1
2024-02-04LoongArch: gas: Fix the types of symbols referred with %le_*_r in the symtabXi Ruoyao3-0/+12
When a symbol is referred with %le_{hi20,lo12,add}_r, it's definitely a TLS symbol and we should set its type to TLS in the symtab. Otherwise when building Perl with gcc-14 -flto, we get: /usr/bin/ld: PL_current_context: TLS definition in ./miniperl.ltrans0.ltrans.o section .tbss mismatches non-TLS reference in ./miniperl.ltrans1.ltrans.o A minimal reproducer: $ cat t1.s .section .tbss .globl x x: .word 0 $ cat t2.s f: lu12i.w $a0, %le_hi20_r(x) add.d $a0, $a0, $tp, %le_add_r(x) li.w $a1, 1 st.w $a1, $a0, %le_lo12_r(x) $ gas/as-new t1.s -o t1.o $ gas/as-new t2.s -o t2.o $ ld/ld-new t1.o t2.o ld/ld-new: x: TLS definition in t1.o section .tbss mismatches non-TLS reference in t2.o Unfortunately this was undetected before Binutils-2.42 release because GCC < 14 does not use %le_*_r, and without LTO it's very rare to have a TLS LE definition and its reference in two different translation units. So this fix should be backported to Binutils-2.42 branch too. Signed-off-by: Xi Ruoyao <xry111@xry111.site> (cherry picked from commit 029e52bac7f3a6dd8b39f7f3d298b73174da806b)
2024-02-04Automatic date update in version.inGDB Administrator1-1/+1
2024-02-03Automatic date update in version.inGDB Administrator1-1/+1
2024-02-02x86: Disallow instructions with length > 15 bytesH.J. Lu6-32/+40
It is a hard error when an instruction length exceeds the limit of 15 bytes: [hjl@gnu-cfl-3 tmp]$ cat x.s .text xacquire lock addq $0x11223344, %fs:(,%eax) [hjl@gnu-cfl-3 tmp]$ gcc -c x.s x.s: Assembler messages: x.s:2: Warning: instruction length of 16 bytes exceeds the limit of 15 [hjl@gnu-cfl-3 tmp]$ objdump -dw x.o x.o: file format elf64-x86-64 Disassembly of section .text: 0000000000000000 <.text>: 0: 64 67 f2 f0 48 81 04 05 00 00 00 00 44 33 22 xacquire lock (bad) f: 11 .byte 0x11 [hjl@gnu-cfl-3 tmp]$ and [hjl@gnu-cfl-3 tmp]$ cat z.s addq $0xe0, %fs:0, %rdx [hjl@gnu-cfl-3 tmp]$ as -o z.o z.s z.s: Assembler messages: z.s:1: Warning: instruction length of 16 bytes exceeds the limit of 15 [hjl@gnu-cfl-3 tmp]$ objdump -dw z.o z.o: file format elf64-x86-64 Disassembly of section .text: 0000000000000000 <.text>: 0: 64 62 f4 ec 18 81 04 25 00 00 00 00 e0 00 00 (bad) ... [hjl@gnu-cfl-3 pr31323]$ Instructions with length > 15 bytes are always invalid. It is quite easy to generate invalid instructions with APX now. We should issue an error when instruction length exceeds the limit of 15 bytes. PR gas/31323 * config/tc-i386.c (output_insn): Issue an error when instruction length exceeds the limit of 15 bytes. * testsuite/gas/i386/oversized16.l: Updated. * testsuite/gas/i386/oversized64.l: Likewise. * testsuite/gas/i386/x86-64-apx-inval.l: New file. * testsuite/gas/i386/x86-64-apx-inval.s: Likewise. (cherry picked from commit 46bd909328c3c8f3d6fc7a505b2fad1eea72d872)
2024-02-02Automatic date update in version.inGDB Administrator1-1/+1
2024-02-01Automatic date update in version.inGDB Administrator1-1/+1
2024-01-31Mention support for AMD/znver5 in GASNick Clifton1-0/+2
2024-01-31PR31124: Addendum: Remove PROVIDE of __flmap_init_label, __flmap.Georg-Johann Lay1-3/+3
Supply these symbols as computed by the linker scripts, even when there are weak definitions. PR 31124 * scripttempl/avr.sc (__flmap, __flmap_init_label): Remove PROVIDE.
2024-01-31Automatic date update in version.inGDB Administrator1-1/+1
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