diff options
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/m32r/ChangeLog | 8 | ||||
| -rw-r--r-- | sim/m32r/cpu.h | 68 | ||||
| -rw-r--r-- | sim/m32r/cpux.h | 68 |
3 files changed, 78 insertions, 66 deletions
diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index 6dba1d0..420cbaa 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,11 @@ +1999-01-11 Doug Evans <devans@casey.cygnus.com> + + * sim-main.h: Delete inclusion of ansidecl.h. + * cpu.h: Regenerate. +start-sanitize-m32rx + * cpux.h: Regenerate. +end-sanitize-m32rx + 1999-01-06 Doug Evans <devans@casey.cygnus.com> * cpu.h: Regenerate. diff --git a/sim/m32r/cpu.h b/sim/m32r/cpu.h index a959833..6f4f855 100644 --- a/sim/m32r/cpu.h +++ b/sim/m32r/cpu.h @@ -118,17 +118,7 @@ typedef struct { int empty; } MODEL_TEST_DATA; -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - PCADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* cpu specific data follows */ - union sem semantic; - int written; - union { +union sem_fields { struct { /* empty format for unspecified field list */ int empty; } fmt_empty; @@ -440,29 +430,41 @@ struct argbuf { #endif } cti; #if WITH_SCACHE_PBB - /* Writeback handler. */ - struct { - /* Pointer to argbuf entry for insn whose results need writing back. */ - const struct argbuf *abuf; - } write; - /* x-before handler */ - struct { - /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ - int first_p; - } before; - /* x-after handler */ - struct { - int empty; - } after; - /* This entry is used to terminate each pbb. */ - struct { - /* Number of insns in pbb. */ - int insn_count; - /* Next pbb to execute. */ - SCACHE *next; - } chain; + /* Writeback handler. */ + struct { + /* Pointer to argbuf entry for insn whose results need writing back. */ + const struct argbuf *abuf; + } write; + /* x-before handler */ + struct { + /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ + int first_p; + } before; + /* x-after handler */ + struct { + int empty; + } after; + /* This entry is used to terminate each pbb. */ + struct { + /* Number of insns in pbb. */ + int insn_count; + /* Next pbb to execute. */ + SCACHE *next; + } chain; #endif - } fields; +}; + +/* The ARGBUF struct. */ +struct argbuf { + /* These are the baseclass definitions. */ + PCADDR addr; + const IDESC *idesc; + char trace_p; + char profile_p; + /* cpu specific data follows */ + union sem semantic; + int written; + union sem_fields fields; }; /* A cached insn. diff --git a/sim/m32r/cpux.h b/sim/m32r/cpux.h index 89fc7b6..6323b18 100644 --- a/sim/m32r/cpux.h +++ b/sim/m32r/cpux.h @@ -114,17 +114,7 @@ typedef struct { int empty; } MODEL_M32RX_DATA; -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - PCADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* cpu specific data follows */ - union sem semantic; - int written; - union { +union sem_fields { struct { /* empty format for unspecified field list */ int empty; } fmt_empty; @@ -494,29 +484,41 @@ struct argbuf { #endif } cti; #if WITH_SCACHE_PBB - /* Writeback handler. */ - struct { - /* Pointer to argbuf entry for insn whose results need writing back. */ - const struct argbuf *abuf; - } write; - /* x-before handler */ - struct { - /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ - int first_p; - } before; - /* x-after handler */ - struct { - int empty; - } after; - /* This entry is used to terminate each pbb. */ - struct { - /* Number of insns in pbb. */ - int insn_count; - /* Next pbb to execute. */ - SCACHE *next; - } chain; + /* Writeback handler. */ + struct { + /* Pointer to argbuf entry for insn whose results need writing back. */ + const struct argbuf *abuf; + } write; + /* x-before handler */ + struct { + /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ + int first_p; + } before; + /* x-after handler */ + struct { + int empty; + } after; + /* This entry is used to terminate each pbb. */ + struct { + /* Number of insns in pbb. */ + int insn_count; + /* Next pbb to execute. */ + SCACHE *next; + } chain; #endif - } fields; +}; + +/* The ARGBUF struct. */ +struct argbuf { + /* These are the baseclass definitions. */ + PCADDR addr; + const IDESC *idesc; + char trace_p; + char profile_p; + /* cpu specific data follows */ + union sem semantic; + int written; + union sem_fields fields; }; /* A cached insn. |