5 files changed, 10 insertions, 8 deletions
diff --git a/sim/testsuite/or1k/adrp.S b/sim/testsuite/or1k/adrp.S
index eaddcb0..192324c 100644
--- a/sim/testsuite/or1k/adrp.S
+++ b/sim/testsuite/or1k/adrp.S
@@ -17,9 +17,9 @@
 
 # mach: or1k
 # output: report(0x00002064);\n
-# output: report(0x00012138);\n
+# output: report(0x0001a008);\n
 # output: report(0x00002000);\n
-# output: report(0x00012000);\n
+# output: report(0x0001a000);\n
 # output: report(0x00002000);\n
 # output: report(0x00014000);\n
 # output: report(0x00000000);\n
@@ -32,6 +32,7 @@
 	.section .data
 	.org 0x10000
 	.align 4
+pad:	.quad 	0
 	.type   pi, @object
 	.size   pi, 4
 pi:
diff --git a/sim/testsuite/or1k/fpu-unordered.S b/sim/testsuite/or1k/fpu-unordered.S
index 624aa0f..a89172e 100644
--- a/sim/testsuite/or1k/fpu-unordered.S
+++ b/sim/testsuite/or1k/fpu-unordered.S
@@ -57,7 +57,7 @@ start_tests:
 	 *  r13  e   as float
 	 *  r16  nan as float
 	 */
-	l.ori	r11, r0, ha(anchor)
+	l.movhi	r11, ha(anchor)
 	l.addi	r11, r11, lo(anchor)
 	l.lwz	r12, 0(r11)
 
diff --git a/sim/testsuite/or1k/fpu64a32-unordered.S b/sim/testsuite/or1k/fpu64a32-unordered.S
index e0ae6e7..51d915e 100644
--- a/sim/testsuite/or1k/fpu64a32-unordered.S
+++ b/sim/testsuite/or1k/fpu64a32-unordered.S
@@ -58,7 +58,7 @@ start_tests:
 	 *  r14,r15  e   as double
 	 *  r16,r17  nan as double
 	 */
-	l.ori	r11, r0, ha(anchor)
+	l.movhi	r11, ha(anchor)
 	l.addi	r11, r11, lo(anchor)
 	l.lwz	r12, 0(r11)
 	l.lwz	r13, 4(r11)
diff --git a/sim/testsuite/or1k/fpu64a32.S b/sim/testsuite/or1k/fpu64a32.S
index 71b72b7..6ea60b2 100644
--- a/sim/testsuite/or1k/fpu64a32.S
+++ b/sim/testsuite/or1k/fpu64a32.S
@@ -98,7 +98,7 @@ start_tests:
 	 *  r14,r15  e  as double
 	 *  r16,r17  a long long
 	 */
-	l.ori	r11, r0, ha(anchor)
+	l.movhi	r11, ha(anchor)
 	l.addi	r11, r11, lo(anchor)
 	l.lwz	r12, 0(r11)
 	l.lwz	r13, 4(r11)
diff --git a/sim/testsuite/or1k/or1k-test.ld b/sim/testsuite/or1k/or1k-test.ld
index f1535da..c26ecaf 100644
--- a/sim/testsuite/or1k/or1k-test.ld
+++ b/sim/testsuite/or1k/or1k-test.ld
@@ -20,8 +20,9 @@ MEMORY
     /* The exception vectors actually start at 0x100, but if you specify
        that address here, the "--output-target binary" step will start from
        address 0 with the contents meant for address 0x100.  */
-    exception_vectors : ORIGIN =  0 , LENGTH = 8K
-    ram               : ORIGIN =  8K, LENGTH = 2M - 8K
+    exception_vectors : ORIGIN =  0 , LENGTH =  8K
+    rom               : ORIGIN =  8K, LENGTH = 40K
+    ram               : ORIGIN = 40K, LENGTH =  2M - 40K
 }
 
 SECTIONS
@@ -37,7 +38,7 @@ SECTIONS
 	*(.text.*)
 	*(.rodata)
 	*(.rodata.*)
-    } > ram
+    } > rom
 
     .data :
     {