aboutsummaryrefslogtreecommitdiff
path: root/sim
diff options
context:
space:
mode:
Diffstat (limited to 'sim')
-rw-r--r--sim/cris/ChangeLog5
-rw-r--r--sim/cris/cris-tmpl.c2
-rw-r--r--sim/cris/traps.c1
-rw-r--r--sim/erc32/ChangeLog4
-rw-r--r--sim/erc32/func.c1
-rw-r--r--sim/frv/ChangeLog10
-rw-r--r--sim/frv/cache.c1
-rw-r--r--sim/frv/frv.c1
-rw-r--r--sim/frv/interrupts.c1
-rw-r--r--sim/frv/memory.c1
-rw-r--r--sim/frv/profile.c1
-rw-r--r--sim/frv/registers.c1
-rw-r--r--sim/frv/traps.c2
-rw-r--r--sim/iq2000/ChangeLog4
-rw-r--r--sim/iq2000/iq2000.c1
-rw-r--r--sim/m32r/ChangeLog5
-rw-r--r--sim/m32r/m32r.c1
-rw-r--r--sim/m32r/traps.c1
-rw-r--r--sim/ppc/ChangeLog4
-rw-r--r--sim/ppc/emul_unix.c1
20 files changed, 48 insertions, 0 deletions
diff --git a/sim/cris/ChangeLog b/sim/cris/ChangeLog
index 3899045..4590798 100644
--- a/sim/cris/ChangeLog
+++ b/sim/cris/ChangeLog
@@ -1,3 +1,8 @@
+2021-04-08 Tom Tromey <tom@tromey.com>
+
+ * traps.c: Include stdlib.h.
+ * cris-tmpl.c: Include stdlib.h.
+
2021-04-02 Mike Frysinger <vapier@gentoo.org>
* aclocal.m4, configure: Regenerate.
diff --git a/sim/cris/cris-tmpl.c b/sim/cris/cris-tmpl.c
index b5ad718..95579db 100644
--- a/sim/cris/cris-tmpl.c
+++ b/sim/cris/cris-tmpl.c
@@ -25,6 +25,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "cgen-mem.h"
#include "cgen-ops.h"
+#include <stdlib.h>
+
#define MY(f) XCONCAT3(crisv,BASENUM,f)
/* Dispatcher for break insn. */
diff --git a/sim/cris/traps.c b/sim/cris/traps.c
index 2aaa1f4..1c8ca41 100644
--- a/sim/cris/traps.c
+++ b/sim/cris/traps.c
@@ -23,6 +23,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "bfd.h"
/* FIXME: get rid of targ-vals.h usage everywhere else. */
+#include <stdlib.h>
#include <stdarg.h>
#include <errno.h>
#ifdef HAVE_UNISTD_H
diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog
index 72de217..3b85c66 100644
--- a/sim/erc32/ChangeLog
+++ b/sim/erc32/ChangeLog
@@ -1,5 +1,9 @@
2021-04-08 Tom Tromey <tom@tromey.com>
+ * func.c: Include sys/time.h.
+
+2021-04-08 Tom Tromey <tom@tromey.com>
+
* sis.c (run_sim, main): Use new-style declaration.
* interf.c (run_sim, sim_open, sim_close, sim_load)
(sim_create_inferior, sim_store_register, sim_fetch_register)
diff --git a/sim/erc32/func.c b/sim/erc32/func.c
index 98217f0..c6dfa19 100644
--- a/sim/erc32/func.c
+++ b/sim/erc32/func.c
@@ -26,6 +26,7 @@
#include <dis-asm.h>
#include "sim-config.h"
#include <inttypes.h>
+#include <sys/time.h>
#define VAL(x) strtoul(x,(char **)NULL,0)
diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog
index c32d2c5..a067ff8 100644
--- a/sim/frv/ChangeLog
+++ b/sim/frv/ChangeLog
@@ -1,5 +1,15 @@
2021-04-08 Tom Tromey <tom@tromey.com>
+ * traps.c: Include stdlib.h.
+ * registers.c: Include stdlib.h.
+ * profile.c: Include stdlib.h.
+ * memory.c: Include stdlib.h.
+ * interrupts.c: Include stdlib.h.
+ * frv.c: Include stdlib.h.
+ * cache.c: Include stdlib.h.
+
+2021-04-08 Tom Tromey <tom@tromey.com>
+
* sim-if.c (sim_open, frv_sim_close, sim_create_inferior): Use
new-style declaration.
diff --git a/sim/frv/cache.c b/sim/frv/cache.c
index 9e2a99f..c10d463 100644
--- a/sim/frv/cache.c
+++ b/sim/frv/cache.c
@@ -24,6 +24,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-main.h"
#include "cache.h"
#include "bfd.h"
+#include <stdlib.h>
void
frv_cache_init (SIM_CPU *cpu, FRV_CACHE *cache)
diff --git a/sim/frv/frv.c b/sim/frv/frv.c
index 88290be..fee59c2 100644
--- a/sim/frv/frv.c
+++ b/sim/frv/frv.c
@@ -28,6 +28,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "bfd.h"
#include "gdb/sim-frv.h"
#include <math.h>
+#include <stdlib.h>
/* Maintain a flag in order to know when to write the address of the next
VLIW instruction into the LR register. Used by JMPL. JMPIL, and CALL
diff --git a/sim/frv/interrupts.c b/sim/frv/interrupts.c
index d38620c..0b8ed76 100644
--- a/sim/frv/interrupts.c
+++ b/sim/frv/interrupts.c
@@ -22,6 +22,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-main.h"
#include "bfd.h"
+#include <stdlib.h>
/* FR-V Interrupt table.
Describes the interrupts supported by the FR-V.
diff --git a/sim/frv/memory.c b/sim/frv/memory.c
index ea7f68e..5978d15 100644
--- a/sim/frv/memory.c
+++ b/sim/frv/memory.c
@@ -23,6 +23,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-main.h"
#include "cgen-mem.h"
#include "bfd.h"
+#include <stdlib.h>
/* Check for alignment and access restrictions. Return the corrected address.
*/
diff --git a/sim/frv/profile.c b/sim/frv/profile.c
index c089508..441590e 100644
--- a/sim/frv/profile.c
+++ b/sim/frv/profile.c
@@ -24,6 +24,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#include "sim-main.h"
#include "bfd.h"
+#include <stdlib.h>
#if WITH_PROFILE_MODEL_P
diff --git a/sim/frv/registers.c b/sim/frv/registers.c
index c9d26fd..764a675 100644
--- a/sim/frv/registers.c
+++ b/sim/frv/registers.c
@@ -22,6 +22,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-main.h"
#include "bfd.h"
+#include <stdlib.h>
#define IMPL 1 /* Implemented */
#define SUP 1 /* Supervisor register */
diff --git a/sim/frv/traps.c b/sim/frv/traps.c
index 79ea157..c0ed9b1 100644
--- a/sim/frv/traps.c
+++ b/sim/frv/traps.c
@@ -29,6 +29,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "bfd.h"
#include "libiberty.h"
+#include <stdlib.h>
+
CGEN_ATTR_VALUE_ENUM_TYPE frv_current_fm_slot;
/* The semantic code invokes this for invalid (unrecognized) instructions. */
diff --git a/sim/iq2000/ChangeLog b/sim/iq2000/ChangeLog
index 970df79..95ad2a8 100644
--- a/sim/iq2000/ChangeLog
+++ b/sim/iq2000/ChangeLog
@@ -1,5 +1,9 @@
2021-04-08 Tom Tromey <tom@tromey.com>
+ * iq2000.c: Include stdlib.h.
+
+2021-04-08 Tom Tromey <tom@tromey.com>
+
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
* iq2000.c (fetch_str): Use new-style declaration.
diff --git a/sim/iq2000/iq2000.c b/sim/iq2000/iq2000.c
index 23a3429..e03c479 100644
--- a/sim/iq2000/iq2000.c
+++ b/sim/iq2000/iq2000.c
@@ -23,6 +23,7 @@
#include "sim-main.h"
#include "cgen-mem.h"
#include "cgen-ops.h"
+#include <stdlib.h>
enum
{
diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog
index f964397..3252bde 100644
--- a/sim/m32r/ChangeLog
+++ b/sim/m32r/ChangeLog
@@ -1,5 +1,10 @@
2021-04-08 Tom Tromey <tom@tromey.com>
+ * traps.c: Include stdlib.h.
+ * m32r.c: Include stdlib.h.
+
+2021-04-08 Tom Tromey <tom@tromey.com>
+
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c
index 1c5379c..1d0a735 100644
--- a/sim/m32r/m32r.c
+++ b/sim/m32r/m32r.c
@@ -23,6 +23,7 @@
#include "sim-main.h"
#include "cgen-mem.h"
#include "cgen-ops.h"
+#include <stdlib.h>
/* Return the size of REGNO in bytes. */
diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c
index 9edf66b..9fca2b1 100644
--- a/sim/m32r/traps.c
+++ b/sim/m32r/traps.c
@@ -20,6 +20,7 @@
#include "sim-main.h"
#include "sim-syscall.h"
#include "targ-vals.h"
+#include <stdlib.h>
#define TRAP_FLUSH_CACHE 12
/* The semantic code invokes this for invalid (unrecognized) instructions. */
diff --git a/sim/ppc/ChangeLog b/sim/ppc/ChangeLog
index 910996f..269411e 100644
--- a/sim/ppc/ChangeLog
+++ b/sim/ppc/ChangeLog
@@ -1,3 +1,7 @@
+2021-04-08 Tom Tromey <tom@tromey.com>
+
+ * emul_unix.c: Include time.h.
+
2021-04-08 Simon Marchi <simon.marchi@polymtl.ca>
* Makefile.in: Set ASAN_OPTIONS when running igen.
diff --git a/sim/ppc/emul_unix.c b/sim/ppc/emul_unix.c
index 92c3c1e..2616ae4 100644
--- a/sim/ppc/emul_unix.c
+++ b/sim/ppc/emul_unix.c
@@ -124,6 +124,7 @@ int getrusage();
#endif
#include <stdlib.h>
+#include <time.h>
#if defined(BSD) && !defined(errno) && (BSD < 199306) /* here BSD as just a bug */
extern int errno;
generated by cgit v1.1 at 2024-07-28 19:41:56 +0000