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-rw-r--r--sim/or1k/Makefile.in2
-rw-r--r--sim/or1k/arch.c2
-rw-r--r--sim/or1k/arch.h2
-rw-r--r--sim/or1k/cpu.c2
-rw-r--r--sim/or1k/cpu.h2
-rw-r--r--sim/or1k/cpuall.h2
-rw-r--r--sim/or1k/decode.c2
-rw-r--r--sim/or1k/decode.h2
-rw-r--r--sim/or1k/mloop.in2
-rw-r--r--sim/or1k/model.c2
-rw-r--r--sim/or1k/or1k-sim.h2
-rw-r--r--sim/or1k/or1k.c2
-rw-r--r--sim/or1k/sem-switch.c2
-rw-r--r--sim/or1k/sem.c2
-rw-r--r--sim/or1k/sim-if.c2
-rw-r--r--sim/or1k/sim-main.h2
-rw-r--r--sim/or1k/traps.c2
17 files changed, 17 insertions, 17 deletions
diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in
index 4086823..e0b5605 100644
--- a/sim/or1k/Makefile.in
+++ b/sim/or1k/Makefile.in
@@ -1,5 +1,5 @@
# Makefile template for configure for the or1k simulator
-# Copyright (C) 2017-2020 Free Software Foundation, Inc.
+# Copyright (C) 2017-2021 Free Software Foundation, Inc.
#
# This file is part of GDB, the GNU debugger.
#
diff --git a/sim/or1k/arch.c b/sim/or1k/arch.c
index 1e63074..97a7a38 100644
--- a/sim/or1k/arch.c
+++ b/sim/or1k/arch.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996-2020 Free Software Foundation, Inc.
+Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of the GNU simulators.
diff --git a/sim/or1k/arch.h b/sim/or1k/arch.h
index 66d718b..d4d4220 100644
--- a/sim/or1k/arch.h
+++ b/sim/or1k/arch.h
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996-2020 Free Software Foundation, Inc.
+Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of the GNU simulators.
diff --git a/sim/or1k/cpu.c b/sim/or1k/cpu.c
index 1e6f3b1..3743f11 100644
--- a/sim/or1k/cpu.c
+++ b/sim/or1k/cpu.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996-2020 Free Software Foundation, Inc.
+Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of the GNU simulators.
diff --git a/sim/or1k/cpu.h b/sim/or1k/cpu.h
index 42748f5..35e99c4 100644
--- a/sim/or1k/cpu.h
+++ b/sim/or1k/cpu.h
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996-2020 Free Software Foundation, Inc.
+Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of the GNU simulators.
diff --git a/sim/or1k/cpuall.h b/sim/or1k/cpuall.h
index f411ec0..65af75e 100644
--- a/sim/or1k/cpuall.h
+++ b/sim/or1k/cpuall.h
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996-2020 Free Software Foundation, Inc.
+Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of the GNU simulators.
diff --git a/sim/or1k/decode.c b/sim/or1k/decode.c
index ca0dd66..e3c9c11 100644
--- a/sim/or1k/decode.c
+++ b/sim/or1k/decode.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996-2020 Free Software Foundation, Inc.
+Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of the GNU simulators.
diff --git a/sim/or1k/decode.h b/sim/or1k/decode.h
index 692f54e..f63cf58 100644
--- a/sim/or1k/decode.h
+++ b/sim/or1k/decode.h
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996-2020 Free Software Foundation, Inc.
+Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of the GNU simulators.
diff --git a/sim/or1k/mloop.in b/sim/or1k/mloop.in
index 52cec90..49c4227 100644
--- a/sim/or1k/mloop.in
+++ b/sim/or1k/mloop.in
@@ -1,6 +1,6 @@
# Simulator main loop for or1k. -*- C -*-
#
-# Copyright (C) 2017-2020 Free Software Foundation, Inc.
+# Copyright (C) 2017-2021 Free Software Foundation, Inc.
#
# This file is part of the GNU Simulators.
#
diff --git a/sim/or1k/model.c b/sim/or1k/model.c
index 1743cdf..8240d9a 100644
--- a/sim/or1k/model.c
+++ b/sim/or1k/model.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996-2020 Free Software Foundation, Inc.
+Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of the GNU simulators.
diff --git a/sim/or1k/or1k-sim.h b/sim/or1k/or1k-sim.h
index 00c81a5..7d47d89 100644
--- a/sim/or1k/or1k-sim.h
+++ b/sim/or1k/or1k-sim.h
@@ -1,5 +1,5 @@
/* OpenRISC simulator support code header
- Copyright (C) 2017-2020 Free Software Foundation, Inc.
+ Copyright (C) 2017-2021 Free Software Foundation, Inc.
This file is part of GDB, the GNU debugger.
diff --git a/sim/or1k/or1k.c b/sim/or1k/or1k.c
index dfd3517..4b44e50 100644
--- a/sim/or1k/or1k.c
+++ b/sim/or1k/or1k.c
@@ -1,5 +1,5 @@
/* OpenRISC simulator support code
- Copyright (C) 2017-2020 Free Software Foundation, Inc.
+ Copyright (C) 2017-2021 Free Software Foundation, Inc.
This file is part of GDB, the GNU debugger.
diff --git a/sim/or1k/sem-switch.c b/sim/or1k/sem-switch.c
index ae7b82e..108bd10 100644
--- a/sim/or1k/sem-switch.c
+++ b/sim/or1k/sem-switch.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996-2020 Free Software Foundation, Inc.
+Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of the GNU simulators.
diff --git a/sim/or1k/sem.c b/sim/or1k/sem.c
index 298929e..0495f25 100644
--- a/sim/or1k/sem.c
+++ b/sim/or1k/sem.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996-2020 Free Software Foundation, Inc.
+Copyright (C) 1996-2021 Free Software Foundation, Inc.
This file is part of the GNU simulators.
diff --git a/sim/or1k/sim-if.c b/sim/or1k/sim-if.c
index 1c1d184..18f7038 100644
--- a/sim/or1k/sim-if.c
+++ b/sim/or1k/sim-if.c
@@ -1,5 +1,5 @@
/* Main simulator entry points specific to the OR1K.
- Copyright (C) 2017-2020 Free Software Foundation, Inc.
+ Copyright (C) 2017-2021 Free Software Foundation, Inc.
This file is part of GDB, the GNU debugger.
diff --git a/sim/or1k/sim-main.h b/sim/or1k/sim-main.h
index 26a0a1a..f91a351 100644
--- a/sim/or1k/sim-main.h
+++ b/sim/or1k/sim-main.h
@@ -1,5 +1,5 @@
/* OpenRISC simulator main header
- Copyright (C) 2017-2020 Free Software Foundation, Inc.
+ Copyright (C) 2017-2021 Free Software Foundation, Inc.
This file is part of GDB, the GNU debugger.
diff --git a/sim/or1k/traps.c b/sim/or1k/traps.c
index 527e4a1..85d8729 100644
--- a/sim/or1k/traps.c
+++ b/sim/or1k/traps.c
@@ -1,5 +1,5 @@
/* OpenRISC exception, interrupts, syscall and trap support
- Copyright (C) 2017-2020 Free Software Foundation, Inc.
+ Copyright (C) 2017-2021 Free Software Foundation, Inc.
This file is part of GDB, the GNU debugger.
generated by cgit v1.1 at 2024-07-05 09:14:02 +0000