diff options
Diffstat (limited to 'sim/mips/micromipsdsp.igen')
| -rw-r--r-- | sim/mips/micromipsdsp.igen | 1137 |
1 files changed, 1137 insertions, 0 deletions
diff --git a/sim/mips/micromipsdsp.igen b/sim/mips/micromipsdsp.igen new file mode 100644 index 0000000..daa9f83 --- /dev/null +++ b/sim/mips/micromipsdsp.igen @@ -0,0 +1,1137 @@ +// Simulator definition for the micromips DSP ASE. +// Copyright (C) 2005-2015 Free Software Foundation, Inc. +// Contributed by Imagination Technologies, Ltd. +// Written by Andrew Bennett <andrew.bennett@imgtec.com> +// +// This file is part of the MIPS sim. +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. + +000000,5.RT,5.RS,0001000100,111100:POOL32A:32::ABSQ_S.PH +"absq_s.ph r<RT>, r<RS>" +*micromipsdsp: +{ + do_ph_s_absq (SD_, RT, RS); +} + +000000,5.RT,5.RS,0000000100,111100:POOL32A:32::ABSQ_S.QB +"absq_s.qb r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_s_absq (SD_, RT, RS); +} + +000000,5.RT,5.RS,0010000100,111100:POOL32A:32::ABSQ_S.W +"absq_s.w r<RT>, r<RS>" +*micromipsdsp: +{ + do_w_s_absq (SD_, RT, RS); +} + +000000,5.RT,5.RS,5.RD,00000,001101:POOL32A:32::ADDQ.PH +"addq.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_op (SD_, RD, RS, RT, 0, 0); +} + +000000,5.RT,5.RS,5.RD,10000,001101:POOL32A:32::ADDQ_S.PH +"addq_s.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_op (SD_, RD, RS, RT, 0, 1); +} + +000000,5.RT,5.RS,5.RD,01100,000101:POOL32A:32::ADDQ_S.W +"addq_s.w r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_w_op (SD_, RD, RS, RT, 0); +} + +000000,5.RT,5.RS,5.RD,00001,001101:POOL32A:32::ADDQH.PH +"addqh.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qh_ph_op (SD_, RD, RS, RT, 0, 0); +} + +000000,5.RT,5.RS,5.RD,10001,001101:POOL32A:32::ADDQH_R.PH +"addqh_r.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qh_ph_op (SD_, RD, RS, RT, 0, 1); +} + +000000,5.RT,5.RS,5.RD,00010,001101:POOL32A:32::ADDQH.W +"addqh.w r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qh_w_op (SD_, RD, RS, RT, 0, 0); +} + +000000,5.RT,5.RS,5.RD,10010,001101:POOL32A:32::ADDQH_R.W +"addqh_r.w r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qh_w_op (SD_, RD, RS, RT, 0, 1); +} + +000000,5.RT,5.RS,5.RD,01110,000101:POOL32A:32::ADDSC +"addsc r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_addsc (SD_, RD, RS, RT); +} + +000000,5.RT,5.RS,5.RD,00100,001101:POOL32A:32::ADDU.PH +"addu.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_u_ph_op (SD_, RD, RS, RT, 0, 0); +} + +000000,5.RT,5.RS,5.RD,10100,001101:POOL32A:32::ADDU_S.PH +"addu_s.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_u_ph_op (SD_, RD, RS, RT, 0, 1); +} + +000000,5.RT,5.RS,5.RD,00011,001101:POOL32A:32::ADDU.QB +"addu.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_op (SD_, RD, RS, RT, 0, 0); +} + +000000,5.RT,5.RS,5.RD,10011,001101:POOL32A:32::ADDU_S.QB +"addu_s.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_op (SD_, RD, RS, RT, 0, 1); +} + +000000,5.RT,5.RS,5.RD,01111,000101:POOL32A:32::ADDWC +"addwc r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_addwc (SD_, RD, RS, RT); +} + +000000,5.RT,5.RS,5.RD,00101,001101:POOL32A:32::ADDUH.QB +"adduh.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_uh_qb_op (SD_, RD, RS, RT, 0, 0); +} + +000000,5.RT,5.RS,5.RD,10101,001101:POOL32A:32::ADDUH_R.QB +"adduh_r.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_uh_qb_op (SD_, RD, RS, RT, 0, 1); +} + +000000,5.RT,5.RS,5.SA,01000,010101:POOL32A:32::APPEND +"append r<RT>, r<RS>, <SA>" +*micromipsdsp: +{ + do_append (SD_, RT, RS, SA); +} + +000000,5.RT,5.RS,2.BP,00100010,111100:POOL32A:32::BALIGN +"balign r<RT>, r<RS>, <BP>" +*micromipsdsp: +{ + do_balign (SD_, RT, RS, BP); +} + +000000,5.RT,5.RS,0011000100,111100:POOL32A:32::BITREV +"bitrev r<RT>, r<RS>" +*micromipsdsp: +{ + do_bitrev (SD_, RT, RS); +} + +010000,1101100000,16.IMMEDIATE:POOL32I:32::BPOSGE32 +"bposge32 <IMMEDIATE>" +*micromipsdsp: +{ + unsigned32 pos = (DSPCR >> DSPCR_POS_SHIFT) & DSPCR_POS_MASK; + if (pos >= 32) + NIA = delayslot_micromips (SD_, NIA + (EXTEND12 (IMMEDIATE) << 1), NIA, + MICROMIPS_DELAYSLOT_SIZE_ANY); +} + +000000,5.RT,5.RS,0000000000,000101:POOL32A:32::CMP.EQ.PH +"cmp.eq.ph r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_cmpu (SD_, RS, RT, 0); +} + +000000,5.RT,5.RS,0000000001,000101:POOL32A:32::CMP.LT.PH +"cmp.lt.ph r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_cmpu (SD_, RS, RT, 1); +} + +000000,5.RT,5.RS,0000000010,000101:POOL32A:32::CMP.LE.PH +"cmp.le.ph r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_cmpu (SD_, RS, RT, 2); +} + +000000,5.RT,5.RS,5.RD,00110,000101:POOL32A:32::CMPGDU.EQ.QB +"cmpgdu.eq.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_cmpgdu (SD_, RD, RS, RT, 0); +} + +000000,5.RT,5.RS,5.RD,00111,000101:POOL32A:32::CMPGDU.LT.QB +"cmpgdu.lt.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_cmpgdu (SD_, RD, RS, RT, 1); +} + +000000,5.RT,5.RS,5.RD,01000,000101:POOL32A:32::CMPGDU.LE.QB +"cmpgdu.le.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_cmpgdu (SD_, RD, RS, RT, 2); +} + +000000,5.RT,5.RS,5.RD,00011,000101:POOL32A:32::CMPGU.EQ.QB +"cmpgu.eq.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_cmpgu (SD_, RD, RS, RT, 0); +} + +000000,5.RT,5.RS,5.RD,00100,000101:POOL32A:32::CMPGU.LT.QB +"cmpgu.lt.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_cmpgu (SD_, RD, RS, RT, 1); +} + +000000,5.RT,5.RS,5.RD,00101,000101:POOL32A:32::CMPGU.LE.QB +"cmpgu.le.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_cmpgu (SD_, RD, RS, RT, 2); +} + +000000,5.RT,5.RS,0000001001,000101:POOL32A:32::CMPU.EQ.QB +"cmpu.eq.qb r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_cmpu (SD_, RS, RT, 0); +} + +000000,5.RT,5.RS,0000001010,000101:POOL32A:32::CMPU.LT.QB +"cmpu.lt.qb r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_cmpu (SD_, RS, RT, 1); +} + +000000,5.RT,5.RS,0000001011,000101:POOL32A:32::CMPU.LE.QB +"cmpu.le.qb r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_cmpu (SD_, RS, RT, 2); +} + +000000,5.RT,5.RS,2.AC,00000010,111100:POOL32A:32::DPA.W.PH +"dpa.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_w_ph_dot_product (SD_, AC, RS, RT, 0); +} + +000000,5.RT,5.RS,2.AC,00001010,111100:POOL32A:32::DPAQ_S.W.PH +"dpaq_s.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_dot_product (SD_, AC, RS, RT, 0); +} + +000000,5.RT,5.RS,2.AC,01001010,111100:POOL32A:32::DPAQ_SA.L.W +"dpaq_sa.l.w ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_w_dot_product (SD_, AC, RS, RT, 0); +} + +000000,5.RT,5.RS,2.AC,10001010,111100:POOL32A:32::DPAQX_S.W.PH +"dpaqx_s.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qx_w_ph_dot_product (SD_, AC, RS, RT, 0, 0); +} + +000000,5.RT,5.RS,2.AC,11001010,111100:POOL32A:32::DPAQX_SA.W.PH +"dpaqx_sa.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qx_w_ph_dot_product (SD_, AC, RS, RT, 0, 1); +} + +000000,5.RT,5.RS,2.AC,10000010,111100:POOL32A:32::DPAU.H.QBL +"dpau.h.qbl ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_dot_product (SD_, AC, RS, RT, 0, 0); +} + +000000,5.RT,5.RS,2.AC,11000010,111100:POOL32A:32::DPAU.H.QBR +"dpau.h.qbr ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_dot_product (SD_, AC, RS, RT, 0, 1); +} + +000000,5.RT,5.RS,2.AC,01000010,111100:POOL32A:32::DPAX.W.PH +"dpax.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_x_w_ph_dot_product (SD_, AC, RS, RT, 0); +} + +000000,5.RT,5.RS,2.AC,00010010,111100:POOL32A:32::DPS.W.PH +"dps.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_w_ph_dot_product (SD_, AC, RS, RT, 1); +} + +000000,5.RT,5.RS,2.AC,00011010,111100:POOL32A:32::DPSQ_S.W.PH +"dpsq_s.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_dot_product (SD_, AC, RS, RT, 1); +} + +000000,5.RT,5.RS,2.AC,01011010,111100:POOL32A:32::DPSQ_SA.L.W +"dpsq_sa.l.w ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_w_dot_product (SD_, AC, RS, RT, 1); +} + +000000,5.RT,5.RS,2.AC,10011010,111100:POOL32A:32::DPSQX_S.W.PH +"dpsqx_s.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qx_w_ph_dot_product (SD_, AC, RS, RT, 1, 0); +} + +000000,5.RT,5.RS,2.AC,11011010,111100:POOL32A:32::DPSQX_SA.W.PH +"dpsqx_sa.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qx_w_ph_dot_product (SD_, AC, RS, RT, 1, 1); +} + +000000,5.RT,5.RS,2.AC,10010010,111100:POOL32A:32::DPSU.H.QBL +"dpsu.h.qbl ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_dot_product (SD_, AC, RS, RT, 1, 0); +} + +000000,5.RT,5.RS,2.AC,11010010,111100:POOL32A:32::DPSU.H.QBR +"dpsu.h.qbr ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_dot_product (SD_, AC, RS, RT, 1, 1); +} + +000000,5.RT,5.RS,2.AC,01010010,111100:POOL32A:32::DPSX.W.PH +"dpsx.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_x_w_ph_dot_product (SD_, AC, RS, RT, 1); +} + +000000,5.RT,5.SIZE,2.AC,10011001,111100:POOL32A:32::EXTP +"extp r<RT>, ac<AC>, <SIZE>" +*micromipsdsp: +{ + do_extp (SD_, RT, AC, SIZE, 0); +} + +000000,5.RT,5.SIZE,2.AC,11011001,111100:POOL32A:32::EXTPDP +"extpdp r<RT>, ac<AC>, <SIZE>" +*micromipsdsp: +{ + do_extp (SD_, RT, AC, SIZE, 1); +} + +000000,5.RT,5.RS,2.AC,11100010,111100:POOL32A:32::EXTPDPV +"extpdpv r<RT>, ac<AC>, r<RS>" +*micromipsdsp: +{ + do_extpv (SD_, RT, AC, RS, 1); +} + +000000,5.RT,5.RS,2.AC,10100010,111100:POOL32A:32::EXTPV +"extpv r<RT>, ac<AC>, r<RS>" +*micromipsdsp: +{ + do_extpv (SD_, RT, AC, RS, 0); +} + +000000,5.RT,5.SHIFT,2.AC,00111001,111100:POOL32A:32::EXTR.W +"extr.w r<RT>, ac<AC>, <SHIFT>" +*micromipsdsp: +{ + do_w_extr (SD_, RT, AC, SHIFT, 0); +} + +000000,5.RT,5.SHIFT,2.AC,01111001,111100:POOL32A:32::EXTR_R.W +"extr_r.w r<RT>, ac<AC>, <SHIFT>" +*micromipsdsp: +{ + do_w_extr (SD_, RT, AC, SHIFT, 1); +} + +000000,5.RT,5.SHIFT,2.AC,10111001,111100:POOL32A:32::EXTR_RS.W +"extr_rs.w r<RT>, ac<AC>, <SHIFT>" +*micromipsdsp: +{ + do_w_extr (SD_, RT, AC, SHIFT, 2); +} + +000000,5.RT,5.SHIFT,2.AC,11111001,111100:POOL32A:32::EXTR_S.H +"extr_s.h r<RT>, ac<AC>, <SHIFT>" +*micromipsdsp: +{ + do_h_extr (SD_, RT, AC, SHIFT); +} + +000000,5.RT,5.RS,2.AC,00111010,111100:POOL32A:32::EXTRV.W +"extrv.w r<RT>, ac<AC>, r<RS>" +*micromipsdsp: +{ + do_extrv (SD_, RT, AC, RS, 0); +} + +000000,5.RT,5.RS,2.AC,01111010,111100:POOL32A:32::EXTRV_R.W +"extrv_r.w r<RT>, ac<AC>, r<RS>" +*micromipsdsp: +{ + do_extrv (SD_, RT, AC, RS, 1); +} + +000000,5.RT,5.RS,2.AC,10111010,111100:POOL32A:32::EXTRV_RS.W +"extrv_rs.w r<RT>, ac<AC>, r<RS>" +*micromipsdsp: +{ + do_extrv (SD_, RT, AC, RS, 2); +} + +000000,5.RT,5.RS,2.AC,11111010,111100:POOL32A:32::EXTRV_S.H +"extrv_s.h r<RT>, ac<AC>, r<RS>" +*micromipsdsp: +{ + do_extrv_s_h (SD_, RT, AC, RS); +} + +000000,5.RT,5.RS,0100000100,111100:POOL32A:32::INSV +"insv r<RT>, r<RS>" +*micromipsdsp: +{ + do_insv (SD_, RT, RS); +} + +000000,5.INDEX,5.BASE,5.RD,01000,100101:POOL32A:32::LBUX +"lbux r<RD>, r<INDEX>(r<BASE>)" +*micromipsdsp: +{ + do_lxx (SD_, RD, BASE, INDEX, 0); +} + +000000,5.INDEX,5.BASE,5.RD,00101,100101:POOL32A:32::LHX +"lhx r<RD>, r<INDEX>(r<BASE>)" +*micromipsdsp: +{ + do_lxx (SD_, RD, BASE, INDEX, 1); +} + +000000,5.INDEX,5.BASE,5.RD,00110,100101:POOL32A:32::LWX +"lwx r<RD>, r<INDEX>(r<BASE>)" +*micromipsdsp: +{ + do_lxx (SD_, RD, BASE, INDEX, 2); +} + +000000,5.RT,5.RS,2.AC,00101010,111100:POOL32A:32::MADD_DSP +"madd ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_dsp_madd (SD_, AC, RS, RT); +} + +000000,5.RT,5.RS,2.AC,01101010,111100:POOL32A:32::MADDU_DSP +"maddu ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_dsp_maddu (SD_, AC, RS, RT); +} + +000000,5.RT,5.RS,2.AC,01101001,111100:POOL32A:32::MAQ_S.W.PHL +"maq_s.w.phl ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_maq (SD_, AC, RS, RT, 0, 0); +} + +000000,5.RT,5.RS,2.AC,11101001,111100:POOL32A:32::MAQ_SA.W.PHL +"maq_sa.w.phl ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_maq (SD_, AC, RS, RT, 1, 0); +} + +000000,5.RT,5.RS,2.AC,00101001,111100:POOL32A:32::MAQ_S.W.PHR +"maq_s.w.phr ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_maq (SD_, AC, RS, RT, 0, 1); +} + +000000,5.RT,5.RS,2.AC,10101001,111100:POOL32A:32::MAQ_SA.W.PHR +"maq_sa.w.phr ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_maq (SD_, AC, RS, RT, 1, 1); +} + +000000,00000,5.RS,2.AC,00000001,111100:POOL32A:32::MFHI_DSP +"mfhi r<RS>, ac<AC>" +*micromipsdsp: +{ + do_dsp_mfhi (SD_, AC, RS); +} + +000000,00000,5.RS,2.AC,01000001,111100:POOL32A:32::MFLO_DSP +"mflo r<RS>, ac<AC>" +*micromipsdsp: +{ + do_dsp_mflo (SD_, AC, RS); +} + +000000,5.RT,5.RS,5.RD,01010,010101:POOL32A:32::MODSUB +"modsub r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_modsub (SD_, RD, RS, RT); +} + +000000,5.RT,5.RS,2.AC,10101010,111100:POOL32A:32::MSUB_DSP +"msub ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_dsp_msub (SD_, AC, RS, RT); +} + +000000,5.RT,5.RS,2.AC,11101010,111100:POOL32A:32::MSUBU_DSP +"msubu ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_dsp_msubu (SD_, AC, RS, RT); +} + +000000,00000,5.RS,2.AC,10000001,111100:POOL32A:32::MTHI_DSP +"mthi r<RS>, ac<AC>" +*micromipsdsp: +{ + do_dsp_mthi (SD_, AC, RS); +} + +000000,00000,5.RS,2.AC,00001001,111100:POOL32A:32::MTHLIP +"mthlip r<RS>, ac<AC>" +*micromipsdsp: +{ + do_mthlip (SD_, RS, AC); +} + +000000,00000,5.RS,2.AC,11000001,111100:POOL32A:32::MTLO_DSP +"mtlo r<RS>, ac<AC>" +*micromipsdsp: +{ + do_dsp_mtlo (SD_, AC, RS); +} + +000000,5.RT,5.RS,5.RD,00000,101101:POOL32A:32::MUL.PH +"mul.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_op (SD_, RD, RS, RT, 2, 0); +} + +000000,5.RT,5.RS,5.RD,10000,101101:POOL32A:32::MUL_S.PH +"mul_s.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_op (SD_, RD, RS, RT, 2, 1); +} + +000000,5.RT,5.RS,5.RD,00000,100101:POOL32A:32::MULEQ_S.W.PHL +"muleq_s.w.phl r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_muleq (SD_, RD, RS, RT, 0); +} + +000000,5.RT,5.RS,5.RD,00001,100101:POOL32A:32::MULEQ_S.W.PHR +"muleq_s.w.phr r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_muleq (SD_, RD, RS, RT, 1); +} + +000000,5.RT,5.RS,5.RD,00010,010101:POOL32A:32::MULEU_S.PH.QBL +"muleu_s.ph.qbl r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_muleu (SD_, RD, RS, RT, 0); +} + +000000,5.RT,5.RS,5.RD,00011,010101:POOL32A:32::MULEU_S.PH.QBR +"muleu_s.ph.qbr r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_muleu (SD_, RD, RS, RT, 1); +} + +000000,5.RT,5.RS,5.RD,00100,010101:POOL32A:32::MULQ_RS.PH +"mulq_rs.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_mulq (SD_, RD, RS, RT, 1); +} + +000000,5.RT,5.RS,5.RD,00110,010101:POOL32A:32::MULQ_RS.W +"mulq_rs.w r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_w_mulq (SD_, RD, RS, RT, 1); +} + +000000,5.RT,5.RS,5.RD,00101,010101:POOL32A:32::MULQ_S.PH +"mulq_s.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_mulq (SD_, RD, RS, RT, 0); +} + +000000,5.RT,5.RS,5.RD,00111,010101:POOL32A:32::MULQ_S.W +"mulq_s.w r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_w_mulq (SD_, RD, RS, RT, 0); +} + +000000,5.RT,5.RS,2.AC,10110010,111100:POOL32A:32::MULSA.W.PH +"mulsa.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_w_mulsa (SD_, AC, RS, RT); +} + +000000,5.RT,5.RS,2.AC,11110010,111100:POOL32A:32::MULSAQ_S.W.PH +"mulsaq_s.w.ph ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_mulsaq_s_w_ph (SD_, AC, RS, RT); +} + +000000,5.RT,5.RS,2.AC,00110010,111100:POOL32A:32::MULT_DSP +"mult ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_dsp_mult (SD_, AC, RS, RT); +} + +000000,5.RT,5.RS,2.AC,01110010,111100:POOL32A:32::MULTU_DSP +"multu ac<AC>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_dsp_multu (SD_, AC, RS, RT); +} + +000000,5.RT,5.RS,5.RD,00110,101101:POOL32A:32::PACKRL.PH +"packrl.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_packrl (SD_, RD, RS, RT); +} + +000000,5.RT,5.RS,5.RD,01000,101101:POOL32A:32::PICK.PH +"pick.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_pick (SD_, RD, RS, RT); +} + +000000,5.RT,5.RS,5.RD,00111,101101:POOL32A:32::PICK.QB +"pick.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_pick (SD_, RD, RS, RT); +} + +000000,5.RT,5.RS,0101000100,111100:POOL32A:32::PRECEQ.W.PHL +"preceq.w.phl r<RT>, r<RS>" +*micromipsdsp: +{ + do_w_preceq (SD_, RT, RS, 0); +} + +000000,5.RT,5.RS,0110000100,111100:POOL32A:32::PRECEQ.W.PHR +"preceq.w.phr r<RT>, r<RS>" +*micromipsdsp: +{ + do_w_preceq (SD_, RT, RS, 1); +} + +000000,5.RT,5.RS,0111000100,111100:POOL32A:32::PRECEQU.PH.QBL +"precequ.ph.qbl r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_ph_precequ (SD_, RT, RS, 2); +} + +000000,5.RT,5.RS,0111001100,111100:POOL32A:32::PRECEQU.PH.QBLA +"precequ.ph.qbla r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_ph_precequ (SD_, RT, RS, 3); +} + +000000,5.RT,5.RS,1001000100,111100:POOL32A:32::PRECEQU.PH.QBR +"precequ.ph.qbr r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_ph_precequ (SD_, RT, RS, 0); +} + +000000,5.RT,5.RS,1001001100,111100:POOL32A:32::PRECEQU.PH.QBRA +"precequ.ph.qbra r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_ph_precequ (SD_, RT, RS, 1); +} + +000000,5.RT,5.RS,1011000100,111100:POOL32A:32::PRECEU.PH.QBL +"preceu.ph.qbl r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_ph_preceu (SD_, RT, RS, 2); +} + +000000,5.RT,5.RS,1011001100,111100:POOL32A:32::PRECEU.PH.QBLA +"preceu.ph.qbla r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_ph_preceu (SD_, RT, RS, 3); +} + +000000,5.RT,5.RS,1101000100,111100:POOL32A:32::PRECEU.PH.QBR +"preceu.ph.qbr r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_ph_preceu (SD_, RT, RS, 0); +} + +000000,5.RT,5.RS,1101001100,111100:POOL32A:32::PRECEU.PH.QBRA +"preceu.ph.qbra r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_ph_preceu (SD_, RT, RS, 1); +} + +000000,5.RT,5.RS,5.RD,00001,101101:POOL32A:32::PRECR.QB.PH +"precr.qb.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_qb_precr (SD_, RD, RS, RT); +} + +000000,5.RT,5.RS,5.SA,01111,001101:POOL32A:32::PRECR_SRA.PH.W +"precr_sra.ph.w r<RT>, r<RS>, <SA>" +*micromipsdsp: +{ + do_precr_sra (SD_, RT, RS, SA, 0); +} + +000000,5.RT,5.RS,5.SA,11111,001101:POOL32A:32::PRECR_SRA_R.PH.W +"precr_sra_r.ph.w r<RT>, r<RS>, <SA>" +*micromipsdsp: +{ + do_precr_sra (SD_, RT, RS, SA, 1); +} + +000000,5.RT,5.RS,5.RD,00011,101101:POOL32A:32::PRECRQ.PH.W +"precrq.ph.w r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_w_ph_precrq (SD_, RD, RS, RT); +} + +000000,5.RT,5.RS,5.RD,00010,101101:POOL32A:32::PRECRQ.QB.PH +"precrq.qb.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_qb_precrq (SD_, RD, RS, RT, 0); +} + +000000,5.RT,5.RS,5.RD,00101,101101:POOL32A:32::PRECRQU_S.QB.PH +"precrqu_s.qb.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_qb_precrq (SD_, RD, RS, RT, 1); +} + +000000,5.RT,5.RS,5.RD,00100,101101:POOL32A:32::PRECRQ_RS.PH.W +"precrq_rs.ph.w r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_w_ph_rs_precrq (SD_, RD, RS, RT); +} + +000000,5.RT,5.RS,5.SA,01001,010101:POOL32A:32::PREPEND +"prepend r<RT>, r<RS>, <SA>" +*micromipsdsp: +{ + do_prepend (SD_, RT, RS, SA); +} + +000000,5.RT,5.RS,1111000100,111100:POOL32A:32::RADDU.W.QB +"raddu.w.qb r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_w_raddu (SD_, RT, RS); +} + +000000,5.RT,7.CONTROL_MASK,00011001,111100:POOL32A:32::RDDSP +"rddsp r<RT>":CONTROL_MASK == 1111111111 +"rddsp r<RT>, <CONTROL_MASK>" +*micromipsdsp: +{ + do_rddsp (SD_, RT, CONTROL_MASK); +} + +000000,10.IMMEDIATE,5.RD,00000,111101:POOL32A:32::REPL.PH +"repl.ph r<RD>, <IMMEDIATE>" +*micromipsdsp: +{ + do_repl (SD_, RD, IMMEDIATE, 2); +} + +000000,5.RT,8.IMMEDIATE,0010111,111100:POOL32A:32::REPL.QB +"repl.qb r<RT>, <IMMEDIATE>" +*micromipsdsp: +{ + do_repl (SD_, RT, IMMEDIATE, 0); +} + +000000,5.RT,5.RS,0000001100,111100:POOL32A:32::REPLV.PH +"replv.ph r<RT>, r<RS>" +*micromipsdsp: +{ + do_repl (SD_, RT, RS, 3); +} + +000000,5.RT,5.RS,0001001100,111100:POOL32A:32::REPLV.QB +"replv.qb r<RT>, r<RS>" +*micromipsdsp: +{ + do_repl (SD_, RT, RS, 1); +} + +000000,0000,6.IMMEDIATE,2.AC,00000000,011101:POOL32A:32::SHILO +"shilo ac<AC>, <IMMEDIATE>" +*micromipsdsp: +{ + do_shilo (SD_, AC, IMMEDIATE); +} + +000000,00000,5.RS,2.AC,01001001,111100:POOL32A:32::SHILOV +"shilov ac<AC>, r<RS>" +*micromipsdsp: +{ + do_shilov (SD_, AC, RS); +} + +000000,5.RT,5.RS,4.SHIFT,001110,110101:POOL32A:32::SHLL.PH +"shll.ph r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_ph_shift (SD_, RT, RS, SHIFT, 0, 0); +} + +000000,5.RT,5.RS,4.SHIFT,101110,110101:POOL32A:32::SHLL_S.PH +"shll_s.ph r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_ph_shift (SD_, RT, RS, SHIFT, 0, 1); +} + +000000,5.RT,5.RS,3.SHIFT,0100001,111100:POOL32A:32::SHLL.QB +"shll.qb r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_qb_shift (SD_, RT, RS, SHIFT, 0); +} + +000000,5.RT,5.RS,5.RD,01110,001101:POOL32A:32::SHLLV.PH +"shllv.ph r<RD>, r<RT>, r<RS>" +*micromipsdsp: +{ + do_ph_shl (SD_, RD, RT, RS, 0, 0); +} + +000000,5.RT,5.RS,5.RD,11110,001101:POOL32A:32::SHLLV_S.PH +"shllv_s.ph r<RD>, r<RD>, r<RS>" +*micromipsdsp: +{ + do_ph_shl (SD_, RD, RT, RS, 0, 1); +} + +000000,5.RT,5.RS,5.RD,01110,010101:POOL32A:32::SHLLV.QB +"shllv.qb r<RD>, r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_shl (SD_, RD, RT, RS, 0); +} + +000000,5.RT,5.RS,5.RD,01111,010101:POOL32A:32::SHLLV_S.W +"shllv_s.w r<RD>, r<RT>, r<RS>" +*micromipsdsp: +{ + do_w_s_shllv (SD_, RD, RT, RS); +} + +000000,5.RT,5.RS,5.SHIFT,01111,110101:POOL32A:32::SHLL_S.W +"shll_s.w r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_w_shll (SD_, RT, RS, SHIFT); +} + +000000,5.RT,5.RS,3.SHIFT,0000111,111100:POOL32A:32::SHRA.QB +"shra.qb r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_qb_shra (SD_, RT, RS, SHIFT, 0); +} + +000000,5.RT,5.RS,3.SHIFT,1000111,111100:POOL32A:32::SHRA_R.QB +"shra_r.qb r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_qb_shra (SD_, RT, RS, SHIFT, 1); +} + +000000,5.RT,5.RS,4.SHIFT,001100,110101:POOL32A:32::SHRA.PH +"shra.ph r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_ph_shift (SD_, RT, RS, SHIFT, 1, 0); +} + +000000,5.RT,5.RS,4.SHIFT,011100,110101:POOL32A:32::SHRA_R.PH +"shra_r.ph r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_ph_shift (SD_, RT, RS, SHIFT, 1, 1); +} + +000000,5.RT,5.RS,5.RD,00110,001101:POOL32A:32::SHRAV.PH +"shrav.ph r<RD>, r<RT>, r<RS>" +*micromipsdsp: +{ + do_ph_shl (SD_, RD, RT, RS, 1, 0); +} + +000000,5.RT,5.RS,5.RD,10110,001101:POOL32A:32::SHRAV_R.PH +"shrav_r.ph r<RD>, r<RT>, r<RS>" +*micromipsdsp: +{ + do_ph_shl (SD_, RD, RT, RS, 1, 1); +} + +000000,5.RT,5.RS,5.RD,00111,001101:POOL32A:32::SHRAV.QB +"shrav.qb r<RD>, r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_shrav (SD_, RD, RT, RS, 0); +} + +000000,5.RT,5.RS,5.RD,10111,001101:POOL32A:32::SHRAV_R.QB +"shrav_r.qb r<RD>, r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_shrav (SD_, RD, RT, RS, 1); +} + +000000,5.RT,5.RS,5.RD,01011,010101:POOL32A:32::SHRAV_R.W +"shrav_r.w r<RD>, r<RT>, r<RS>" +*micromipsdsp: +{ + do_w_r_shrav (SD_, RD, RT, RS); +} + +000000,5.RT,5.RS,5.SHIFT,01011,110101:POOL32A:32::SHRA_R.W +"shra_r.w r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_w_shra (SD_, RT, RS, SHIFT); +} + +000000,5.RT,5.RS,4.SHIFT,001111,111100:POOL32A:32::SHRL.PH +"shrl.ph r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_ph_shrl (SD_, RT, RS, SHIFT); +} + +000000,5.RT,5.RS,3.SHIFT,1100001,111100:POOL32A:32::SHRL.QB +"shrl.qb r<RT>, r<RS>, <SHIFT>" +*micromipsdsp: +{ + do_qb_shift (SD_, RT, RS, SHIFT, 1); +} + +000000,5.RT,5.RS,5.RD,01100,010101:POOL32A:32::SHRLV.PH +"shrlv.ph r<RD>, r<RT>, r<RS>" +*micromipsdsp: +{ + do_ph_shrlv (SD_, RD, RT, RS); +} + +000000,5.RT,5.RS,5.RD,01101,010101:POOL32A:32::SHRLV.QB +"shrlv.qb r<RD>, r<RT>, r<RS>" +*micromipsdsp: +{ + do_qb_shl (SD_, RD, RT, RS, 1); +} + +000000,5.RT,5.RS,5.RD,01000,001101:POOL32A:32::SUBQ.PH +"subq.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_op (SD_, RD, RS, RT, 1, 0); +} + +000000,5.RT,5.RS,5.RD,11000,001101:POOL32A:32::SUBQ_S.PH +"subq_s.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_ph_op (SD_, RD, RS, RT, 1, 1); +} + +000000,5.RT,5.RS,5.RD,01101,000101:POOL32A:32::SUBQ_S.W +"subq_s.w r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_w_op (SD_, RD, RS, RT, 1); +} + +000000,5.RT,5.RS,5.RD,01001,001101:POOL32A:32::SUBQH.PH +"subqh.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qh_ph_op (SD_, RD, RS, RT, 1, 0); +} + +000000,5.RT,5.RS,5.RD,11001,001101:POOL32A:32::SUBQH_R.PH +"subqh_r.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qh_ph_op (SD_, RD, RS, RT, 1, 1); +} + +000000,5.RT,5.RS,5.RD,01010,001101:POOL32A:32::SUBQH.W +"subqh.w r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qh_w_op (SD_, RD, RS, RT, 1, 0); +} + +000000,5.RT,5.RS,5.RD,11010,001101:POOL32A:32::SUBQH_R.W +"subqh_r.w r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qh_w_op (SD_, RD, RS, RT, 1, 1); +} + +000000,5.RT,5.RS,5.RD,01100,001101:POOL32A:32::SUBU.PH +"subu.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_u_ph_op (SD_, RD, RS, RT, 1, 0); +} + +000000,5.RT,5.RS,5.RD,11100,001101:POOL32A:32::SUBU_S.PH +"subu_s.ph r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_u_ph_op (SD_, RD, RS, RT, 1, 1); +} + +000000,5.RT,5.RS,5.RD,01011,001101:POOL32A:32::SUBU.QB +"subu.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_op (SD_, RD, RS, RT, 1, 0); +} + +000000,5.RT,5.RS,5.RD,11011,001101:POOL32A:32::SUBU_S.QB +"subu_s.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_qb_op (SD_, RD, RS, RT, 1, 1); +} + +000000,5.RT,5.RS,5.RD,01101,001101:POOL32A:32::SUBUH.QB +"subuh.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_uh_qb_op (SD_, RD, RS, RT, 1, 0); +} + +000000,5.RT,5.RS,5.RD,11101,001101:POOL32A:32::SUBUH_R.QB +"subuh_r.qb r<RD>, r<RS>, r<RT>" +*micromipsdsp: +{ + do_uh_qb_op (SD_, RD, RS, RT, 1, 1); +} + +000000,5.RT,7.CONTROL_MASK,01011001,111100:POOL32A:32::WRDSP +"wrdsp r<RT>":CONTROL_MASK == 1111111111 +"wrdsp r<RT>, <CONTROL_MASK>" +*micromipsdsp: +{ + do_wrdsp (SD_, RT, CONTROL_MASK); +} |