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Diffstat (limited to 'sim/h8300/ChangeLog')
| -rw-r--r-- | sim/h8300/ChangeLog | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/sim/h8300/ChangeLog b/sim/h8300/ChangeLog index b4e0655..cd81e6e 100644 --- a/sim/h8300/ChangeLog +++ b/sim/h8300/ChangeLog @@ -1,3 +1,17 @@ +2003-06-18 Michael Snyder <msnyder@redhat.com> + + * compile.c: Replace "Hitachi" with "Renesas". + (decode): Distinguish AV_H8S from AV_H8H. + (sim_resume): H8SX can use any register for TAS. + (decode): Add support for VECIND. + (sim_resume): Implement rte/l and rts/l. + (GETSR): New macro (actually old macro reincarnated). + (decode): Add handling for IMM2. + (sim_resume): Drop extra block around jmp, jsr, rts. + Add handling for trapa and rte. + For divxu.b, change 0xffff mask to 0xff. + (set_h8300h): Add bfd_mach_h8300sxn machine. + 2003-06-18 Corinna Vinschen <vinschen@redhat.com> * sim-main.h (enum h8_regnum): Turn around order of MACH, MACL |