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-rw-r--r--sim/cris/ChangeLog8
-rw-r--r--sim/cris/arch.c2
-rw-r--r--sim/cris/cpuall.h4
-rw-r--r--sim/cris/modelv10.c6
-rw-r--r--sim/cris/modelv32.c6
5 files changed, 17 insertions, 9 deletions
diff --git a/sim/cris/ChangeLog b/sim/cris/ChangeLog
index 416db96..ff73db1 100644
--- a/sim/cris/ChangeLog
+++ b/sim/cris/ChangeLog
@@ -1,5 +1,13 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
+ * arch.c: Rename MACH to SIM_MACH.
+ * cpuall.h: Likewise.
+ * modelv10.c: Rename MACH to SIM_MACH, MACH_IMP_PROPERTIES to
+ SIM_MACH_IMP_PROPERTIES, and MODEL to SIM_MODEL.
+ * modelv32.c: Likewise.
+
+2015-12-25 Mike Frysinger <vapier@gentoo.org>
+
* sim-main.h (WITH_SCACHE_PBB): Move from ...
* tconfig.h (WITH_SCACHE_PBB): ... here.
diff --git a/sim/cris/arch.c b/sim/cris/arch.c
index d8163da..0c3f310c 100644
--- a/sim/cris/arch.c
+++ b/sim/cris/arch.c
@@ -24,7 +24,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "bfd.h"
-const MACH *sim_machs[] =
+const SIM_MACH *sim_machs[] =
{
#ifdef HAVE_CPU_CRISV10F
& crisv10_mach,
diff --git a/sim/cris/cpuall.h b/sim/cris/cpuall.h
index 0a4b837..edb33df 100644
--- a/sim/cris/cpuall.h
+++ b/sim/cris/cpuall.h
@@ -56,8 +56,8 @@ This file is part of the GNU simulators.
#include "decodev32.h"
#endif
-extern const MACH crisv10_mach;
-extern const MACH crisv32_mach;
+extern const SIM_MACH crisv10_mach;
+extern const SIM_MACH crisv32_mach;
#ifndef WANT_CPU
/* The ARGBUF struct. */
diff --git a/sim/cris/modelv10.c b/sim/cris/modelv10.c
index 87e7901..ae43c90 100644
--- a/sim/cris/modelv10.c
+++ b/sim/cris/modelv10.c
@@ -4113,7 +4113,7 @@ crisv10_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
-static const MODEL crisv10_models[] =
+static const SIM_MODEL crisv10_models[] =
{
{ "crisv10", & crisv10_mach, MODEL_CRISV10, TIMING_DATA (& crisv10_timing[0]), crisv10_model_init },
{ 0 }
@@ -4121,7 +4121,7 @@ static const MODEL crisv10_models[] =
/* The properties of this cpu's implementation. */
-static const MACH_IMP_PROPERTIES crisv10f_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES crisv10f_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@@ -4163,7 +4163,7 @@ crisv10_init_cpu (SIM_CPU *cpu)
#endif
}
-const MACH crisv10_mach =
+const SIM_MACH crisv10_mach =
{
"crisv10", "cris", MACH_CRISV10,
32, 32, & crisv10_models[0], & crisv10f_imp_properties,
diff --git a/sim/cris/modelv32.c b/sim/cris/modelv32.c
index 6c90306..61afc3d 100644
--- a/sim/cris/modelv32.c
+++ b/sim/cris/modelv32.c
@@ -5904,7 +5904,7 @@ crisv32_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
-static const MODEL crisv32_models[] =
+static const SIM_MODEL crisv32_models[] =
{
{ "crisv32", & crisv32_mach, MODEL_CRISV32, TIMING_DATA (& crisv32_timing[0]), crisv32_model_init },
{ 0 }
@@ -5912,7 +5912,7 @@ static const MODEL crisv32_models[] =
/* The properties of this cpu's implementation. */
-static const MACH_IMP_PROPERTIES crisv32f_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES crisv32f_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@@ -5954,7 +5954,7 @@ crisv32_init_cpu (SIM_CPU *cpu)
#endif
}
-const MACH crisv32_mach =
+const SIM_MACH crisv32_mach =
{
"crisv32", "crisv32", MACH_CRISV32,
32, 32, & crisv32_models[0], & crisv32f_imp_properties,