diff options
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 8 |
2 files changed, 12 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5027e9a..fc9697b 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2019-04-15 Sudakshina Das <sudi.das@arm.com> + + * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern. + 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index e38296e..0ed893b 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -2713,6 +2713,7 @@ static const struct opcode16 thumb_opcodes[] = %E print the lsb and width fields of a bfc/bfi instruction %F print the lsb and width fields of a sbfx/ubfx instruction + %G print a fallback offset for Branch Future instructions %b print a conditional branch offset %B print an unconditional branch offset %s print the shift field of an SSAT instruction @@ -5862,6 +5863,13 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) } break; + case 'G': + { + unsigned int boff = (((given & 0x07800000) >> 23) << 1); + func (stream, "%x", boff); + } + break; + case 'b': { unsigned int S = (given & 0x04000000u) >> 26; |