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-rw-r--r--opcodes/ChangeLog9
-rw-r--r--opcodes/Makefile.am9
-rw-r--r--opcodes/Makefile.in9
-rwxr-xr-xopcodes/configure1
-rw-r--r--opcodes/configure.in1
-rw-r--r--opcodes/moxie-dis.c184
-rw-r--r--opcodes/moxie-opc.c136
7 files changed, 349 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index a8f748e..8209771 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,12 @@
+2009-04-15 Anthony Green <green@moxielogic.com>
+
+ * moxie-opc.c, moxie-dis.c: Created.
+ * Makefile.am: Build the moxie source files.
+ * configure.in: Add moxie support.
+ * Makefile.in, configure: Rebuilt.
+ * disassemble.c (disassembler): Add moxie support.
+ (ARCH_moxie): Define.
+
2009-04-15 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl (protb, protw, protd, protq): Set opcode
diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index f6b5750..24c9296 100644
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -98,6 +98,8 @@ CFILES = \
frv-dis.c \
frv-ibld.c \
frv-opc.c \
+ moxie-dis.c \
+ moxie-opc.c \
h8300-dis.c \
h8500-dis.c \
hppa-dis.c \
@@ -256,6 +258,8 @@ ALL_MACHINES = \
frv-dis.lo \
frv-ibld.lo \
frv-opc.lo \
+ moxie-dis.lo \
+ moxie-opc.lo \
h8300-dis.lo \
h8500-dis.lo \
hppa-dis.lo \
@@ -790,6 +794,11 @@ frv-opc.lo: frv-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
$(INCDIR)/opcode/cgen.h frv-opc.h $(INCDIR)/libiberty.h \
$(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
+moxie-dis.lo: moxie-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/opcode/moxie.h $(INCDIR)/dis-asm.h $(BFD_H) \
+ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+moxie-opc.lo: moxie-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/opcode/moxie.h
h8300-dis.lo: h8300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/h8300.h $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index afbaf2d..f0f4a91 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -337,6 +337,8 @@ CFILES = \
frv-dis.c \
frv-ibld.c \
frv-opc.c \
+ moxie-dis.c \
+ moxie-opc.c \
h8300-dis.c \
h8500-dis.c \
hppa-dis.c \
@@ -495,6 +497,8 @@ ALL_MACHINES = \
frv-dis.lo \
frv-ibld.lo \
frv-opc.lo \
+ moxie-dis.lo \
+ moxie-opc.lo \
h8300-dis.lo \
h8500-dis.lo \
hppa-dis.lo \
@@ -1355,6 +1359,11 @@ frv-opc.lo: frv-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
$(INCDIR)/opcode/cgen.h frv-opc.h $(INCDIR)/libiberty.h \
$(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
+moxie-dis.lo: moxie-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/opcode/moxie.h $(INCDIR)/dis-asm.h $(BFD_H) \
+ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+moxie-opc.lo: moxie-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/opcode/moxie.h
h8300-dis.lo: h8300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/h8300.h $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h
diff --git a/opcodes/configure b/opcodes/configure
index e437761..ba23a48 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -12765,6 +12765,7 @@ if test x${all_targets} = xfalse ; then
bfd_dlx_arch) ta="$ta dlx-dis.lo" ;;
bfd_fr30_arch) ta="$ta fr30-asm.lo fr30-desc.lo fr30-dis.lo fr30-ibld.lo fr30-opc.lo" using_cgen=yes ;;
bfd_frv_arch) ta="$ta frv-asm.lo frv-desc.lo frv-dis.lo frv-ibld.lo frv-opc.lo" using_cgen=yes ;;
+ bfd_moxie_arch) ta="$ta moxie-dis.lo moxie-opc.lo" ;;
bfd_h8300_arch) ta="$ta h8300-dis.lo" ;;
bfd_h8500_arch) ta="$ta h8500-dis.lo" ;;
bfd_hppa_arch) ta="$ta hppa-dis.lo" ;;
diff --git a/opcodes/configure.in b/opcodes/configure.in
index 2ecff8c..7aa9eda 100644
--- a/opcodes/configure.in
+++ b/opcodes/configure.in
@@ -216,6 +216,7 @@ if test x${all_targets} = xfalse ; then
bfd_dlx_arch) ta="$ta dlx-dis.lo" ;;
bfd_fr30_arch) ta="$ta fr30-asm.lo fr30-desc.lo fr30-dis.lo fr30-ibld.lo fr30-opc.lo" using_cgen=yes ;;
bfd_frv_arch) ta="$ta frv-asm.lo frv-desc.lo frv-dis.lo frv-ibld.lo frv-opc.lo" using_cgen=yes ;;
+ bfd_moxie_arch) ta="$ta moxie-dis.lo moxie-opc.lo" ;;
bfd_h8300_arch) ta="$ta h8300-dis.lo" ;;
bfd_h8500_arch) ta="$ta h8500-dis.lo" ;;
bfd_hppa_arch) ta="$ta hppa-dis.lo" ;;
diff --git a/opcodes/moxie-dis.c b/opcodes/moxie-dis.c
new file mode 100644
index 0000000..b1d123f
--- /dev/null
+++ b/opcodes/moxie-dis.c
@@ -0,0 +1,184 @@
+/* Disassemble moxie instructions.
+ Copyright 2009
+ Free Software Foundation, Inc.
+
+ This file is part of the GNU opcodes library.
+
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include <stdio.h>
+#include "sysdep.h"
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include "opcode/moxie.h"
+#include "dis-asm.h"
+
+static fprintf_ftype fpr;
+static void *stream;
+
+/* Macros to extract operands from the instruction word. */
+#define OP_A(i) ((i >> 4) & 0xf)
+#define OP_B(i) (i & 0xf)
+
+static const char * reg_names[16] =
+ { "$fp", "$sp", "$r0", "$r1", "$r2", "$r3", "$r4", "$r5",
+ "$r6", "$r7", "$r8", "$r9", "$r10", "$r11", "$r12", "$r13" };
+
+int
+print_insn_moxie (bfd_vma addr, struct disassemble_info * info)
+{
+ int length = 2;
+ int status;
+ stream = info->stream;
+ const moxie_opc_info_t * opcode;
+ bfd_byte buffer[4];
+ unsigned short iword;
+ fpr = info->fprintf_func;
+
+ if ((status = info->read_memory_func (addr, buffer, 2, info)))
+ goto fail;
+ iword = bfd_getb16 (buffer);
+
+ /* Form 1 instructions have the high bit set to 0. */
+ if ((iword & (1<<15)) == 0)
+ {
+ /* Extract the Form 1 opcode. */
+ opcode = &moxie_form1_opc_info[iword >> 8];
+ switch (opcode->itype)
+ {
+ case MOXIE_F1_NARG:
+ fpr (stream, "%s", opcode->name);
+ break;
+ case MOXIE_F1_A:
+ fpr (stream, "%s\t%s", opcode->name,
+ reg_names[OP_A(iword)]);
+ break;
+ case MOXIE_F1_AB:
+ fpr (stream, "%s\t%s, %s", opcode->name,
+ reg_names[OP_A(iword)],
+ reg_names[OP_B(iword)]);
+ break;
+ case MOXIE_F1_A4:
+ {
+ unsigned imm;
+ if ((status = info->read_memory_func (addr + 2, buffer, 4, info)))
+ goto fail;
+ imm = bfd_getb32 (buffer);
+ fpr (stream, "%s\t%s, 0x%x", opcode->name,
+ reg_names[OP_A(iword)], imm);
+ length = 6;
+ }
+ break;
+ case MOXIE_F1_4:
+ {
+ unsigned imm;
+ if ((status = info->read_memory_func (addr + 2, buffer, 4, info)))
+ goto fail;
+ imm = bfd_getb32 (buffer);
+ fpr (stream, "%s\t0x%x", opcode->name, imm);
+ length = 6;
+ }
+ break;
+ case MOXIE_F1_AiB:
+ fpr (stream, "%s\t(%s), %s", opcode->name,
+ reg_names[OP_A(iword)], reg_names[OP_B(iword)]);
+ break;
+ case MOXIE_F1_ABi:
+ fpr (stream, "%s\t%s, (%s)", opcode->name,
+ reg_names[OP_A(iword)], reg_names[OP_B(iword)]);
+ break;
+ case MOXIE_F1_4A:
+ {
+ unsigned imm;
+ if ((status = info->read_memory_func (addr + 2, buffer, 4, info)))
+ goto fail;
+ imm = bfd_getb32 (buffer);
+ fpr (stream, "%s\t0x%x, %s",
+ opcode->name, imm, reg_names[OP_A(iword)]);
+ length = 6;
+ }
+ break;
+ case MOXIE_F1_AiB4:
+ {
+ unsigned imm;
+ if ((status = info->read_memory_func (addr+2, buffer, 4, info)))
+ goto fail;
+ imm = bfd_getb32 (buffer);
+ fpr (stream, "%s\t0x%x(%s), %s", opcode->name,
+ imm,
+ reg_names[OP_A(iword)],
+ reg_names[OP_B(iword)]);
+ length = 6;
+ }
+ break;
+ case MOXIE_F1_ABi4:
+ {
+ unsigned imm;
+ if ((status = info->read_memory_func (addr+2, buffer, 4, info)))
+ goto fail;
+ imm = bfd_getb32 (buffer);
+ fpr (stream, "%s\t%s, 0x%x(%s)",
+ opcode->name,
+ reg_names[OP_A(iword)],
+ imm,
+ reg_names[OP_B(iword)]);
+ length = 6;
+ }
+ break;
+ default:
+ abort ();
+ }
+ }
+ else if ((iword & (1<<14)) == 0)
+ {
+ /* Extract the Form 2 opcode. */
+ opcode = &moxie_form2_opc_info[(iword >> 12) & 3];
+ switch (opcode->itype)
+ {
+ case MOXIE_F2_A8V:
+ fpr (stream, "%s\t%s, 0x%x",
+ opcode->name,
+ reg_names[(iword >> 8) & 0xf],
+ iword & ((1 << 8) - 1));
+ break;
+ case MOXIE_F2_NARG:
+ fpr (stream, "%s", opcode->name);
+ break;
+ default:
+ abort();
+ }
+ }
+ else
+ {
+ /* Extract the Form 3 opcode. */
+ opcode = &moxie_form2_opc_info[(iword >> 12) & 3];
+ switch (opcode->itype)
+ {
+ case MOXIE_F3_NARG:
+ fpr (stream, "%s", opcode->name);
+ break;
+ default:
+ abort();
+ }
+ }
+
+ return length;
+
+ fail:
+ info->memory_error_func (status, addr, info);
+ return -1;
+}
diff --git a/opcodes/moxie-opc.c b/opcodes/moxie-opc.c
new file mode 100644
index 0000000..559cd11
--- /dev/null
+++ b/opcodes/moxie-opc.c
@@ -0,0 +1,136 @@
+/* moxie-opc.c -- Definitions for moxie opcodes.
+ Copyright 2009 Free Software Foundation, Inc.
+ Contributed by Anthony Green (green@moxielogic.com).
+
+ This file is part of the GNU opcodes library.
+
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this file; see the file COPYING. If not, write to the
+ Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include "sysdep.h"
+#include "opcode/moxie.h"
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0oooooooaaaabbbb
+ 0 F
+
+ ooooooo - form 1 opcode number
+ aaaa - operand A
+ bbbb - operand B
+
+ FORM 2 instructions start with bits "10"...
+
+ 10ooaaaavvvvvvvv
+ 0 F
+
+ oo - form 2 opcode number
+ aaaa - operand A
+ vvvvvvvv - 8-bit immediate value
+
+ FORM 3 instructions start with a bits "11"...
+
+ 11oovvvvvvvvvvvv
+ 0 F
+
+ oo - form 3 opcode number
+ vvvvvvvvvvvv - 12-bit immediate value. */
+
+const moxie_opc_info_t moxie_form1_opc_info[64] =
+ {
+ { 0x00, MOXIE_F1_NARG, "nop" },
+ { 0x01, MOXIE_F1_A4, "ldi.l" },
+ { 0x02, MOXIE_F1_AB, "mov" },
+ { 0x03, MOXIE_F1_4, "jsra" },
+ { 0x04, MOXIE_F1_NARG, "ret" },
+ { 0x05, MOXIE_F1_AB, "add.l" },
+ { 0x06, MOXIE_F1_AB, "push" },
+ { 0x07, MOXIE_F1_AB, "pop" },
+ { 0x08, MOXIE_F1_A4, "lda.l" },
+ { 0x09, MOXIE_F1_4A, "sta.l" },
+ { 0x0a, MOXIE_F1_ABi, "ld.l" },
+ { 0x0b, MOXIE_F1_AiB, "st.l" },
+ { 0x0c, MOXIE_F1_ABi4, "ldo.l" },
+ { 0x0d, MOXIE_F1_AiB4, "sto.l" },
+ { 0x0e, MOXIE_F1_AB, "cmp" },
+ { 0x0f, MOXIE_F1_4, "beq" },
+ { 0x10, MOXIE_F1_4, "bne" },
+ { 0x11, MOXIE_F1_4, "blt" },
+ { 0x12, MOXIE_F1_4, "bgt" },
+ { 0x13, MOXIE_F1_4, "bltu" },
+ { 0x14, MOXIE_F1_4, "bgtu" },
+ { 0x15, MOXIE_F1_4, "bge" },
+ { 0x16, MOXIE_F1_4, "ble" },
+ { 0x17, MOXIE_F1_4, "bgeu" },
+ { 0x18, MOXIE_F1_4, "bleu" },
+ { 0x19, MOXIE_F1_A, "jsr" },
+ { 0x1a, MOXIE_F1_4, "jmpa" },
+ { 0x1b, MOXIE_F1_A4, "ldi.b" },
+ { 0x1c, MOXIE_F1_ABi, "ld.b" },
+ { 0x1d, MOXIE_F1_A4, "lda.b" },
+ { 0x1e, MOXIE_F1_AiB, "st.b" },
+ { 0x1f, MOXIE_F1_4A, "sta.b" },
+ { 0x20, MOXIE_F1_A4, "ldi.s" },
+ { 0x21, MOXIE_F1_ABi, "ld.s" },
+ { 0x22, MOXIE_F1_A4, "lda.s" },
+ { 0x23, MOXIE_F1_AiB, "st.s" },
+ { 0x24, MOXIE_F1_4A, "sta.s" },
+ { 0x25, MOXIE_F1_A, "jmp" },
+ { 0x26, MOXIE_F1_AB, "and" },
+ { 0x27, MOXIE_F1_AB, "lshr" },
+ { 0x28, MOXIE_F1_AB, "ashl" },
+ { 0x29, MOXIE_F1_AB, "sub.l" },
+ { 0x2a, MOXIE_F1_AB, "neg" },
+ { 0x2b, MOXIE_F1_AB, "or" },
+ { 0x2c, MOXIE_F1_AB, "not" },
+ { 0x2d, MOXIE_F1_AB, "ashr" },
+ { 0x2e, MOXIE_F1_AB, "xor" },
+ { 0x2f, MOXIE_F1_AB, "mul.l" },
+ { 0x30, MOXIE_F1_4, "swi" },
+ { 0x31, MOXIE_F1_AB, "div.l" },
+ { 0x32, MOXIE_F1_AB, "udiv.l" },
+ { 0x33, MOXIE_F1_AB, "mod.l" },
+ { 0x34, MOXIE_F1_AB, "umod.l" },
+ { 0x35, MOXIE_F1_NARG, "brk" },
+ { 0x36, MOXIE_F1_ABi4, "ldo.b" },
+ { 0x37, MOXIE_F1_AiB4, "sto.b" },
+ { 0x38, MOXIE_F1_ABi4, "ldo.s" },
+ { 0x39, MOXIE_F1_AiB4, "sto.s" },
+ { 0x3a, MOXIE_F1_NARG, "bad" },
+ { 0x3b, MOXIE_F1_NARG, "bad" },
+ { 0x3c, MOXIE_F1_NARG, "bad" },
+ { 0x3d, MOXIE_F1_NARG, "bad" },
+ { 0x3e, MOXIE_F1_NARG, "bad" },
+ { 0x3f, MOXIE_F1_NARG, "bad" }
+ };
+
+const moxie_opc_info_t moxie_form2_opc_info[4] =
+ {
+ { 0x00, MOXIE_F2_A8V, "inc" },
+ { 0x01, MOXIE_F2_A8V, "dec" },
+ { 0x02, MOXIE_F2_A8V, "gsr" },
+ { 0x03, MOXIE_F2_A8V, "ssr" }
+ };
+
+const moxie_opc_info_t moxie_form3_opc_info[4] =
+ {
+ { 0x00, MOXIE_F2_NARG, "bad" },
+ { 0x01, MOXIE_F2_NARG, "bad" },
+ { 0x02, MOXIE_F2_NARG, "bad" },
+ { 0x03, MOXIE_F2_NARG, "bad" }
+ };
+