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-rw-r--r--include/ChangeLog5
-rw-r--r--include/opcode/mips.h3
2 files changed, 8 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 171d4bd..b940504 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2017-06-30 Maciej W. Rozycki <macro@imgtec.com>
+ Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * opcode/mips.h (ASE_XPA_VIRT): New macro.
+
2017-06-29 Andreas Arnez <arnez@linux.vnet.ibm.com>
* elf/common.h (NT_S390_GS_CB): New macro.
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 1b3b2c6..ceae9ec 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1291,6 +1291,9 @@ static const unsigned int mips_isa_table[] = {
#define ASE_MIPS16E2 0x00008000
/* MIPS16e2 MT ASE instructions. */
#define ASE_MIPS16E2_MT 0x00010000
+/* The Virtualization ASE has eXtended Physical Addressing (XPA)
+ instructions which are only valid when both ASEs are enabled. */
+#define ASE_XPA_VIRT 0x00020000
/* MIPS ISA defines, use instead of hardcoding ISA level. */