diff options
Diffstat (limited to 'gdb/tilegx-tdep.c')
-rw-r--r-- | gdb/tilegx-tdep.c | 280 |
1 files changed, 130 insertions, 150 deletions
diff --git a/gdb/tilegx-tdep.c b/gdb/tilegx-tdep.c index 5dfb237..811d77f 100644 --- a/gdb/tilegx-tdep.c +++ b/gdb/tilegx-tdep.c @@ -55,11 +55,11 @@ struct tilegx_frame_cache /* Register state values used by analyze_prologue. */ enum reverse_state - { - REVERSE_STATE_REGISTER, - REVERSE_STATE_VALUE, - REVERSE_STATE_UNKNOWN - }; +{ + REVERSE_STATE_REGISTER, + REVERSE_STATE_VALUE, + REVERSE_STATE_UNKNOWN +}; /* Register state used by analyze_prologue(). */ struct tilegx_reverse_regs @@ -69,91 +69,87 @@ struct tilegx_reverse_regs }; static const struct tilegx_reverse_regs -template_reverse_regs[TILEGX_NUM_PHYS_REGS] = - { - { TILEGX_R0_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R1_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R2_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R3_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R4_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R5_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R6_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R7_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R8_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R9_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R10_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R11_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R12_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R13_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R14_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R15_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R16_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R17_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R18_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R19_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R20_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R21_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R22_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R23_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R24_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R25_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R26_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R27_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R28_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R29_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R30_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R31_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R32_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R33_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R34_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R35_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R36_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R37_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R38_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R39_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R40_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R41_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R42_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R43_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R44_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R45_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R46_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R47_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R48_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R49_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R50_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R51_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_R52_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_TP_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_SP_REGNUM, REVERSE_STATE_REGISTER }, - { TILEGX_LR_REGNUM, REVERSE_STATE_REGISTER }, - { 0, REVERSE_STATE_UNKNOWN }, - { 0, REVERSE_STATE_UNKNOWN }, - { 0, REVERSE_STATE_UNKNOWN }, - { 0, REVERSE_STATE_UNKNOWN }, - { 0, REVERSE_STATE_UNKNOWN }, - { 0, REVERSE_STATE_UNKNOWN }, - { 0, REVERSE_STATE_UNKNOWN }, - { TILEGX_ZERO_REGNUM, REVERSE_STATE_VALUE } - }; + template_reverse_regs[TILEGX_NUM_PHYS_REGS] + = { { TILEGX_R0_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R1_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R2_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R3_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R4_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R5_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R6_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R7_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R8_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R9_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R10_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R11_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R12_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R13_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R14_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R15_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R16_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R17_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R18_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R19_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R20_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R21_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R22_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R23_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R24_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R25_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R26_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R27_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R28_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R29_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R30_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R31_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R32_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R33_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R34_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R35_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R36_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R37_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R38_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R39_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R40_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R41_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R42_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R43_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R44_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R45_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R46_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R47_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R48_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R49_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R50_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R51_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_R52_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_TP_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_SP_REGNUM, REVERSE_STATE_REGISTER }, + { TILEGX_LR_REGNUM, REVERSE_STATE_REGISTER }, + { 0, REVERSE_STATE_UNKNOWN }, + { 0, REVERSE_STATE_UNKNOWN }, + { 0, REVERSE_STATE_UNKNOWN }, + { 0, REVERSE_STATE_UNKNOWN }, + { 0, REVERSE_STATE_UNKNOWN }, + { 0, REVERSE_STATE_UNKNOWN }, + { 0, REVERSE_STATE_UNKNOWN }, + { TILEGX_ZERO_REGNUM, REVERSE_STATE_VALUE } }; /* Implement the "register_name" gdbarch method. */ static const char * tilegx_register_name (struct gdbarch *gdbarch, int regnum) { - static const char *const register_names[] = - { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", - "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", - "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", - "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", - "r48", "r49", "r50", "r51", "r52", "tp", "sp", "lr", - "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero", - "pc", "faultnum", - }; + static const char *const register_names[] = { + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", + "r9", "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", + "r18", "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26", + "r27", "r28", "r29", "r30", "r31", "r32", "r33", "r34", "r35", + "r36", "r37", "r38", "r39", "r40", "r41", "r42", "r43", "r44", + "r45", "r46", "r47", "r48", "r49", "r50", "r51", "r52", "tp", + "sp", "lr", "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", + "zero", "pc", "faultnum", + }; gdb_static_assert (TILEGX_NUM_REGS == ARRAY_SIZE (register_names)); return register_names[regnum]; @@ -184,8 +180,7 @@ tilegx_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int num) static int tilegx_type_is_scalar (struct type *t) { - return (t->code () != TYPE_CODE_STRUCT - && t->code () != TYPE_CODE_UNION + return (t->code () != TYPE_CODE_STRUCT && t->code () != TYPE_CODE_UNION && t->code () != TYPE_CODE_ARRAY); } @@ -200,8 +195,8 @@ tilegx_use_struct_convention (struct type *type) /* Only scalars which fit in R0 - R9 can be returned in registers. Otherwise, they are returned via a pointer passed in R0. */ return (!tilegx_type_is_scalar (type) - && (type->length () > (1 + TILEGX_R9_REGNUM - TILEGX_R0_REGNUM) - * tilegx_reg_size)); + && (type->length () + > (1 + TILEGX_R9_REGNUM - TILEGX_R0_REGNUM) * tilegx_reg_size)); } /* Find a function's return value in the appropriate registers (in @@ -268,16 +263,13 @@ tilegx_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) return addr & -8; } - /* Implement the "push_dummy_call" gdbarch method. */ static CORE_ADDR -tilegx_push_dummy_call (struct gdbarch *gdbarch, - struct value *function, - struct regcache *regcache, - CORE_ADDR bp_addr, int nargs, - struct value **args, - CORE_ADDR sp, function_call_return_method return_method, +tilegx_push_dummy_call (struct gdbarch *gdbarch, struct value *function, + struct regcache *regcache, CORE_ADDR bp_addr, + int nargs, struct value **args, CORE_ADDR sp, + function_call_return_method return_method, CORE_ADDR struct_addr) { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); @@ -350,7 +342,6 @@ tilegx_push_dummy_call (struct gdbarch *gdbarch, return stack_dest; } - /* Decode the instructions within the given address range. Decide when we must have reached the end of the function prologue. If a frame_info pointer is provided, fill in its saved_regs etc. @@ -359,9 +350,8 @@ tilegx_push_dummy_call (struct gdbarch *gdbarch, function, and end_addr being the current PC. */ static CORE_ADDR -tilegx_analyze_prologue (struct gdbarch* gdbarch, - CORE_ADDR start_addr, CORE_ADDR end_addr, - struct tilegx_frame_cache *cache, +tilegx_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR start_addr, + CORE_ADDR end_addr, struct tilegx_frame_cache *cache, frame_info_ptr next_frame) { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); @@ -403,8 +393,7 @@ tilegx_analyze_prologue (struct gdbarch* gdbarch, instbuf_start = 0; instbuf_size = 0; - for (next_addr = start_addr; - next_addr < end_addr; + for (next_addr = start_addr; next_addr < end_addr; next_addr += TILEGX_BUNDLE_SIZE_IN_BYTES) { /* Retrieve the next instruction. */ @@ -420,12 +409,12 @@ tilegx_analyze_prologue (struct gdbarch* gdbarch, if (instbuf_size > size_on_same_page) instbuf_size = size_on_same_page; - instbuf_size = std::min ((CORE_ADDR) instbuf_size, - (end_addr - next_addr)); + instbuf_size + = std::min ((CORE_ADDR) instbuf_size, (end_addr - next_addr)); instbuf_start = next_addr; status = safe_frame_unwind_memory (next_frame, instbuf_start, - {instbuf, instbuf_size}); + { instbuf, instbuf_size }); if (status == 0) memory_error (TARGET_XFER_E_IO, next_addr); } @@ -449,25 +438,24 @@ tilegx_analyze_prologue (struct gdbarch* gdbarch, if (cache && reverse_frame[operands[0]].state == REVERSE_STATE_VALUE && reverse_frame[operands[1]].state - == REVERSE_STATE_REGISTER) + == REVERSE_STATE_REGISTER) { LONGEST saved_address = reverse_frame[operands[0]].value; unsigned saved_register = (unsigned) reverse_frame[operands[1]].value; cache->saved_regs[saved_register].set_addr (saved_address); - } - else if (cache - && (operands[0] == TILEGX_SP_REGNUM) + } + else if (cache && (operands[0] == TILEGX_SP_REGNUM) && (operands[1] == TILEGX_LR_REGNUM)) lr_saved_on_stack_p = 1; break; case TILEGX_OPC_ADDI: case TILEGX_OPC_ADDLI: - if (cache - && operands[0] == TILEGX_SP_REGNUM + if (cache && operands[0] == TILEGX_SP_REGNUM && operands[1] == TILEGX_SP_REGNUM - && reverse_frame[operands[1]].state == REVERSE_STATE_REGISTER) + && reverse_frame[operands[1]].state + == REVERSE_STATE_REGISTER) { /* Special case. We're fixing up the stack frame. */ uint64_t hopefully_sp @@ -478,8 +466,8 @@ tilegx_analyze_prologue (struct gdbarch* gdbarch, /* Fix up the sign-extension. */ if (opcode->mnemonic == TILEGX_OPC_ADDI) op2_as_short = op2_as_char; - prev_sp_value = (cache->saved_regs[hopefully_sp].addr () - - op2_as_short); + prev_sp_value + = (cache->saved_regs[hopefully_sp].addr () - op2_as_short); new_reverse_frame[i].state = REVERSE_STATE_VALUE; new_reverse_frame[i].value @@ -668,10 +656,10 @@ tilegx_analyze_prologue (struct gdbarch* gdbarch, /* GCC uses R52 as a frame pointer. Have we seen "move r52, sp"? */ if (reverse_frame[TILEGX_R52_REGNUM].state == REVERSE_STATE_REGISTER && reverse_frame[TILEGX_R52_REGNUM].value == TILEGX_SP_REGNUM) - { - reverse_frame[TILEGX_R52_REGNUM].state = REVERSE_STATE_VALUE; - reverse_frame[TILEGX_R52_REGNUM].value = prev_sp_value; - } + { + reverse_frame[TILEGX_R52_REGNUM].state = REVERSE_STATE_VALUE; + reverse_frame[TILEGX_R52_REGNUM].value = prev_sp_value; + } prev_sp_value = 0; } @@ -746,10 +734,7 @@ tilegx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc) end_pc = std::min (end_pc, s->endaddr ()); /* Otherwise, try to skip prologue the hard way. */ - return tilegx_analyze_prologue (gdbarch, - start_pc, - end_pc, - NULL, NULL); + return tilegx_analyze_prologue (gdbarch, start_pc, end_pc, NULL, NULL); } /* This is the implementation of gdbarch method stack_frame_destroyed_p. */ @@ -825,8 +810,8 @@ tilegx_write_pc (struct regcache *regcache, CORE_ADDR pc) } /* 64-bit pattern for a { bpt ; nop } bundle. */ -constexpr gdb_byte tilegx_break_insn[] = - { 0x00, 0x50, 0x48, 0x51, 0xae, 0x44, 0x6a, 0x28 }; +constexpr gdb_byte tilegx_break_insn[] + = { 0x00, 0x50, 0x48, 0x51, 0xae, 0x44, 0x6a, 0x28 }; typedef BP_MANIPULATION (tilegx_break_insn) tilegx_breakpoint; @@ -853,8 +838,8 @@ tilegx_frame_cache (frame_info_ptr this_frame, void **this_cache) cache->saved_regs[TILEGX_SP_REGNUM].set_value (cache->base); if (cache->start_pc) - tilegx_analyze_prologue (gdbarch, cache->start_pc, current_pc, - cache, this_frame); + tilegx_analyze_prologue (gdbarch, cache->start_pc, current_pc, cache, + this_frame); cache->saved_regs[TILEGX_PC_REGNUM] = cache->saved_regs[TILEGX_LR_REGNUM]; @@ -863,16 +848,14 @@ tilegx_frame_cache (frame_info_ptr this_frame, void **this_cache) /* Retrieve the value of REGNUM in FRAME. */ -static struct value* -tilegx_frame_prev_register (frame_info_ptr this_frame, - void **this_cache, +static struct value * +tilegx_frame_prev_register (frame_info_ptr this_frame, void **this_cache, int regnum) { - struct tilegx_frame_cache *info = - tilegx_frame_cache (this_frame, this_cache); + struct tilegx_frame_cache *info + = tilegx_frame_cache (this_frame, this_cache); - return trad_frame_get_prev_register (this_frame, info->saved_regs, - regnum); + return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); } /* Build frame id. */ @@ -881,8 +864,8 @@ static void tilegx_frame_this_id (frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id) { - struct tilegx_frame_cache *info = - tilegx_frame_cache (this_frame, this_cache); + struct tilegx_frame_cache *info + = tilegx_frame_cache (this_frame, this_cache); /* This marks the outermost frame. */ if (info->base == 0) @@ -894,8 +877,8 @@ tilegx_frame_this_id (frame_info_ptr this_frame, void **this_cache, static CORE_ADDR tilegx_frame_base_address (frame_info_ptr this_frame, void **this_cache) { - struct tilegx_frame_cache *cache = - tilegx_frame_cache (this_frame, this_cache); + struct tilegx_frame_cache *cache + = tilegx_frame_cache (this_frame, this_cache); return cache->base; } @@ -906,17 +889,14 @@ static const struct frame_unwind tilegx_frame_unwind = { default_frame_unwind_stop_reason, tilegx_frame_this_id, tilegx_frame_prev_register, - NULL, /* const struct frame_data *unwind_data */ - default_frame_sniffer, /* frame_sniffer_ftype *sniffer */ - NULL /* frame_prev_pc_ftype *prev_pc */ + NULL, /* const struct frame_data *unwind_data */ + default_frame_sniffer, /* frame_sniffer_ftype *sniffer */ + NULL /* frame_prev_pc_ftype *prev_pc */ }; -static const struct frame_base tilegx_frame_base = { - &tilegx_frame_unwind, - tilegx_frame_base_address, - tilegx_frame_base_address, - tilegx_frame_base_address -}; +static const struct frame_base tilegx_frame_base + = { &tilegx_frame_unwind, tilegx_frame_base_address, + tilegx_frame_base_address, tilegx_frame_base_address }; /* We cannot read/write the "special" registers. */ @@ -925,8 +905,7 @@ tilegx_cannot_reference_register (struct gdbarch *gdbarch, int regno) { if (regno >= 0 && regno < TILEGX_NUM_EASY_REGS) return 0; - else if (regno == TILEGX_PC_REGNUM - || regno == TILEGX_FAULTNUM_REGNUM) + else if (regno == TILEGX_PC_REGNUM || regno == TILEGX_FAULTNUM_REGNUM) return 0; else return 1; @@ -943,8 +922,7 @@ tilegx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) arch_size = bfd_get_arch_size (info.abfd); /* Try to find a pre-existing architecture. */ - for (arches = gdbarch_list_lookup_by_info (arches, &info); - arches != NULL; + for (arches = gdbarch_list_lookup_by_info (arches, &info); arches != NULL; arches = gdbarch_list_lookup_by_info (arches->next, &info)) { /* We only have two flavors -- just make sure arch_size matches. */ @@ -997,7 +975,8 @@ tilegx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_skip_prologue (gdbarch, tilegx_skip_prologue); - set_gdbarch_stack_frame_destroyed_p (gdbarch, tilegx_stack_frame_destroyed_p); + set_gdbarch_stack_frame_destroyed_p (gdbarch, + tilegx_stack_frame_destroyed_p); /* Map debug registers into internal register numbers. */ set_gdbarch_dwarf2_reg_to_regnum (gdbarch, tilegx_dwarf2_reg_to_regnum); @@ -1021,6 +1000,7 @@ tilegx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) } void _initialize_tilegx_tdep (); + void _initialize_tilegx_tdep () { |