diff options
Diffstat (limited to 'gdb/m32c-tdep.c')
| -rw-r--r-- | gdb/m32c-tdep.c | 766 |
1 files changed, 353 insertions, 413 deletions
diff --git a/gdb/m32c-tdep.c b/gdb/m32c-tdep.c index c2c3714..4ea7bba 100644 --- a/gdb/m32c-tdep.c +++ b/gdb/m32c-tdep.c @@ -32,7 +32,6 @@ #include "objfiles.h" #include "gdbarch.h" - /* The m32c tdep structure. */ static const reggroup *m32c_dma_reggroup; @@ -85,7 +84,6 @@ struct m32c_reg int n; }; - /* An overestimate of the number of raw and pseudoregisters we will have. The exact answer depends on the variant of the architecture at hand, but we can use this to declare statically allocated @@ -95,12 +93,13 @@ struct m32c_reg /* The largest assigned DWARF register number. */ #define M32C_MAX_DWARF_REGNUM (40) - struct m32c_gdbarch_tdep : gdbarch_tdep_base { /* All the registers for this variant, indexed by GDB register number, and the number of registers present. */ - struct m32c_reg regs[M32C_MAX_NUM_REGS] {}; + struct m32c_reg regs[M32C_MAX_NUM_REGS] + { + }; /* The number of valid registers. */ int num_regs = 0; @@ -108,7 +107,7 @@ struct m32c_gdbarch_tdep : gdbarch_tdep_base /* Interesting registers. These are pointers into REGS. */ struct m32c_reg *pc = nullptr, *flg = nullptr; struct m32c_reg *r0 = nullptr, *r1 = nullptr, *r2 = nullptr, *r3 = nullptr, - *a0 = nullptr, *a1 = nullptr; + *a0 = nullptr, *a1 = nullptr; struct m32c_reg *r2r0 = nullptr, *r3r2r1r0 = nullptr, *r3r1r2r0 = nullptr; struct m32c_reg *sb = nullptr, *fb = nullptr, *sp = nullptr; @@ -122,7 +121,7 @@ struct m32c_gdbarch_tdep : gdbarch_tdep_base struct type *voyd = nullptr, *ptr_voyd = nullptr, *func_voyd = nullptr; struct type *uint8 = nullptr, *uint16 = nullptr; struct type *int8 = nullptr, *int16 = nullptr, *int32 = nullptr, - *int64 = nullptr; + *int64 = nullptr; /* The types for data address and code address registers. */ struct type *data_addr_reg_type = nullptr, *code_addr_reg_type = nullptr; @@ -136,7 +135,6 @@ struct m32c_gdbarch_tdep : gdbarch_tdep_base int push_addr_bytes = 0; }; - /* Types. */ static void @@ -200,16 +198,14 @@ make_types (struct gdbarch *arch) tdep->code_addr_reg_type = arch_pointer_type (arch, code_addr_reg_bits, type_name, tdep->func_voyd); - tdep->uint8 = arch_integer_type (arch, 8, 1, "uint8_t"); + tdep->uint8 = arch_integer_type (arch, 8, 1, "uint8_t"); tdep->uint16 = arch_integer_type (arch, 16, 1, "uint16_t"); - tdep->int8 = arch_integer_type (arch, 8, 0, "int8_t"); - tdep->int16 = arch_integer_type (arch, 16, 0, "int16_t"); - tdep->int32 = arch_integer_type (arch, 32, 0, "int32_t"); - tdep->int64 = arch_integer_type (arch, 64, 0, "int64_t"); + tdep->int8 = arch_integer_type (arch, 8, 0, "int8_t"); + tdep->int16 = arch_integer_type (arch, 16, 0, "int16_t"); + tdep->int32 = arch_integer_type (arch, 32, 0, "int32_t"); + tdep->int64 = arch_integer_type (arch, 64, 0, "int64_t"); } - - /* Register set. */ static const char * @@ -219,7 +215,6 @@ m32c_register_name (struct gdbarch *gdbarch, int num) return tdep->regs[num].name; } - static struct type * m32c_register_type (struct gdbarch *arch, int reg_nr) { @@ -227,7 +222,6 @@ m32c_register_type (struct gdbarch *arch, int reg_nr) return tdep->regs[reg_nr].type; } - static int m32c_register_sim_regno (struct gdbarch *gdbarch, int reg_nr) { @@ -235,7 +229,6 @@ m32c_register_sim_regno (struct gdbarch *gdbarch, int reg_nr) return tdep->regs[reg_nr].sim_num; } - static int m32c_debug_info_reg_to_regnum (struct gdbarch *gdbarch, int reg_nr) { @@ -249,7 +242,6 @@ m32c_debug_info_reg_to_regnum (struct gdbarch *gdbarch, int reg_nr) return -1; } - static int m32c_register_reggroup_p (struct gdbarch *gdbarch, int regnum, const struct reggroup *group) @@ -258,22 +250,19 @@ m32c_register_reggroup_p (struct gdbarch *gdbarch, int regnum, struct m32c_reg *reg = &tdep->regs[regnum]; /* The anonymous raw registers aren't in any groups. */ - if (! reg->name) + if (!reg->name) return 0; if (group == all_reggroup) return 1; - if (group == general_reggroup - && reg->general_p) + if (group == general_reggroup && reg->general_p) return 1; - if (group == m32c_dma_reggroup - && reg->dma_p) + if (group == m32c_dma_reggroup && reg->dma_p) return 1; - if (group == system_reggroup - && reg->system_p) + if (group == system_reggroup && reg->system_p) return 1; /* Since the m32c DWARF register numbers refer to cooked registers, not @@ -281,15 +270,13 @@ m32c_register_reggroup_p (struct gdbarch *gdbarch, int regnum, containing registers the DWARF CFI will actually mention, our save and restore groups are cooked registers, not raw registers. (This is why we can't use the default reggroup function.) */ - if ((group == save_reggroup - || group == restore_reggroup) + if ((group == save_reggroup || group == restore_reggroup) && reg->save_restore_p) return 1; return 0; } - /* Register move functions. We declare them here using m32c_{read,write}_reg_t to check the types. */ static m32c_read_reg_t m32c_raw_read; @@ -313,7 +300,6 @@ m32c_raw_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf) return cache->raw_read (reg->num, buf); } - /* Copy the value of the raw register REG from BUF to CACHE. */ static enum register_status m32c_raw_write (struct m32c_reg *reg, struct regcache *cache, @@ -324,7 +310,6 @@ m32c_raw_write (struct m32c_reg *reg, struct regcache *cache, return REG_VALID; } - /* Return the value of the 'flg' register in CACHE. */ static int m32c_read_flg (readable_regcache *cache) @@ -337,7 +322,6 @@ m32c_read_flg (readable_regcache *cache) return flg & 0xffff; } - /* Evaluate the real register number of a banked register. */ static struct m32c_reg * m32c_banked_register (struct m32c_reg *reg, readable_regcache *cache) @@ -345,19 +329,18 @@ m32c_banked_register (struct m32c_reg *reg, readable_regcache *cache) return ((m32c_read_flg (cache) & reg->n) ? reg->ry : reg->rx); } - /* Move the value of a banked register from CACHE to BUF. If the value of the 'flg' register in CACHE has any of the bits masked in REG->n set, then read REG->ry. Otherwise, read REG->rx. */ static enum register_status -m32c_banked_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf) +m32c_banked_read (struct m32c_reg *reg, readable_regcache *cache, + gdb_byte *buf) { struct m32c_reg *bank_reg = m32c_banked_register (reg, cache); return cache->raw_read (bank_reg->num, buf); } - /* Move the value of a banked register from BUF to CACHE. If the value of the 'flg' register in CACHE has any of the bits masked in REG->n set, then write REG->ry. Otherwise, write @@ -372,7 +355,6 @@ m32c_banked_write (struct m32c_reg *reg, struct regcache *cache, return REG_VALID; } - /* Move the value of SB from CACHE to BUF. On bfd_mach_m32c, SB is a banked register; on bfd_mach_m16c, it's not. */ static enum register_status @@ -384,11 +366,11 @@ m32c_sb_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf) return m32c_banked_read (reg, cache, buf); } - /* Move the value of SB from BUF to CACHE. On bfd_mach_m32c, SB is a banked register; on bfd_mach_m16c, it's not. */ static enum register_status -m32c_sb_write (struct m32c_reg *reg, struct regcache *cache, const gdb_byte *buf) +m32c_sb_write (struct m32c_reg *reg, struct regcache *cache, + const gdb_byte *buf) { if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c) m32c_raw_write (reg->rx, cache, buf); @@ -398,7 +380,6 @@ m32c_sb_write (struct m32c_reg *reg, struct regcache *cache, const gdb_byte *buf return REG_VALID; } - /* Assuming REG uses m32c_part_read and m32c_part_write, set *OFFSET_P and *LEN_P to the offset and length, in bytes, of the part REG occupies in its underlying register. The offset is from the @@ -435,7 +416,6 @@ m32c_find_part (struct m32c_reg *reg, int *offset_p, int *len_p) *len_p = elt_len; } - /* Move the value of a partial register (r0h, intbl, etc.) from CACHE to BUF. Treating the value of the register REG->rx as an array of REG->type values, where higher indices refer to more significant @@ -450,7 +430,6 @@ m32c_part_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf) return cache->cooked_read_part (reg->rx->num, offset, len, buf); } - /* Move the value of a banked register from BUF to CACHE. Treating the value of the register REG->rx as an array of REG->type values, where higher indices refer to more significant bits, write @@ -467,7 +446,6 @@ m32c_part_write (struct m32c_reg *reg, struct regcache *cache, return REG_VALID; } - /* Move the value of REG from CACHE to BUF. REG's value is the concatenation of the values of the registers REG->rx and REG->ry, with REG->rx contributing the more significant bits. */ @@ -475,7 +453,7 @@ static enum register_status m32c_cat_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf) { int high_bytes = reg->rx->type->length (); - int low_bytes = reg->ry->type->length (); + int low_bytes = reg->ry->type->length (); enum register_status status; gdb_assert (reg->type->length () == high_bytes + low_bytes); @@ -495,7 +473,6 @@ m32c_cat_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf) return status; } - /* Move the value of REG from CACHE to BUF. REG's value is the concatenation of the values of the registers REG->rx and REG->ry, with REG->rx contributing the more significant bits. */ @@ -504,7 +481,7 @@ m32c_cat_write (struct m32c_reg *reg, struct regcache *cache, const gdb_byte *buf) { int high_bytes = reg->rx->type->length (); - int low_bytes = reg->ry->type->length (); + int low_bytes = reg->ry->type->length (); gdb_assert (reg->type->length () == high_bytes + low_bytes); @@ -522,12 +499,12 @@ m32c_cat_write (struct m32c_reg *reg, struct regcache *cache, return REG_VALID; } - /* Copy the value of the raw register REG from CACHE to BUF. REG is the concatenation (from most significant to least) of r3, r2, r1, and r0. */ static enum register_status -m32c_r3r2r1r0_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *buf) +m32c_r3r2r1r0_read (struct m32c_reg *reg, readable_regcache *cache, + gdb_byte *buf) { gdbarch *arch = reg->arch; m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch); @@ -558,7 +535,6 @@ m32c_r3r2r1r0_read (struct m32c_reg *reg, readable_regcache *cache, gdb_byte *bu return status; } - /* Copy the value of the raw register REG from BUF to CACHE. REG is the concatenation (from most significant to least) of r3, r2, r1, and r0. */ @@ -588,12 +564,9 @@ m32c_r3r2r1r0_write (struct m32c_reg *reg, struct regcache *cache, return REG_VALID; } - static enum register_status -m32c_pseudo_register_read (struct gdbarch *arch, - readable_regcache *cache, - int cookednum, - gdb_byte *buf) +m32c_pseudo_register_read (struct gdbarch *arch, readable_regcache *cache, + int cookednum, gdb_byte *buf) { m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch); struct m32c_reg *reg; @@ -606,12 +579,9 @@ m32c_pseudo_register_read (struct gdbarch *arch, return reg->read (reg, cache, buf); } - static void -m32c_pseudo_register_write (struct gdbarch *arch, - struct regcache *cache, - int cookednum, - const gdb_byte *buf) +m32c_pseudo_register_write (struct gdbarch *arch, struct regcache *cache, + int cookednum, const gdb_byte *buf) { m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch); struct m32c_reg *reg; @@ -624,47 +594,39 @@ m32c_pseudo_register_write (struct gdbarch *arch, reg->write (reg, cache, buf); } - /* Add a register with the given fields to the end of ARCH's table. Return a pointer to the newly added register. */ static struct m32c_reg * -add_reg (struct gdbarch *arch, - const char *name, - struct type *type, - int sim_num, - m32c_read_reg_t *read, - m32c_write_reg_t *write, - struct m32c_reg *rx, - struct m32c_reg *ry, - int n) +add_reg (struct gdbarch *arch, const char *name, struct type *type, + int sim_num, m32c_read_reg_t *read, m32c_write_reg_t *write, + struct m32c_reg *rx, struct m32c_reg *ry, int n) { m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch); struct m32c_reg *r = &tdep->regs[tdep->num_regs]; gdb_assert (tdep->num_regs < M32C_MAX_NUM_REGS); - r->name = name; - r->type = type; - r->arch = arch; - r->num = tdep->num_regs; - r->sim_num = sim_num; - r->dwarf_num = -1; - r->general_p = 0; - r->dma_p = 0; - r->system_p = 0; + r->name = name; + r->type = type; + r->arch = arch; + r->num = tdep->num_regs; + r->sim_num = sim_num; + r->dwarf_num = -1; + r->general_p = 0; + r->dma_p = 0; + r->system_p = 0; r->save_restore_p = 0; - r->read = read; - r->write = write; - r->rx = rx; - r->ry = ry; - r->n = n; + r->read = read; + r->write = write; + r->rx = rx; + r->ry = ry; + r->n = n; tdep->num_regs++; return r; } - /* Record NUM as REG's DWARF register number. */ static void set_dwarf_regnum (struct m32c_reg *reg, int num) @@ -682,7 +644,6 @@ set_dwarf_regnum (struct m32c_reg *reg, int num) tdep->dwarf_regs[num] = reg; } - /* Mark REG as a general-purpose register, and return it. */ static struct m32c_reg * mark_general (struct m32c_reg *reg) @@ -691,7 +652,6 @@ mark_general (struct m32c_reg *reg) return reg; } - /* Mark REG as a DMA register. */ static void mark_dma (struct m32c_reg *reg) @@ -699,7 +659,6 @@ mark_dma (struct m32c_reg *reg) reg->dma_p = 1; } - /* Mark REG as a SYSTEM register, and return it. */ static struct m32c_reg * mark_system (struct m32c_reg *reg) @@ -708,7 +667,6 @@ mark_system (struct m32c_reg *reg) return reg; } - /* Mark REG as a save-restore register, and return it. */ static struct m32c_reg * mark_save_restore (struct m32c_reg *reg) @@ -717,84 +675,79 @@ mark_save_restore (struct m32c_reg *reg) return reg; } - -#define FLAGBIT_B 0x0010 -#define FLAGBIT_U 0x0080 +#define FLAGBIT_B 0x0010 +#define FLAGBIT_U 0x0080 /* Handy macros for declaring registers. These all evaluate to pointers to the register declared. Macros that define two registers evaluate to a pointer to the first. */ /* A raw register named NAME, with type TYPE and sim number SIM_NUM. */ -#define R(name, type, sim_num) \ - (add_reg (arch, (name), (type), (sim_num), \ - m32c_raw_read, m32c_raw_write, NULL, NULL, 0)) +#define R(name, type, sim_num) \ + (add_reg (arch, (name), (type), (sim_num), m32c_raw_read, m32c_raw_write, \ + NULL, NULL, 0)) /* The simulator register number for a raw register named NAME. */ -#define SIM(name) (m32c_sim_reg_ ## name) +#define SIM(name) (m32c_sim_reg_##name) /* A raw unsigned 16-bit data register named NAME. NAME should be an identifier, not a string. */ -#define R16U(name) \ - (R(#name, tdep->uint16, SIM (name))) +#define R16U(name) (R (#name, tdep->uint16, SIM (name))) /* A raw data address register named NAME. NAME should be an identifier, not a string. */ -#define RA(name) \ - (R(#name, tdep->data_addr_reg_type, SIM (name))) +#define RA(name) (R (#name, tdep->data_addr_reg_type, SIM (name))) /* A raw code address register named NAME. NAME should be an identifier, not a string. */ -#define RC(name) \ - (R(#name, tdep->code_addr_reg_type, SIM (name))) +#define RC(name) (R (#name, tdep->code_addr_reg_type, SIM (name))) /* A pair of raw registers named NAME0 and NAME1, with type TYPE. NAME should be an identifier, not a string. */ -#define RP(name, type) \ - (R(#name "0", (type), SIM (name ## 0)), \ - R(#name "1", (type), SIM (name ## 1)) - 1) +#define RP(name, type) \ + (R (#name "0", (type), SIM (name##0)), \ + R (#name "1", (type), SIM (name##1)) - 1) /* A raw banked general-purpose data register named NAME. NAME should be an identifier, not a string. */ -#define RBD(name) \ - (R("", tdep->int16, SIM (name ## _bank0)), \ - R("", tdep->int16, SIM (name ## _bank1)) - 1) +#define RBD(name) \ + (R ("", tdep->int16, SIM (name##_bank0)), \ + R ("", tdep->int16, SIM (name##_bank1)) - 1) /* A raw banked data address register named NAME. NAME should be an identifier, not a string. */ -#define RBA(name) \ - (R("", tdep->data_addr_reg_type, SIM (name ## _bank0)), \ - R("", tdep->data_addr_reg_type, SIM (name ## _bank1)) - 1) +#define RBA(name) \ + (R ("", tdep->data_addr_reg_type, SIM (name##_bank0)), \ + R ("", tdep->data_addr_reg_type, SIM (name##_bank1)) - 1) /* A cooked register named NAME referring to a raw banked register from the bank selected by the current value of FLG. RAW_PAIR should be a pointer to the first register in the banked pair. NAME must be an identifier, not a string. */ -#define CB(name, raw_pair) \ - (add_reg (arch, #name, (raw_pair)->type, 0, \ - m32c_banked_read, m32c_banked_write, \ - (raw_pair), (raw_pair + 1), FLAGBIT_B)) +#define CB(name, raw_pair) \ + (add_reg (arch, #name, (raw_pair)->type, 0, m32c_banked_read, \ + m32c_banked_write, (raw_pair), (raw_pair + 1), FLAGBIT_B)) /* A pair of registers named NAMEH and NAMEL, of type TYPE, that access the top and bottom halves of the register pointed to by NAME. NAME should be an identifier. */ -#define CHL(name, type) \ - (add_reg (arch, #name "h", (type), 0, \ - m32c_part_read, m32c_part_write, name, NULL, 1), \ - add_reg (arch, #name "l", (type), 0, \ - m32c_part_read, m32c_part_write, name, NULL, 0) - 1) +#define CHL(name, type) \ + (add_reg (arch, #name "h", (type), 0, m32c_part_read, m32c_part_write, \ + name, NULL, 1), \ + add_reg (arch, #name "l", (type), 0, m32c_part_read, m32c_part_write, \ + name, NULL, 0) \ + - 1) /* A register constructed by concatenating the two registers HIGH and LOW, whose name is HIGHLOW and whose type is TYPE. */ -#define CCAT(high, low, type) \ - (add_reg (arch, #high #low, (type), 0, \ - m32c_cat_read, m32c_cat_write, (high), (low), 0)) +#define CCAT(high, low, type) \ + (add_reg (arch, #high #low, (type), 0, m32c_cat_read, m32c_cat_write, \ + (high), (low), 0)) /* Abbreviations for marking register group membership. */ -#define G(reg) (mark_general (reg)) -#define S(reg) (mark_system (reg)) -#define DMA(reg) (mark_dma (reg)) - +#define G(reg) (mark_general (reg)) +#define S(reg) (mark_system (reg)) +#define DMA(reg) (mark_dma (reg)) /* Construct the register set for ARCH. */ static void @@ -835,11 +788,11 @@ make_regs (struct gdbarch *arch) in the pseudoregister. */ struct m32c_reg *raw_sb_pair = RBA (sb); - struct m32c_reg *usp = S (RA (usp)); - struct m32c_reg *isp = S (RA (isp)); - struct m32c_reg *intb = S (RC (intb)); - struct m32c_reg *pc = G (RC (pc)); - struct m32c_reg *flg = G (R16U (flg)); + struct m32c_reg *usp = S (RA (usp)); + struct m32c_reg *isp = S (RA (isp)); + struct m32c_reg *intb = S (RC (intb)); + struct m32c_reg *pc = G (RC (pc)); + struct m32c_reg *flg = G (R16U (flg)); if (mach == bfd_mach_m32c) { @@ -857,39 +810,36 @@ make_regs (struct gdbarch *arch) num_raw_regs = tdep->num_regs; - r0 = G (CB (r0, raw_r0_pair)); - r1 = G (CB (r1, raw_r1_pair)); - r2 = G (CB (r2, raw_r2_pair)); - r3 = G (CB (r3, raw_r3_pair)); - a0 = G (CB (a0, raw_a0_pair)); - a1 = G (CB (a1, raw_a1_pair)); - fb = G (CB (fb, raw_fb_pair)); + r0 = G (CB (r0, raw_r0_pair)); + r1 = G (CB (r1, raw_r1_pair)); + r2 = G (CB (r2, raw_r2_pair)); + r3 = G (CB (r3, raw_r3_pair)); + a0 = G (CB (a0, raw_a0_pair)); + a1 = G (CB (a1, raw_a1_pair)); + fb = G (CB (fb, raw_fb_pair)); /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c. Specify custom read/write functions that do the right thing. */ - sb = G (add_reg (arch, "sb", raw_sb_pair->type, 0, - m32c_sb_read, m32c_sb_write, - raw_sb_pair, raw_sb_pair + 1, 0)); + sb = G (add_reg (arch, "sb", raw_sb_pair->type, 0, m32c_sb_read, + m32c_sb_write, raw_sb_pair, raw_sb_pair + 1, 0)); /* The current sp is either usp or isp, depending on the value of the FLG register's U bit. */ - sp = G (add_reg (arch, "sp", usp->type, 0, - m32c_banked_read, m32c_banked_write, - isp, usp, FLAGBIT_U)); + sp = G (add_reg (arch, "sp", usp->type, 0, m32c_banked_read, + m32c_banked_write, isp, usp, FLAGBIT_U)); - r0hl = CHL (r0, tdep->int8); - r1hl = CHL (r1, tdep->int8); + r0hl = CHL (r0, tdep->int8); + r1hl = CHL (r1, tdep->int8); CHL (r2, tdep->int8); CHL (r3, tdep->int8); CHL (intb, tdep->int16); - r2r0 = CCAT (r2, r0, tdep->int32); - r3r1 = CCAT (r3, r1, tdep->int32); - r3r1r2r0 = CCAT (r3r1, r2r0, tdep->int64); + r2r0 = CCAT (r2, r0, tdep->int32); + r3r1 = CCAT (r3, r1, tdep->int32); + r3r1r2r0 = CCAT (r3r1, r2r0, tdep->int64); - r3r2r1r0 - = add_reg (arch, "r3r2r1r0", tdep->int64, 0, - m32c_r3r2r1r0_read, m32c_r3r2r1r0_write, NULL, NULL, 0); + r3r2r1r0 = add_reg (arch, "r3r2r1r0", tdep->int64, 0, m32c_r3r2r1r0_read, + m32c_r3r2r1r0_write, NULL, NULL, 0); if (mach == bfd_mach_m16c) a1a0 = CCAT (a1, a0, tdep->int32); @@ -898,20 +848,20 @@ make_regs (struct gdbarch *arch) num_cooked_regs = tdep->num_regs - num_raw_regs; - tdep->pc = pc; - tdep->flg = flg; - tdep->r0 = r0; - tdep->r1 = r1; - tdep->r2 = r2; - tdep->r3 = r3; - tdep->r2r0 = r2r0; + tdep->pc = pc; + tdep->flg = flg; + tdep->r0 = r0; + tdep->r1 = r1; + tdep->r2 = r2; + tdep->r3 = r3; + tdep->r2r0 = r2r0; tdep->r3r2r1r0 = r3r2r1r0; tdep->r3r1r2r0 = r3r1r2r0; - tdep->a0 = a0; - tdep->a1 = a1; - tdep->sb = sb; - tdep->fb = fb; - tdep->sp = sp; + tdep->a0 = a0; + tdep->a1 = a1; + tdep->sb = sb; + tdep->fb = fb; + tdep->sp = sp; /* Set up the DWARF register table. */ memset (tdep->dwarf_regs, 0, sizeof (tdep->dwarf_regs)); @@ -919,20 +869,20 @@ make_regs (struct gdbarch *arch) set_dwarf_regnum (r0hl + 0, 0x02); set_dwarf_regnum (r1hl + 1, 0x03); set_dwarf_regnum (r1hl + 0, 0x04); - set_dwarf_regnum (r0, 0x05); - set_dwarf_regnum (r1, 0x06); - set_dwarf_regnum (r2, 0x07); - set_dwarf_regnum (r3, 0x08); - set_dwarf_regnum (a0, 0x09); - set_dwarf_regnum (a1, 0x0a); - set_dwarf_regnum (fb, 0x0b); - set_dwarf_regnum (sp, 0x0c); - set_dwarf_regnum (pc, 0x0d); /* GCC's invention */ - set_dwarf_regnum (sb, 0x13); - set_dwarf_regnum (r2r0, 0x15); - set_dwarf_regnum (r3r1, 0x16); + set_dwarf_regnum (r0, 0x05); + set_dwarf_regnum (r1, 0x06); + set_dwarf_regnum (r2, 0x07); + set_dwarf_regnum (r3, 0x08); + set_dwarf_regnum (a0, 0x09); + set_dwarf_regnum (a1, 0x0a); + set_dwarf_regnum (fb, 0x0b); + set_dwarf_regnum (sp, 0x0c); + set_dwarf_regnum (pc, 0x0d); /* GCC's invention */ + set_dwarf_regnum (sb, 0x13); + set_dwarf_regnum (r2r0, 0x15); + set_dwarf_regnum (r3r1, 0x16); if (a1a0) - set_dwarf_regnum (a1a0, 0x17); + set_dwarf_regnum (a1a0, 0x17); /* Enumerate the save/restore register group. @@ -984,14 +934,11 @@ make_regs (struct gdbarch *arch) reggroup_add (arch, m32c_dma_reggroup); } - - /* Breakpoints. */ -constexpr gdb_byte m32c_break_insn[] = { 0x00 }; /* brk */ +constexpr gdb_byte m32c_break_insn[] = { 0x00 }; /* brk */ typedef BP_MANIPULATION (m32c_break_insn) m32c_breakpoint; - /* Prologue analysis. */ enum m32c_prologue_kind @@ -1049,7 +996,6 @@ struct m32c_prologue LONGEST reg_offset[M32C_MAX_NUM_REGS]; }; - /* The longest I've seen, anyway. */ #define M32C_MAX_INSN_LEN (9) @@ -1069,7 +1015,6 @@ struct m32c_pv_state CORE_ADDR scan_pc, next_addr; }; - /* Push VALUE on STATE's stack, occupying SIZE bytes. Return zero if all went well, or non-zero if simulating the action would trash our state. */ @@ -1085,7 +1030,6 @@ m32c_pv_push (struct m32c_pv_state *state, pv_t value, int size) return 0; } - enum srcdest_kind { srcdest_reg, @@ -1105,7 +1049,6 @@ struct srcdest pv_t *reg, addr; }; - /* Return the SIZE-byte value at LOC in STATE. */ static pv_t m32c_srcdest_fetch (struct m32c_pv_state *state, struct srcdest loc, int size) @@ -1118,7 +1061,6 @@ m32c_srcdest_fetch (struct m32c_pv_state *state, struct srcdest loc, int size) return *loc.reg; } - /* Write VALUE, a SIZE-byte value, to LOC in STATE. Return zero if all went well, or non-zero if simulating the store would trash our state. */ @@ -1140,7 +1082,6 @@ m32c_srcdest_store (struct m32c_pv_state *state, struct srcdest loc, return 0; } - static int m32c_sign_ext (int v, int bits) { @@ -1161,66 +1102,56 @@ m32c_udisp8 (struct m32c_pv_state *st) return m32c_next_byte (st); } - static int m32c_sdisp8 (struct m32c_pv_state *st) { return m32c_sign_ext (m32c_next_byte (st), 8); } - static int m32c_udisp16 (struct m32c_pv_state *st) { - int low = m32c_next_byte (st); + int low = m32c_next_byte (st); int high = m32c_next_byte (st); return low + (high << 8); } - static int m32c_sdisp16 (struct m32c_pv_state *st) { - int low = m32c_next_byte (st); + int low = m32c_next_byte (st); int high = m32c_next_byte (st); return m32c_sign_ext (low + (high << 8), 16); } - static int m32c_udisp24 (struct m32c_pv_state *st) { - int low = m32c_next_byte (st); - int mid = m32c_next_byte (st); + int low = m32c_next_byte (st); + int mid = m32c_next_byte (st); int high = m32c_next_byte (st); return low + (mid << 8) + (high << 16); } - /* Extract the 'source' field from an m32c MOV.size:G-format instruction. */ static int m32c_get_src23 (unsigned char *i) { - return (((i[0] & 0x70) >> 2) - | ((i[1] & 0x30) >> 4)); + return (((i[0] & 0x70) >> 2) | ((i[1] & 0x30) >> 4)); } - /* Extract the 'dest' field from an m32c MOV.size:G-format instruction. */ static int m32c_get_dest23 (unsigned char *i) { - return (((i[0] & 0x0e) << 1) - | ((i[1] & 0xc0) >> 6)); + return (((i[0] & 0x0e) << 1) | ((i[1] & 0xc0) >> 6)); } - static struct srcdest -m32c_decode_srcdest4 (struct m32c_pv_state *st, - int code, int size) +m32c_decode_srcdest4 (struct m32c_pv_state *st, int code, int size) { struct srcdest sd; @@ -1234,26 +1165,58 @@ m32c_decode_srcdest4 (struct m32c_pv_state *st, switch (code) { - case 0x0: sd.reg = &st->r0; break; - case 0x1: sd.reg = (size == 1 ? &st->r0 : &st->r1); break; - case 0x2: sd.reg = (size == 1 ? &st->r1 : &st->r2); break; - case 0x3: sd.reg = (size == 1 ? &st->r1 : &st->r3); break; + case 0x0: + sd.reg = &st->r0; + break; + case 0x1: + sd.reg = (size == 1 ? &st->r0 : &st->r1); + break; + case 0x2: + sd.reg = (size == 1 ? &st->r1 : &st->r2); + break; + case 0x3: + sd.reg = (size == 1 ? &st->r1 : &st->r3); + break; - case 0x4: sd.reg = &st->a0; break; - case 0x5: sd.reg = &st->a1; break; + case 0x4: + sd.reg = &st->a0; + break; + case 0x5: + sd.reg = &st->a1; + break; - case 0x6: sd.addr = st->a0; break; - case 0x7: sd.addr = st->a1; break; + case 0x6: + sd.addr = st->a0; + break; + case 0x7: + sd.addr = st->a1; + break; - case 0x8: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break; - case 0x9: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break; - case 0xa: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break; - case 0xb: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break; + case 0x8: + sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); + break; + case 0x9: + sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); + break; + case 0xa: + sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); + break; + case 0xb: + sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); + break; - case 0xc: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break; - case 0xd: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break; - case 0xe: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break; - case 0xf: sd.addr = pv_constant (m32c_udisp16 (st)); break; + case 0xc: + sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); + break; + case 0xd: + sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); + break; + case 0xe: + sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); + break; + case 0xf: + sd.addr = pv_constant (m32c_udisp16 (st)); + break; default: gdb_assert_not_reached ("unexpected srcdest4"); @@ -1262,7 +1225,6 @@ m32c_decode_srcdest4 (struct m32c_pv_state *st, return sd; } - static struct srcdest m32c_decode_sd23 (struct m32c_pv_state *st, int code, int size, int ind) { @@ -1288,32 +1250,71 @@ m32c_decode_sd23 (struct m32c_pv_state *st, int code, int size, int ind) default: sd.kind = srcdest_mem; break; - } switch (code) { - case 0x12: sd.reg = &st->r0; break; - case 0x13: sd.reg = &st->r1; break; - case 0x10: sd.reg = ((size == 1) ? &st->r0 : &st->r2); break; - case 0x11: sd.reg = ((size == 1) ? &st->r1 : &st->r3); break; - case 0x02: sd.reg = &st->a0; break; - case 0x03: sd.reg = &st->a1; break; - - case 0x00: sd.addr = st->a0; break; - case 0x01: sd.addr = st->a1; break; - case 0x04: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break; - case 0x05: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break; - case 0x06: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break; - case 0x07: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break; - case 0x08: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break; - case 0x09: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break; - case 0x0a: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break; - case 0x0b: sd.addr = pv_add_constant (st->fb, m32c_sdisp16 (st)); break; - case 0x0c: sd.addr = pv_add_constant (st->a0, m32c_udisp24 (st)); break; - case 0x0d: sd.addr = pv_add_constant (st->a1, m32c_udisp24 (st)); break; - case 0x0f: sd.addr = pv_constant (m32c_udisp16 (st)); break; - case 0x0e: sd.addr = pv_constant (m32c_udisp24 (st)); break; + case 0x12: + sd.reg = &st->r0; + break; + case 0x13: + sd.reg = &st->r1; + break; + case 0x10: + sd.reg = ((size == 1) ? &st->r0 : &st->r2); + break; + case 0x11: + sd.reg = ((size == 1) ? &st->r1 : &st->r3); + break; + case 0x02: + sd.reg = &st->a0; + break; + case 0x03: + sd.reg = &st->a1; + break; + + case 0x00: + sd.addr = st->a0; + break; + case 0x01: + sd.addr = st->a1; + break; + case 0x04: + sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); + break; + case 0x05: + sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); + break; + case 0x06: + sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); + break; + case 0x07: + sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); + break; + case 0x08: + sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); + break; + case 0x09: + sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); + break; + case 0x0a: + sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); + break; + case 0x0b: + sd.addr = pv_add_constant (st->fb, m32c_sdisp16 (st)); + break; + case 0x0c: + sd.addr = pv_add_constant (st->a0, m32c_udisp24 (st)); + break; + case 0x0d: + sd.addr = pv_add_constant (st->a1, m32c_udisp24 (st)); + break; + case 0x0f: + sd.addr = pv_constant (m32c_udisp16 (st)); + break; + case 0x0e: + sd.addr = pv_constant (m32c_udisp24 (st)); + break; default: gdb_assert_not_reached ("unexpected sd23"); } @@ -1327,7 +1328,6 @@ m32c_decode_sd23 (struct m32c_pv_state *st, int code, int size, int ind) return sd; } - /* The r16c and r32c machines have instructions with similar semantics, but completely different machine language encodings. So we break out the semantics into their own functions, and leave @@ -1337,7 +1337,6 @@ m32c_decode_sd23 (struct m32c_pv_state *st, int code, int size, int ind) and they all return zero if analysis should continue past this instruction, or non-zero if analysis should stop. */ - /* Simulate an 'enter SIZE' instruction in STATE. */ static int m32c_pv_enter (struct m32c_pv_state *state, int size) @@ -1359,10 +1358,9 @@ m32c_pv_enter (struct m32c_pv_state *state, int size) return 0; } - static int -m32c_pv_pushm_one (struct m32c_pv_state *state, pv_t reg, - int bit, int src, int size) +m32c_pv_pushm_one (struct m32c_pv_state *state, pv_t reg, int bit, int src, + int size) { if (bit & src) { @@ -1373,7 +1371,6 @@ m32c_pv_pushm_one (struct m32c_pv_state *state, pv_t reg, return 0; } - /* Simulate a 'pushm SRC' instruction in STATE. */ static int m32c_pv_pushm (struct m32c_pv_state *state, int src) @@ -1383,15 +1380,15 @@ m32c_pv_pushm (struct m32c_pv_state *state, int src) /* The bits in SRC indicating which registers to save are: r0 r1 r2 r3 a0 a1 sb fb */ - return - ( m32c_pv_pushm_one (state, state->fb, 0x01, src, tdep->push_addr_bytes) - || m32c_pv_pushm_one (state, state->sb, 0x02, src, tdep->push_addr_bytes) - || m32c_pv_pushm_one (state, state->a1, 0x04, src, tdep->push_addr_bytes) - || m32c_pv_pushm_one (state, state->a0, 0x08, src, tdep->push_addr_bytes) - || m32c_pv_pushm_one (state, state->r3, 0x10, src, 2) - || m32c_pv_pushm_one (state, state->r2, 0x20, src, 2) - || m32c_pv_pushm_one (state, state->r1, 0x40, src, 2) - || m32c_pv_pushm_one (state, state->r0, 0x80, src, 2)); + return ( + m32c_pv_pushm_one (state, state->fb, 0x01, src, tdep->push_addr_bytes) + || m32c_pv_pushm_one (state, state->sb, 0x02, src, tdep->push_addr_bytes) + || m32c_pv_pushm_one (state, state->a1, 0x04, src, tdep->push_addr_bytes) + || m32c_pv_pushm_one (state, state->a0, 0x08, src, tdep->push_addr_bytes) + || m32c_pv_pushm_one (state, state->r3, 0x10, src, 2) + || m32c_pv_pushm_one (state, state->r2, 0x20, src, 2) + || m32c_pv_pushm_one (state, state->r1, 0x40, src, 2) + || m32c_pv_pushm_one (state, state->r0, 0x80, src, 2)); } /* Return non-zero if VALUE is the first incoming argument register. */ @@ -1404,8 +1401,8 @@ m32c_is_1st_arg_reg (struct m32c_pv_state *state, pv_t value) return (value.kind == pvk_register && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c - ? (value.reg == tdep->r1->num) - : (value.reg == tdep->r0->num)) + ? (value.reg == tdep->r1->num) + : (value.reg == tdep->r0->num)) && value.k == 0); } @@ -1419,8 +1416,8 @@ m32c_is_arg_reg (struct m32c_pv_state *state, pv_t value) return (value.kind == pvk_register && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c - ? (value.reg == tdep->r1->num || value.reg == tdep->r2->num) - : (value.reg == tdep->r0->num)) + ? (value.reg == tdep->r1->num || value.reg == tdep->r2->num) + : (value.reg == tdep->r0->num)) && value.k == 0); } @@ -1435,17 +1432,14 @@ m32c_is_arg_reg (struct m32c_pv_state *state, pv_t value) relative to the original value of the SP). */ static int -m32c_is_arg_spill (struct m32c_pv_state *st, - struct srcdest loc, - pv_t value) +m32c_is_arg_spill (struct m32c_pv_state *st, struct srcdest loc, pv_t value) { gdbarch *arch = st->arch; m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch); - return (m32c_is_arg_reg (st, value) - && loc.kind == srcdest_mem + return (m32c_is_arg_reg (st, value) && loc.kind == srcdest_mem && pv_is_register (loc.addr, tdep->sp->num) - && ! st->stack->find_reg (st->arch, value.reg, 0)); + && !st->stack->find_reg (st->arch, value.reg, 0)); } /* Return non-zero if a store of VALUE to LOC is probably @@ -1459,8 +1453,7 @@ m32c_is_arg_spill (struct m32c_pv_state *st, - LOC is an address register (a0 or a1). */ static int -m32c_is_struct_return (struct m32c_pv_state *st, - struct srcdest loc, +m32c_is_struct_return (struct m32c_pv_state *st, struct srcdest loc, pv_t value) { gdbarch *arch = st->arch; @@ -1486,19 +1479,17 @@ m32c_pushm_is_reg_save (struct m32c_pv_state *st, int src) /* The bits in SRC indicating which registers to save are: r0 r1 r2 r3 a0 a1 sb fb */ - return - (pv_is_register (st->sp, tdep->sp->num) - && (! (src & 0x01) || pv_is_register_k (st->fb, tdep->fb->num, 0)) - && (! (src & 0x02) || pv_is_register_k (st->sb, tdep->sb->num, 0)) - && (! (src & 0x04) || pv_is_register_k (st->a1, tdep->a1->num, 0)) - && (! (src & 0x08) || pv_is_register_k (st->a0, tdep->a0->num, 0)) - && (! (src & 0x10) || pv_is_register_k (st->r3, tdep->r3->num, 0)) - && (! (src & 0x20) || pv_is_register_k (st->r2, tdep->r2->num, 0)) - && (! (src & 0x40) || pv_is_register_k (st->r1, tdep->r1->num, 0)) - && (! (src & 0x80) || pv_is_register_k (st->r0, tdep->r0->num, 0))); + return (pv_is_register (st->sp, tdep->sp->num) + && (!(src & 0x01) || pv_is_register_k (st->fb, tdep->fb->num, 0)) + && (!(src & 0x02) || pv_is_register_k (st->sb, tdep->sb->num, 0)) + && (!(src & 0x04) || pv_is_register_k (st->a1, tdep->a1->num, 0)) + && (!(src & 0x08) || pv_is_register_k (st->a0, tdep->a0->num, 0)) + && (!(src & 0x10) || pv_is_register_k (st->r3, tdep->r3->num, 0)) + && (!(src & 0x20) || pv_is_register_k (st->r2, tdep->r2->num, 0)) + && (!(src & 0x40) || pv_is_register_k (st->r1, tdep->r1->num, 0)) + && (!(src & 0x80) || pv_is_register_k (st->r0, tdep->r0->num, 0))); } - /* Function for finding saved registers in a 'struct pv_area'; we pass this to pv_area::scan. @@ -1514,8 +1505,7 @@ check_for_saved (void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value) /* Is this the unchanged value of some register being saved on the stack? */ - if (value.kind == pvk_register - && value.k == 0 + if (value.kind == pvk_register && value.k == 0 && pv_is_register (addr, tdep->sp->num)) { /* Some registers require special handling: they're saved as a @@ -1524,8 +1514,7 @@ check_for_saved (void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value) if (value.reg == tdep->pc->num) saved_size = tdep->ret_addr_bytes; - else if (register_type (arch, value.reg) - == tdep->data_addr_reg_type) + else if (register_type (arch, value.reg) == tdep->data_addr_reg_type) saved_size = tdep->push_addr_bytes; if (size == saved_size) @@ -1541,13 +1530,11 @@ check_for_saved (void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value) } } - /* Analyze the function prologue for ARCH at START, going no further than LIMIT, and place a description of what we found in PROLOGUE. */ static void -m32c_analyze_prologue (struct gdbarch *arch, - CORE_ADDR start, CORE_ADDR limit, +m32c_analyze_prologue (struct gdbarch *arch, CORE_ADDR start, CORE_ADDR limit, struct m32c_prologue *prologue) { m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch); @@ -1639,10 +1626,8 @@ m32c_analyze_prologue (struct gdbarch *arch, pv_t src_value; st.next_addr += 2; - src - = m32c_decode_srcdest4 (&st, (st.insn[1] >> 4) & 0xf, size); - dest - = m32c_decode_srcdest4 (&st, st.insn[1] & 0xf, size); + src = m32c_decode_srcdest4 (&st, (st.insn[1] >> 4) & 0xf, size); + dest = m32c_decode_srcdest4 (&st, st.insn[1] & 0xf, size); src_value = m32c_srcdest_fetch (&st, src, size); if (m32c_is_arg_spill (&st, dest, src_value)) @@ -1655,8 +1640,7 @@ m32c_analyze_prologue (struct gdbarch *arch, } /* (1) LDC #IMM16, sp */ - else if (st.insn[0] == 0xeb - && st.insn[1] == 0x50) + else if (st.insn[0] == 0xeb && st.insn[1] == 0x50) { st.next_addr += 2; st.sp = pv_constant (m32c_udisp16 (&st)); @@ -1728,12 +1712,10 @@ m32c_analyze_prologue (struct gdbarch *arch, int size = bw ? 2 : 1; st.next_addr += 2; - src - = m32c_decode_sd23 (&st, m32c_get_src23 (&st.insn[i]), - size, src_indirect); - dest - = m32c_decode_sd23 (&st, m32c_get_dest23 (&st.insn[i]), - size, dest_indirect); + src = m32c_decode_sd23 (&st, m32c_get_src23 (&st.insn[i]), size, + src_indirect); + dest = m32c_decode_sd23 (&st, m32c_get_dest23 (&st.insn[i]), + size, dest_indirect); src_value = m32c_srcdest_fetch (&st, src, size); if (m32c_is_arg_spill (&st, dest, src_value)) @@ -1743,8 +1725,7 @@ m32c_analyze_prologue (struct gdbarch *arch, break; } /* (2) LDC #IMM24, sp */ - else if (st.insn[i] == 0xd5 - && st.insn[i + 1] == 0x29) + else if (st.insn[i] == 0xd5 && st.insn[i + 1] == 0x29) { st.next_addr += 2; st.sp = pv_constant (m32c_udisp24 (&st)); @@ -1772,18 +1753,18 @@ m32c_analyze_prologue (struct gdbarch *arch, teardown sequence, and the prologue should end before that. */ - if (! pv_is_identical (st.fb, pre_insn_fb)) + if (!pv_is_identical (st.fb, pre_insn_fb)) { - if (! pv_is_register_k (st.fb, tdep->fb->num, 0)) + if (!pv_is_register_k (st.fb, tdep->fb->num, 0)) after_last_frame_related_insn = st.next_addr; } - else if (! pv_is_identical (st.sp, pre_insn_sp)) + else if (!pv_is_identical (st.sp, pre_insn_sp)) { /* The comparison of the constants looks odd, there, because .k is unsigned. All it really means is that the SP is lower than it was before the instruction. */ - if ( pv_is_register (pre_insn_sp, tdep->sp->num) - && pv_is_register (st.sp, tdep->sp->num) + if (pv_is_register (pre_insn_sp, tdep->sp->num) + && pv_is_register (st.sp, tdep->sp->num) && ((pre_insn_sp.k - st.sp.k) < (st.sp.k - pre_insn_sp.k))) after_last_frame_related_insn = st.next_addr; } @@ -1823,7 +1804,6 @@ m32c_analyze_prologue (struct gdbarch *arch, prologue->prologue_end = after_last_frame_related_insn; } - static CORE_ADDR m32c_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR ip) { @@ -1832,7 +1812,7 @@ m32c_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR ip) struct m32c_prologue p; /* Try to find the extent of the function that contains IP. */ - if (! find_pc_partial_function (ip, &name, &func_addr, &func_end)) + if (!find_pc_partial_function (ip, &name, &func_addr, &func_end)) return ip; /* Find end by prologue analysis. */ @@ -1846,37 +1826,33 @@ m32c_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR ip) return p.prologue_end; } - - /* Stack unwinding. */ static struct m32c_prologue * m32c_analyze_frame_prologue (frame_info_ptr this_frame, void **this_prologue_cache) { - if (! *this_prologue_cache) + if (!*this_prologue_cache) { CORE_ADDR func_start = get_frame_func (this_frame); CORE_ADDR stop_addr = get_frame_pc (this_frame); /* If we couldn't find any function containing the PC, then just initialize the prologue cache, but don't do anything. */ - if (! func_start) + if (!func_start) stop_addr = func_start; *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct m32c_prologue); - m32c_analyze_prologue (get_frame_arch (this_frame), - func_start, stop_addr, + m32c_analyze_prologue (get_frame_arch (this_frame), func_start, + stop_addr, (struct m32c_prologue *) *this_prologue_cache); } return (struct m32c_prologue *) *this_prologue_cache; } - static CORE_ADDR -m32c_frame_base (frame_info_ptr this_frame, - void **this_prologue_cache) +m32c_frame_base (frame_info_ptr this_frame, void **this_prologue_cache) { struct m32c_prologue *p = m32c_analyze_frame_prologue (this_frame, this_prologue_cache); @@ -1893,15 +1869,13 @@ m32c_frame_base (frame_info_ptr this_frame, { case prologue_with_frame_ptr: { - CORE_ADDR fb - = get_frame_register_unsigned (this_frame, tdep->fb->num); + CORE_ADDR fb = get_frame_register_unsigned (this_frame, tdep->fb->num); return fb - p->frame_ptr_offset; } case prologue_sans_frame_ptr: { - CORE_ADDR sp - = get_frame_register_unsigned (this_frame, tdep->sp->num); + CORE_ADDR sp = get_frame_register_unsigned (this_frame, tdep->sp->num); return sp - p->frame_size; } @@ -1913,10 +1887,8 @@ m32c_frame_base (frame_info_ptr this_frame, } } - static void -m32c_this_id (frame_info_ptr this_frame, - void **this_prologue_cache, +m32c_this_id (frame_info_ptr this_frame, void **this_prologue_cache, struct frame_id *this_id) { CORE_ADDR base = m32c_frame_base (this_frame, this_prologue_cache); @@ -1926,10 +1898,9 @@ m32c_this_id (frame_info_ptr this_frame, /* Otherwise, leave it unset, and that will terminate the backtrace. */ } - static struct value * -m32c_prev_register (frame_info_ptr this_frame, - void **this_prologue_cache, int regnum) +m32c_prev_register (frame_info_ptr this_frame, void **this_prologue_cache, + int regnum) { gdbarch *arch = get_frame_arch (this_frame); m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (arch); @@ -1951,18 +1922,12 @@ m32c_prev_register (frame_info_ptr this_frame, return frame_unwind_got_register (this_frame, regnum, regnum); } - static const struct frame_unwind m32c_unwind = { - "m32c prologue", - NORMAL_FRAME, - default_frame_unwind_stop_reason, - m32c_this_id, - m32c_prev_register, - NULL, + "m32c prologue", NORMAL_FRAME, default_frame_unwind_stop_reason, + m32c_this_id, m32c_prev_register, NULL, default_frame_sniffer }; - /* Inferior calls. */ /* The calling conventions, according to GCC: @@ -1989,7 +1954,6 @@ static const struct frame_unwind m32c_unwind = { higher-addressed byte is the padding), stack "alignment" is 16 bits. */ - /* Return true if TYPE is a type that can be passed in registers. (We ignore the size, and pay attention only to the type code; acceptable sizes depends on which register is being considered to @@ -1999,15 +1963,11 @@ m32c_reg_arg_type (struct type *type) { enum type_code code = type->code (); - return (code == TYPE_CODE_INT - || code == TYPE_CODE_ENUM - || code == TYPE_CODE_PTR - || TYPE_IS_REFERENCE (type) - || code == TYPE_CODE_BOOL - || code == TYPE_CODE_CHAR); + return (code == TYPE_CODE_INT || code == TYPE_CODE_ENUM + || code == TYPE_CODE_PTR || TYPE_IS_REFERENCE (type) + || code == TYPE_CODE_BOOL || code == TYPE_CODE_CHAR); } - static CORE_ADDR m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, @@ -2035,8 +1995,8 @@ m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function, if (func_type->code () == TYPE_CODE_PTR) func_type = func_type->target_type (); - gdb_assert (func_type->code () == TYPE_CODE_FUNC || - func_type->code () == TYPE_CODE_METHOD); + gdb_assert (func_type->code () == TYPE_CODE_FUNC + || func_type->code () == TYPE_CODE_METHOD); #if 0 /* The ABI description in gcc/config/m32c/m32c.abi says that @@ -2044,7 +2004,7 @@ m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function, separately, but the code in GCC doesn't actually do so. */ if (TYPE_PROTOTYPED (func_type)) #endif - num_prototyped_args = func_type->num_fields (); + num_prototyped_args = func_type->num_fields (); } /* First, if the function returns an aggregate by value, push a @@ -2066,27 +2026,22 @@ m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function, ULONGEST arg_size = arg_type->length (); /* Can it go in r1 or r1l (for m16c) or r0 or r0l (for m32c)? */ - if (i == 0 - && arg_size <= 2 - && i < num_prototyped_args + if (i == 0 && arg_size <= 2 && i < num_prototyped_args && m32c_reg_arg_type (arg_type)) { /* Extract and re-store as an integer as a terse way to make sure it ends up in the least significant end of r1. (GDB should avoid assuming endianness, even on uni-endian processors.) */ - ULONGEST u = extract_unsigned_integer (arg_bits, arg_size, - byte_order); + ULONGEST u + = extract_unsigned_integer (arg_bits, arg_size, byte_order); struct m32c_reg *reg = (mach == bfd_mach_m16c) ? tdep->r1 : tdep->r0; regcache_cooked_write_unsigned (regcache, reg->num, u); } /* Can it go in r2? */ - else if (mach == bfd_mach_m16c - && i == 1 - && arg_size == 2 - && i < num_prototyped_args - && m32c_reg_arg_type (arg_type)) + else if (mach == bfd_mach_m16c && i == 1 && arg_size == 2 + && i < num_prototyped_args && m32c_reg_arg_type (arg_type)) regcache->cooked_write (tdep->r2->num, arg_bits); /* Everything else goes on the stack. */ @@ -2133,8 +2088,6 @@ m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function, return cfa; } - - /* Return values. */ /* Return value conventions, according to GCC: @@ -2166,17 +2119,13 @@ m32c_return_by_passed_buf (struct type *type) { enum type_code code = type->code (); - return (code == TYPE_CODE_STRUCT - || code == TYPE_CODE_UNION); + return (code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION); } static enum return_value_convention -m32c_return_value (struct gdbarch *gdbarch, - struct value *function, - struct type *valtype, - struct regcache *regcache, - gdb_byte *readbuf, - const gdb_byte *writebuf) +m32c_return_value (struct gdbarch *gdbarch, struct value *function, + struct type *valtype, struct regcache *regcache, + gdb_byte *readbuf, const gdb_byte *writebuf) { m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (gdbarch); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); @@ -2212,10 +2161,10 @@ m32c_return_value (struct gdbarch *gdbarch, struct bound_minimal_symbol mem0 = lookup_minimal_symbol ("mem0", NULL, NULL); - if (! mem0.minsym) - error (_("The return value is stored in memory at 'mem0', " - "but GDB cannot find\n" - "its address.")); + if (!mem0.minsym) + error (_ ("The return value is stored in memory at 'mem0', " + "but GDB cannot find\n" + "its address.")); read_memory (mem0.value_address (), readbuf, valtype_len); } } @@ -2232,8 +2181,8 @@ m32c_return_value (struct gdbarch *gdbarch, /* Anything that fits in r0 is returned there. */ if (valtype_len <= tdep->r0->type->length ()) { - ULONGEST u = extract_unsigned_integer (writebuf, valtype_len, - byte_order); + ULONGEST u + = extract_unsigned_integer (writebuf, valtype_len, byte_order); regcache_cooked_write_unsigned (regcache, tdep->r0->num, u); } else @@ -2244,10 +2193,10 @@ m32c_return_value (struct gdbarch *gdbarch, struct bound_minimal_symbol mem0 = lookup_minimal_symbol ("mem0", NULL, NULL); - if (! mem0.minsym) - error (_("The return value is stored in memory at 'mem0', " - "but GDB cannot find\n" - " its address.")); + if (!mem0.minsym) + error (_ ("The return value is stored in memory at 'mem0', " + "but GDB cannot find\n" + " its address.")); write_memory (mem0.value_address (), writebuf, valtype_len); } } @@ -2255,8 +2204,6 @@ m32c_return_value (struct gdbarch *gdbarch, return conv; } - - /* Trampolines. */ /* The m16c and m32c use a trampoline function for indirect function @@ -2324,8 +2271,7 @@ m32c_skip_trampoline_code (frame_info_ptr frame, CORE_ADDR stop_pc) if (find_pc_partial_function (stop_pc, &name, &start, &end)) { /* Are we stopped at the beginning of the trampoline function? */ - if (strcmp (name, "m32c_jsri16") == 0 - && stop_pc == start) + if (strcmp (name, "m32c_jsri16") == 0 && stop_pc == start) { /* Get the stack pointer. The return address is at the top, and the target function's address is just below that. We @@ -2333,8 +2279,8 @@ m32c_skip_trampoline_code (frame_info_ptr frame, CORE_ADDR stop_pc) m32c_jsri*16*. */ CORE_ADDR sp = get_frame_sp (get_current_frame ()); CORE_ADDR target - = read_memory_unsigned_integer (sp + tdep->ret_addr_bytes, - 2, byte_order); + = read_memory_unsigned_integer (sp + tdep->ret_addr_bytes, 2, + byte_order); /* What we have now is the address of a jump instruction. What we need is the destination of that jump. @@ -2348,7 +2294,6 @@ m32c_skip_trampoline_code (frame_info_ptr frame, CORE_ADDR stop_pc) return 0; } - /* Address/pointer conversions. */ /* On the m16c, there is a 24-bit address space, but only a very few @@ -2405,8 +2350,8 @@ m32c_skip_trampoline_code (frame_info_ptr frame, CORE_ADDR stop_pc) programmer! :) */ static void -m32c_m16c_address_to_pointer (struct gdbarch *gdbarch, - struct type *type, gdb_byte *buf, CORE_ADDR addr) +m32c_m16c_address_to_pointer (struct gdbarch *gdbarch, struct type *type, + gdb_byte *buf, CORE_ADDR addr) { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); enum type_code target_code; @@ -2424,10 +2369,11 @@ m32c_m16c_address_to_pointer (struct gdbarch *gdbarch, struct bound_minimal_symbol func_msym = lookup_minimal_symbol_by_pc (addr); - if (! func_msym.minsym) - error (_("Cannot convert code address %s to function pointer:\n" - "couldn't find a symbol at that address, to find trampoline."), - paddress (gdbarch, addr)); + if (!func_msym.minsym) + error ( + _ ("Cannot convert code address %s to function pointer:\n" + "couldn't find a symbol at that address, to find trampoline."), + paddress (gdbarch, addr)); func_name = func_msym.minsym->linkage_name (); tramp_name = (char *) xmalloc (strlen (func_name) + 5); @@ -2441,7 +2387,7 @@ m32c_m16c_address_to_pointer (struct gdbarch *gdbarch, the name any more. */ xfree (tramp_name); - if (! tramp_msym.minsym) + if (!tramp_msym.minsym) { CORE_ADDR ptrval; @@ -2459,16 +2405,15 @@ m32c_m16c_address_to_pointer (struct gdbarch *gdbarch, determination about whether the result is useful or not. */ ptrval = addr & 0xffff; - warning (_("Cannot convert code address %s to function pointer:\n" - "couldn't find trampoline named '%s.plt'.\n" - "Returning pointer value %s instead; this may produce\n" - "a useful result if converted back into an address by GDB,\n" - "but will most likely not be useful otherwise."), - paddress (gdbarch, addr), func_name, - paddress (gdbarch, ptrval)); + warning ( + _ ("Cannot convert code address %s to function pointer:\n" + "couldn't find trampoline named '%s.plt'.\n" + "Returning pointer value %s instead; this may produce\n" + "a useful result if converted back into an address by GDB,\n" + "but will most likely not be useful otherwise."), + paddress (gdbarch, addr), func_name, paddress (gdbarch, ptrval)); addr = ptrval; - } else { @@ -2480,10 +2425,9 @@ m32c_m16c_address_to_pointer (struct gdbarch *gdbarch, store_unsigned_integer (buf, type->length (), byte_order, addr); } - static CORE_ADDR -m32c_m16c_pointer_to_address (struct gdbarch *gdbarch, - struct type *type, const gdb_byte *buf) +m32c_m16c_pointer_to_address (struct gdbarch *gdbarch, struct type *type, + const gdb_byte *buf) { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); CORE_ADDR ptr; @@ -2506,8 +2450,7 @@ m32c_m16c_pointer_to_address (struct gdbarch *gdbarch, const char *ptr_msym_name = ptr_msym.minsym->linkage_name (); int len = strlen (ptr_msym_name); - if (len > 4 - && strcmp (ptr_msym_name + len - 4, ".plt") == 0) + if (len > 4 && strcmp (ptr_msym_name + len - 4, ".plt") == 0) { struct bound_minimal_symbol func_msym; /* We have a .plt symbol; try to find the symbol for the @@ -2519,8 +2462,7 @@ m32c_m16c_pointer_to_address (struct gdbarch *gdbarch, char *func_name = (char *) xmalloc (len - 4 + 1); memcpy (func_name, ptr_msym_name, len - 4); func_name[len - 4] = '\0'; - func_msym - = lookup_minimal_symbol (func_name, NULL, NULL); + func_msym = lookup_minimal_symbol (func_name, NULL, NULL); /* If we do have such a symbol, return its value as the function's true address. */ @@ -2535,7 +2477,7 @@ m32c_m16c_pointer_to_address (struct gdbarch *gdbarch, for (aspace = 1; aspace <= 15; aspace++) { ptr_msym = lookup_minimal_symbol_by_pc ((aspace << 16) | ptr); - + if (ptr_msym.minsym) ptr |= aspace << 16; } @@ -2547,8 +2489,7 @@ m32c_m16c_pointer_to_address (struct gdbarch *gdbarch, static void m32c_virtual_frame_pointer (struct gdbarch *gdbarch, CORE_ADDR pc, - int *frame_regnum, - LONGEST *frame_offset) + int *frame_regnum, LONGEST *frame_offset) { const char *name; CORE_ADDR func_addr, func_end; @@ -2556,9 +2497,9 @@ m32c_virtual_frame_pointer (struct gdbarch *gdbarch, CORE_ADDR pc, struct regcache *regcache = get_current_regcache (); m32c_gdbarch_tdep *tdep = gdbarch_tdep<m32c_gdbarch_tdep> (gdbarch); - + if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) - internal_error (_("No virtual frame pointer available")); + internal_error (_ ("No virtual frame pointer available")); m32c_analyze_prologue (gdbarch, func_addr, pc, &p); switch (p.kind) @@ -2578,10 +2519,9 @@ m32c_virtual_frame_pointer (struct gdbarch *gdbarch, CORE_ADDR pc, } /* Sanity check */ if (*frame_regnum > gdbarch_num_regs (gdbarch)) - internal_error (_("No virtual frame pointer available")); + internal_error (_ ("No virtual frame pointer available")); } - /* Initialization. */ static struct gdbarch * @@ -2591,8 +2531,7 @@ m32c_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* Find a candidate among the list of architectures we've created already. */ - for (arches = gdbarch_list_lookup_by_info (arches, &info); - arches != NULL; + for (arches = gdbarch_list_lookup_by_info (arches, &info); arches != NULL; arches = gdbarch_list_lookup_by_info (arches->next, &info)) return arches->gdbarch; @@ -2652,6 +2591,7 @@ m32c_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) } void _initialize_m32c_tdep (); + void _initialize_m32c_tdep () { |