diff options
Diffstat (limited to 'gdb/features/riscv')
| -rw-r--r-- | gdb/features/riscv/rv32e-xregs.c | 30 | ||||
| -rw-r--r-- | gdb/features/riscv/rv32e-xregs.xml | 31 |
2 files changed, 61 insertions, 0 deletions
diff --git a/gdb/features/riscv/rv32e-xregs.c b/gdb/features/riscv/rv32e-xregs.c new file mode 100644 index 0000000..cda3319 --- /dev/null +++ b/gdb/features/riscv/rv32e-xregs.c @@ -0,0 +1,30 @@ +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: + Original: rv32e-xregs.xml */ + +#include "gdbsupport/tdesc.h" + +static int +create_feature_riscv_rv32e_xregs (struct target_desc *result, long regnum) +{ + struct tdesc_feature *feature; + + feature = tdesc_create_feature (result, "org.gnu.gdb.riscv.cpu"); + tdesc_create_reg (feature, "zero", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ra", regnum++, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "sp", regnum++, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "gp", regnum++, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "tp", regnum++, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "t0", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "t1", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "t2", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "fp", regnum++, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "s1", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "a0", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "a1", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "a2", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "a3", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "a4", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "a5", regnum++, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", regnum++, 1, NULL, 32, "code_ptr"); + return regnum; +} diff --git a/gdb/features/riscv/rv32e-xregs.xml b/gdb/features/riscv/rv32e-xregs.xml new file mode 100644 index 0000000..8d313e8 --- /dev/null +++ b/gdb/features/riscv/rv32e-xregs.xml @@ -0,0 +1,31 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2018-2020 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- Register numbers are hard-coded in order to maintain backward + compatibility with older versions of tools that didn't use xml + register descriptions. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.riscv.cpu"> + <reg name="zero" bitsize="32" type="int" regnum="0"/> + <reg name="ra" bitsize="32" type="code_ptr"/> + <reg name="sp" bitsize="32" type="data_ptr"/> + <reg name="gp" bitsize="32" type="data_ptr"/> + <reg name="tp" bitsize="32" type="data_ptr"/> + <reg name="t0" bitsize="32" type="int"/> + <reg name="t1" bitsize="32" type="int"/> + <reg name="t2" bitsize="32" type="int"/> + <reg name="fp" bitsize="32" type="data_ptr"/> + <reg name="s1" bitsize="32" type="int"/> + <reg name="a0" bitsize="32" type="int"/> + <reg name="a1" bitsize="32" type="int"/> + <reg name="a2" bitsize="32" type="int"/> + <reg name="a3" bitsize="32" type="int"/> + <reg name="a4" bitsize="32" type="int"/> + <reg name="a5" bitsize="32" type="int"/> + <reg name="pc" bitsize="32" type="code_ptr"/> +</feature> |