diff options
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-v850.c | 3 | ||||
| -rw-r--r-- | gas/testsuite/ChangeLog | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/v850/basic.exp | 12 | ||||
| -rw-r--r-- | gas/testsuite/gas/v850/split-lo16.d | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/v850/v850e1.d | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/v850/v850e1.s | 1 |
7 files changed, 27 insertions, 11 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index a7758bf..d632dca 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2013-01-15 Nick Clifton <nickc@redhat.com> + + * config/tc-v850.c (md_assemble): Allow signed values for + V850E_IMMEDIATE. + 2013-01-11 Sean Keys <skeys@ipdatasys.com> * config/tc-xgate.c (md_begin): Fix mistake made when going from diff --git a/gas/config/tc-v850.c b/gas/config/tc-v850.c index 7053e93..ad1fb30 100644 --- a/gas/config/tc-v850.c +++ b/gas/config/tc-v850.c @@ -2350,7 +2350,8 @@ md_assemble (char *str) } if (operand->flags & V850E_IMMEDIATE16) { - if (ex.X_add_number & 0xffff0000) + if ((ex.X_add_number & 0xffff0000) + && ((ex.X_add_number & 0xffff0000) != 0xffff0000)) { errmsg = _("constant too big to fit into instruction"); goto error; diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index fafd84f..47d6d15 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2013-01-15 Nick Clifton <nickc@redhat.com> + + * gas/v850/basic.exp: Allow for variations in reloc names. + * gas/v850/split-lo16.d: Likewise. + + * gas/v850/v850e1.s: Add more tests of the PREPARE insn. + * gas/v850/v850e1.d: Update expected disassembly. + 2013-01-14 Alan Modra <amodra@gmail.com> * gas/v850/basic.exp (reloc part 1): Pass -mgcc-abi to gas. diff --git a/gas/testsuite/gas/v850/basic.exp b/gas/testsuite/gas/v850/basic.exp index aaf377a..cf6aaa3 100644 --- a/gas/testsuite/gas/v850/basic.exp +++ b/gas/testsuite/gas/v850/basic.exp @@ -386,17 +386,17 @@ proc do_simple_reloc_tests {} { while 1 { expect { - -re "^00000002\[^\n\]*R_V850_LO16\[^\n\]*\n" + -re "^00000002\[^\n\]*R_V8\[A-Z0-9_\]+\[^\n\]*\n" { set x [expr $x+1] } - -re "^00000006\[^\n\]*R_V850_HI16_S\[^\n\]*\n" + -re "^00000006\[^\n\]*R_V8\[A-Z0-9_\]+\[^\n\]*\n" { set x [expr $x+1] } - -re "^0000000a\[^\n\]*R_V850_HI16\[^\n\]*\n" + -re "^0000000a\[^\n\]*R_V8\[A-Z0-9_\]+\[^\n\]*\n" { set x [expr $x+1] } - -re "^0000000e\[^\n\]*R_V850_ZDA_16_16_OFFSET\[^\n\]*\n" + -re "^0000000e\[^\n\]*R_V8\[A-Z0-9_\]+\[^\n\]*\n" { set x [expr $x+1] } - -re "^00000012\[^\n\]*R_V850_TDA_16_16_OFFSET\[^\n\]*\n" + -re "^00000012\[^\n\]*R_V8\[A-Z0-9_\]+\[^\n\]*\n" { set x [expr $x+1] } - -re "^00000016\[^\n\]*R_V850_SDA_16_16_OFFSET\[^\n\]*\n" + -re "^00000016\[^\n\]*R_V8\[A-Z0-9_\]+\[^\n\]*\n" { set x [expr $x+1] } -re "\[^\n\]*\n" { } timeout { perror "timeout\n"; break } diff --git a/gas/testsuite/gas/v850/split-lo16.d b/gas/testsuite/gas/v850/split-lo16.d index f742084..9580c80 100644 --- a/gas/testsuite/gas/v850/split-lo16.d +++ b/gas/testsuite/gas/v850/split-lo16.d @@ -4,13 +4,13 @@ #... 00000000 <.*>: 0: 40 0e 00 00 movhi 0, r0, r1 - 2: R_V850_HI16_S foo + 2: R_V8.* foo 4: 01 16 00 00 addi 0, r1, r2 - 6: R_V850_LO16 foo + 6: R_V8.* foo 8: 01 17 00 00 ld\.b 0\[r1\], r2 - a: R_V850_LO16 foo + a: R_V8.* foo c: 81 17 01 00 ld\.bu 0\[r1\], r2 - c: R_V850_LO16_SPLIT_OFFSET foo + c: R_V8.* foo 10: a1 17 45 23 ld\.bu 9029\[r1\], r2 14: 81 17 57 34 ld\.bu 13398\[r1\], r2 18: 20 57 01 00 ld.w 0\[r0\], r10 diff --git a/gas/testsuite/gas/v850/v850e1.d b/gas/testsuite/gas/v850/v850e1.d index 7560d88..6773c5c 100644 --- a/gas/testsuite/gas/v850/v850e1.d +++ b/gas/testsuite/gas/v850/v850e1.d @@ -43,3 +43,4 @@ Disassembly of section .text: 0x0+7a 83 00 [ ]*zxb sp 0x0+7c c4 00 [ ]*zxh gp 0x0+7e 63 ff 9d 00[ ]*st.w lp, 156\[sp\] +0x0+82 80 07 0b e8 f6 ff[ ]*prepare {r20, r24 - r26}, 0, -10 diff --git a/gas/testsuite/gas/v850/v850e1.s b/gas/testsuite/gas/v850/v850e1.s index 2e6d640..b60be43 100644 --- a/gas/testsuite/gas/v850/v850e1.s +++ b/gas/testsuite/gas/v850/v850e1.s @@ -37,3 +37,4 @@ zxb r3 zxh r4 st.w lp, 156[sp] + prepare {r20,r24,r25,r26},0,-10 |