diff options
Diffstat (limited to 'gas')
29 files changed, 6077 insertions, 1143 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 092f385..7f7da64 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,16 @@ +2000-06-18 Stephane Carrez <stcarrez@worldnet.fr> + + * doc/Makefile.am (CPU_DOCS): Added 68hc11 file. + * doc/c-m68hc11.texi: Document 68HC11 and 68HC12 port. + * doc/as.texinfo: Likewise. + + * configure, Makefile.in: Regenerate. + * configure.in (emulations): Recognize m6811 and m6812. + * Makefile.am (CPU_TYPES, TARGET_CPU_CFILES, TARGET_CPU_HFILES): + Added files for 68hc11 and 68hc12 assembler. + * config/tc-m68hc11.c: Assembler for 68hc11 and 68hc12. + * config/tc-m68hc11.h: Header definition for that assembler. + 2000-06-18 Nick Clifton <nickc@redhat.com> * symbols.c (resolve_symbol_value): Use bfd_octets_per_byte diff --git a/gas/Makefile.am b/gas/Makefile.am index 435a4da..f195102 100644 --- a/gas/Makefile.am +++ b/gas/Makefile.am @@ -54,6 +54,7 @@ CPU_TYPES = \ i860 \ i960 \ m32r \ + m68hc11 \ m68k \ m88k \ mcore \ @@ -225,6 +226,7 @@ TARGET_CPU_CFILES = \ config/tc-i860.c \ config/tc-i960.c \ config/tc-m32r.c \ + config/tc-m68hc11.c \ config/tc-m68k.c \ config/tc-m88k.c \ config/tc-mcore.c \ @@ -262,6 +264,7 @@ TARGET_CPU_HFILES = \ config/tc-i860.h \ config/tc-i960.h \ config/tc-m32r.h \ + config/tc-m68hc11.h \ config/tc-m68k.h \ config/tc-m88k.h \ config/tc-mcore.h \ @@ -1087,6 +1090,11 @@ DEPTC_m32r_elf = $(INCDIR)/bin-bugs.h $(INCDIR)/progress.h \ $(INCDIR)/symcat.h $(srcdir)/../opcodes/m32r-desc.h \ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/m32r-opc.h \ cgen.h +DEPTC_m68hc11_elf = $(INCDIR)/bin-bugs.h $(INCDIR)/progress.h \ + $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ + $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ + $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h $(INCDIR)/obstack.h \ + subsegs.h $(INCDIR)/opcode/m68hc11.h DEPTC_m68k_aout = $(INCDIR)/bin-bugs.h $(INCDIR)/progress.h \ $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-m68k.h \ $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h emul.h $(INCDIR)/obstack.h \ @@ -1814,6 +1822,9 @@ DEP_m32r_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m32r.h \ DEP_m32r_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h +DEP_m68hc11_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ + $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ + $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h DEP_m68k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-m68k.h \ $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h DEP_m68k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m68k.h \ diff --git a/gas/Makefile.in b/gas/Makefile.in index ed54b62..587a390 100644 --- a/gas/Makefile.in +++ b/gas/Makefile.in @@ -158,6 +158,7 @@ CPU_TYPES = \ i860 \ i960 \ m32r \ + m68hc11 \ m68k \ m88k \ mcore \ @@ -335,6 +336,7 @@ TARGET_CPU_CFILES = \ config/tc-i860.c \ config/tc-i960.c \ config/tc-m32r.c \ + config/tc-m68hc11.c \ config/tc-m68k.c \ config/tc-m88k.c \ config/tc-mcore.c \ @@ -373,6 +375,7 @@ TARGET_CPU_HFILES = \ config/tc-i860.h \ config/tc-i960.h \ config/tc-m32r.h \ + config/tc-m68hc11.h \ config/tc-m68k.h \ config/tc-m88k.h \ config/tc-mcore.h \ @@ -837,6 +840,12 @@ DEPTC_m32r_elf = $(INCDIR)/bin-bugs.h $(INCDIR)/progress.h \ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/m32r-opc.h \ cgen.h +DEPTC_m68hc11_elf = $(INCDIR)/bin-bugs.h $(INCDIR)/progress.h \ + $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ + $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ + $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h $(INCDIR)/obstack.h \ + subsegs.h $(INCDIR)/opcode/m68hc11.h + DEPTC_m68k_aout = $(INCDIR)/bin-bugs.h $(INCDIR)/progress.h \ $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-m68k.h \ $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h emul.h $(INCDIR)/obstack.h \ @@ -1742,6 +1751,10 @@ DEP_m32r_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h +DEP_m68hc11_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ + $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ + $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h + DEP_m68k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-m68k.h \ $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h @@ -1958,7 +1971,7 @@ configure configure.in gdbinit.in itbl-lex.c itbl-parse.c DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST) -TAR = tar +TAR = gtar GZIP_ENV = --best SOURCES = $(itbl_test_SOURCES) $(as_new_SOURCES) $(EXTRA_as_new_SOURCES) $(gasp_new_SOURCES) OBJECTS = $(itbl_test_OBJECTS) $(as_new_OBJECTS) $(gasp_new_OBJECTS) diff --git a/gas/config/obj-elf.c b/gas/config/obj-elf.c index 3af8c9a..1c481a6 100644 --- a/gas/config/obj-elf.c +++ b/gas/config/obj-elf.c @@ -833,7 +833,7 @@ obj_elf_section (push) char mri_type; #ifdef md_flush_pending_output - md_flush_pending_output (); + md_flush_pending_output (); #endif previous_section = now_seg; diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 395b50f..37fe3d8 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -145,7 +145,7 @@ const char extra_symbol_chars[] = "*%-("; /* This array holds the chars that always start a comment. If the pre-processor is disabled, these aren't very useful */ -#if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && !defined (TE_LINUX) && !defined(TE_FreeBSD)) +#if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX) && !defined(TE_FreeBSD)) /* Putting '/' here makes it impossible to use the divide operator. However, we need it for compatibility with SVR4 systems. */ const char comment_chars[] = "#/"; @@ -163,7 +163,7 @@ const char comment_chars[] = "#"; #NO_APP at the beginning of its output. */ /* Also note that comments started like this one will always work if '/' isn't otherwise defined. */ -#if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && !defined (TE_LINUX) && !defined(TE_FreeBSD)) +#if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX) && !defined(TE_FreeBSD)) const char line_comment_chars[] = ""; #else const char line_comment_chars[] = "/"; @@ -1021,7 +1021,7 @@ reloc (size, pcrel, other) */ int tc_i386_fix_adjustable (fixP) - fixS *fixP; + fixS * fixP; { #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) || defined (TE_PE) /* Prevent all adjustments to global symbols, or else dynamic diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c index 7745338..bce1209 100644 --- a/gas/config/tc-m32r.c +++ b/gas/config/tc-m32r.c @@ -1882,6 +1882,9 @@ m32r_elf_section_change_hook () (void) m32r_fill_insn (0); } +/* Return true if can adjust the reloc to be relative to its section + (such as .data) instead of relative to some symbol. */ + boolean m32r_fix_adjustable (fixP) fixS *fixP; @@ -1901,13 +1904,13 @@ m32r_fix_adjustable (fixP) if (fixP->fx_addsy == NULL) return 1; - + /* Prevent all adjustments to global symbols. */ if (S_IS_EXTERN (fixP->fx_addsy)) return 0; if (S_IS_WEAK (fixP->fx_addsy)) return 0; - + /* We need the symbol name for the VTABLE entries */ if (reloc_type == BFD_RELOC_VTABLE_INHERIT || reloc_type == BFD_RELOC_VTABLE_ENTRY) diff --git a/gas/config/tc-m68hc11.c b/gas/config/tc-m68hc11.c new file mode 100644 index 0000000..e773420 --- /dev/null +++ b/gas/config/tc-m68hc11.c @@ -0,0 +1,2831 @@ +/* tc-m68hc11.c -- Assembler code for the Motorola 68HC11 & 68HC12. + Copyright (C) 1999, 2000 Free Software Foundation. + Written by Stephane Carrez (stcarrez@worldnet.fr) + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GAS; see the file COPYING. If not, write to + the Free Software Foundation, 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#include <stdio.h> +#include <ctype.h> +#include "as.h" +#include "subsegs.h" +#include "opcode/m68hc11.h" +#include "dwarf2dbg.h" + +struct dwarf2_line_info debug_line; + +const char comment_chars[] = ";!"; +const char line_comment_chars[] = "#*"; +const char line_separator_chars[] = ""; + +const char EXP_CHARS[] = "eE"; +const char FLT_CHARS[] = "dD"; + +#define STATE_CONDITIONAL_BRANCH (1) +#define STATE_PC_RELATIVE (2) +#define STATE_INDEXED_OFFSET (3) +#define STATE_XBCC_BRANCH (4) +#define STATE_CONDITIONAL_BRANCH_6812 (5) + +#define STATE_BYTE (0) +#define STATE_BITS5 (0) +#define STATE_WORD (1) +#define STATE_BITS9 (1) +#define STATE_LONG (2) +#define STATE_BITS16 (2) +#define STATE_UNDF (3) /* Symbol undefined in pass1 */ + +/* This macro has no side-effects. */ +#define ENCODE_RELAX(what,length) (((what) << 2) + (length)) + +#define IS_OPCODE(C1,C2) (((C1) & 0x0FF) == ((C2) & 0x0FF)) + +/* This table describes how you change sizes for the various types of variable + size expressions. This version only supports two kinds. */ + +/* The fields are: + How far Forward this mode will reach: + How far Backward this mode will reach: + How many bytes this mode will add to the size of the frag + Which mode to go to if the offset won't fit in this one */ + +relax_typeS md_relax_table[] = { + {1, 1, 0, 0}, /* First entries aren't used */ + {1, 1, 0, 0}, /* For no good reason except */ + {1, 1, 0, 0}, /* that the VAX doesn't either */ + {1, 1, 0, 0}, + + /* Relax for bcc <L>. + These insns are translated into b!cc +3 jmp L. */ + {(127), (-128), 0, ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD)}, + {0, 0, 3, 0}, + {1, 1, 0, 0}, + {1, 1, 0, 0}, + + /* Relax for bsr <L> and bra <L>. + These insns are translated into jsr and jmp. */ + {(127), (-128), 0, ENCODE_RELAX (STATE_PC_RELATIVE, STATE_WORD)}, + {0, 0, 1, 0}, + {1, 1, 0, 0}, + {1, 1, 0, 0}, + + /* Relax for indexed offset: 5-bits, 9-bits, 16-bits. */ + {(15), (-16), 0, ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_BITS9)}, + {(255), (-256), 1, ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_BITS16)}, + {0, 0, 1, 0}, + {1, 1, 0, 0}, + + /* Relax for dbeq/ibeq/tbeq r,<L>: + These insns are translated into db!cc +3 jmp L. */ + {(255), (-256), 0, ENCODE_RELAX (STATE_XBCC_BRANCH, STATE_WORD)}, + {0, 0, 3, 0}, + {1, 1, 0, 0}, + {1, 1, 0, 0}, + + /* Relax for bcc <L> on 68HC12. + These insns are translated into lbcc <L>. */ + {(127), (-128), 0, ENCODE_RELAX (STATE_CONDITIONAL_BRANCH_6812, STATE_WORD)}, + {0, 0, 2, 0}, + {1, 1, 0, 0}, + {1, 1, 0, 0}, + +}; + +/* 68HC11 and 68HC12 registers. They are numbered according to the 68HC12. */ +typedef enum register_id +{ + REG_NONE = -1, + REG_A = 0, + REG_B = 1, + REG_CCR = 2, + REG_D = 4, + REG_X = 5, + REG_Y = 6, + REG_SP = 7, + REG_PC = 8 +} register_id; + +typedef struct operand +{ + expressionS exp; + register_id reg1; + register_id reg2; + int mode; +} operand; + +struct m68hc11_opcode_def +{ + long format; + int min_operands; + int max_operands; + int nb_modes; + int used; + struct m68hc11_opcode *opcode; +}; + +static struct m68hc11_opcode_def *m68hc11_opcode_defs = 0; +static int m68hc11_nb_opcode_defs = 0; + +typedef struct alias +{ + const char *name; + const char *alias; +} +alias; + +static alias alias_opcodes[] = { + {"cpd", "cmpd"}, + {"cpx", "cmpx"}, + {"cpy", "cmpy"}, + {0, 0} +}; + +/* local functions */ +static register_id reg_name_search PARAMS ((char *name)); +static register_id register_name PARAMS (()); +static int check_range PARAMS ((long num, int mode)); + +static void print_opcode_list PARAMS ((void)); + +static void get_default_target PARAMS ((void)); +static void print_insn_format PARAMS ((char *name)); +static int get_operand PARAMS ((operand * op, int first, long opmode)); +static void fixup8 PARAMS ((expressionS * oper, int mode, int opmode)); +static void fixup16 PARAMS ((expressionS * oper, int mode, int opmode)); +static struct m68hc11_opcode *find_opcode +PARAMS ( + (struct m68hc11_opcode_def * opc, operand operands[], + int *nb_operands)); +static void build_jump_insn +PARAMS ( + (struct m68hc11_opcode * opcode, operand operands[], int nb_operands, + int optimize)); + +static void build_insn PARAMS ((struct m68hc11_opcode * opcode, + operand operands[], int nb_operands)); + +/* Controls whether relative branches can be turned into long branches. + When the relative offset is too large, the insn are changed: + bra -> jmp + bsr -> jsr + bcc -> b!cc +3 + jmp L + dbcc -> db!cc +3 + jmp L + + Setting the flag forbidds this. */ +static short flag_fixed_branchs = 0; + +/* Force to use long jumps (absolute) instead of relative branches. */ +static short flag_force_long_jumps = 0; + +/* Change the direct addressing mode into an absolute addressing mode + when the insn does not support direct addressing. + For example, "clr *ZD0" is normally not possible and is changed + into "clr ZDO". */ +static short flag_strict_direct_addressing = 1; + +/* When an opcode has invalid operand, print out the syntax of the opcode + to stderr. */ +static short flag_print_insn_syntax = 0; + +/* Dumps the list of instructions with syntax and then exit: + 1 -> Only dumps the list (sorted by name) + 2 -> Generate an example (or test) that can be compiled. */ +static short flag_print_opcodes = 0; + +/* Opcode hash table. */ +static struct hash_control *m68hc11_hash; + +/* Current cpu (either cpu6811 or cpu6812). This is determined automagically + by 'get_default_target' by looking at default BFD vector. This is overriden + with the -m<cpu> option. */ +static int current_architecture = 0; + +/* Default cpu determined by 'get_default_target'. */ +static const char *default_cpu; + +/* Number of opcodes in the sorted table (filtered by current cpu). */ +static int num_opcodes; + +/* The opcodes sorted by name and filtered by current cpu. */ +static struct m68hc11_opcode *m68hc11_sorted_opcodes; + +/* These are the machine dependent pseudo-ops. These are included so + the assembler can work on the output from the SUN C compiler, which + generates these. */ + +/* This table describes all the machine specific pseudo-ops the assembler + has to support. The fields are: + pseudo-op name without dot + function to call to execute this pseudo-op + Integer arg to pass to the function. */ +const pseudo_typeS md_pseudo_table[] = { + /* The following pseudo-ops are supported for MRI compatibility. */ + {"fcb", cons, 1}, + {"fdb", cons, 2}, + {"fcc", stringer, 1}, + {"rmb", s_space, 0}, + {"file", dwarf2_directive_file, 0}, + {"loc", dwarf2_directive_loc, 0}, + + {0, 0, 0} +}; + + +/* Options and initialization. */ + +CONST char *md_shortopts = "Sm:"; + +struct option md_longopts[] = { +#define OPTION_FORCE_LONG_BRANCH (OPTION_MD_BASE) + {"force-long-branchs", no_argument, NULL, OPTION_FORCE_LONG_BRANCH}, + +#define OPTION_SHORT_BRANCHS (OPTION_MD_BASE + 1) + {"short-branchs", no_argument, NULL, OPTION_SHORT_BRANCHS}, + +#define OPTION_STRICT_DIRECT_MODE (OPTION_MD_BASE + 2) + {"strict-direct-mode", no_argument, NULL, OPTION_STRICT_DIRECT_MODE}, + +#define OPTION_PRINT_INSN_SYNTAX (OPTION_MD_BASE + 3) + {"print-insn-syntax", no_argument, NULL, OPTION_PRINT_INSN_SYNTAX}, + +#define OPTION_PRINT_OPCODES (OPTION_MD_BASE + 4) + {"print-opcodes", no_argument, NULL, OPTION_PRINT_OPCODES}, + +#define OPTION_GENERATE_EXAMPLE (OPTION_MD_BASE + 5) + {"generate-example", no_argument, NULL, OPTION_GENERATE_EXAMPLE}, + + {NULL, no_argument, NULL, 0} +}; +size_t md_longopts_size = sizeof (md_longopts); + +/* Get the target cpu for the assembler. This is based on the configure + options and on the -m68hc11/-m68hc12 option. If no option is specified, + we must get the default. */ +const char * +m68hc11_arch_format () +{ + get_default_target (); + if (current_architecture & cpu6811) + return "elf32-m68hc11"; + else + return "elf32-m68hc12"; +} + +enum bfd_architecture +m68hc11_arch () +{ + get_default_target (); + if (current_architecture & cpu6811) + return bfd_arch_m68hc11; + else + return bfd_arch_m68hc12; +} + +int +m68hc11_mach () +{ + return 0; +} + + +void +md_show_usage (stream) + FILE *stream; +{ + get_default_target (); + fprintf (stream, _("\ +Motorola 68HC11/68HC12 options:\n\ + -m68hc11 | -m68hc12 specify the processor [default %s]\n\ + --force-long-branchs always turn relative branchs into absolute ones\n\ + -S,--short-branchs do not turn relative branchs into absolute ones\n\ + when the offset is out of range\n\ + --strict-direct-mode do not turn the direct mode into extended mode\n\ + when the instruction does not support direct mode\n\ + --print-insn-syntax print the syntax of instruction in case of error\n\ + --print-opcodes print the list of instructions with syntax\n\ + --generate-example generate an example of each instruction\n\ + (used for testing)\n"), default_cpu); + +} + +/* Try to identify the default target based on the BFD library. */ +static void +get_default_target () +{ + const bfd_target *target; + bfd abfd; + + if (current_architecture != 0) + return; + + default_cpu = "unknown"; + target = bfd_find_target (0, &abfd); + if (target && target->name) + { + if (strcmp (target->name, "elf32-m68hc12") == 0) + { + current_architecture = cpu6812; + default_cpu = "m68hc12"; + } + else if (strcmp (target->name, "elf32-m68hc11") == 0) + { + current_architecture = cpu6811; + default_cpu = "m68hc11"; + } + else + { + as_bad (_("Default target `%s' is not supported."), target->name); + } + } +} + +void +m68hc11_print_statistics (file) + FILE *file; +{ + int i; + struct m68hc11_opcode_def *opc; + + hash_print_statistics (file, "opcode table", m68hc11_hash); + + opc = m68hc11_opcode_defs; + if (opc == 0 || m68hc11_nb_opcode_defs == 0) + return; + + /* Dump the opcode statistics table. */ + fprintf (file, _("Name # Modes Min ops Max ops Modes mask # Used\n")); + for (i = 0; i < m68hc11_nb_opcode_defs; i++, opc++) + { + fprintf (file, "%-7.7s %5d %7d %7d 0x%08lx %7d\n", + opc->opcode->name, + opc->nb_modes, + opc->min_operands, opc->max_operands, opc->format, opc->used); + } +} + +int +md_parse_option (c, arg) + int c; + char *arg; +{ + get_default_target (); + switch (c) + { + /* -S means keep external to 2 bits offset rather than 16 bits one. */ + case OPTION_SHORT_BRANCHS: + case 'S': + flag_fixed_branchs = 1; + break; + + case OPTION_FORCE_LONG_BRANCH: + flag_force_long_jumps = 1; + break; + + case OPTION_PRINT_INSN_SYNTAX: + flag_print_insn_syntax = 1; + break; + + case OPTION_PRINT_OPCODES: + flag_print_opcodes = 1; + break; + + case OPTION_STRICT_DIRECT_MODE: + flag_strict_direct_addressing = 0; + break; + + case OPTION_GENERATE_EXAMPLE: + flag_print_opcodes = 2; + break; + + case 'm': + if (strcasecmp (arg, "68hc11") == 0) + current_architecture = cpu6811; + else if (strcasecmp (arg, "68hc12") == 0) + current_architecture = cpu6812; + else + as_bad (_("Option `%s' is not recognized."), arg); + break; + + default: + return 0; + } + + return 1; +} + +symbolS * +md_undefined_symbol (name) + char *name ATTRIBUTE_UNUSED; +{ + return 0; +} + +/* Equal to MAX_PRECISION in atof-ieee.c */ +#define MAX_LITTLENUMS 6 + +/* Turn a string in input_line_pointer into a floating point constant + of type type, and store the appropriate bytes in *litP. The number + of LITTLENUMS emitted is stored in *sizeP . An error message is + returned, or NULL on OK. */ + +char * +md_atof (type, litP, sizeP) + char type; + char *litP; + int *sizeP; +{ + int prec; + LITTLENUM_TYPE words[MAX_LITTLENUMS]; + LITTLENUM_TYPE *wordP; + char *t; + + switch (type) + { + case 'f': + case 'F': + case 's': + case 'S': + prec = 2; + break; + + case 'd': + case 'D': + case 'r': + case 'R': + prec = 4; + break; + + case 'x': + case 'X': + prec = 6; + break; + + case 'p': + case 'P': + prec = 6; + break; + + default: + *sizeP = 0; + return _("Bad call to MD_ATOF()"); + } + t = atof_ieee (input_line_pointer, type, words); + if (t) + input_line_pointer = t; + + *sizeP = prec * sizeof (LITTLENUM_TYPE); + for (wordP = words; prec--;) + { + md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE)); + litP += sizeof (LITTLENUM_TYPE); + } + return 0; +} + +valueT +md_section_align (seg, addr) + asection *seg; + valueT addr; +{ + int align = bfd_get_section_alignment (stdoutput, seg); + return ((addr + (1 << align) - 1) & (-1 << align)); +} + + +static int +cmp_opcode (op1, op2) + struct m68hc11_opcode *op1; + struct m68hc11_opcode *op2; +{ + return strcmp (op1->name, op2->name); +} + +/* Initialize the assembler. Create the opcode hash table + (sorted on the names) with the M6811 opcode table + (from opcode library). */ +void +md_begin () +{ + char *prev_name = ""; + struct m68hc11_opcode *opcodes; + struct m68hc11_opcode_def *opc = 0; + int i, j; + + get_default_target (); + + m68hc11_hash = hash_new (); + + /* Get a writable copy of the opcode table and sort it on the names. */ + opcodes = (struct m68hc11_opcode *) xmalloc (m68hc11_num_opcodes * + sizeof (struct + m68hc11_opcode)); + m68hc11_sorted_opcodes = opcodes; + num_opcodes = 0; + for (i = 0; i < m68hc11_num_opcodes; i++) + { + if (m68hc11_opcodes[i].arch & current_architecture) + { + opcodes[num_opcodes] = m68hc11_opcodes[i]; + if (opcodes[num_opcodes].name[0] == 'b' + && opcodes[num_opcodes].format & M6811_OP_JUMP_REL + && !(opcodes[num_opcodes].format & M6811_OP_BITMASK)) + { + num_opcodes++; + opcodes[num_opcodes] = m68hc11_opcodes[i]; + } + num_opcodes++; + for (j = 0; alias_opcodes[j].name != 0; j++) + if (strcmp (m68hc11_opcodes[i].name, alias_opcodes[j].name) == 0) + { + opcodes[num_opcodes] = m68hc11_opcodes[i]; + opcodes[num_opcodes].name = alias_opcodes[j].alias; + num_opcodes++; + break; + } + } + } + qsort (opcodes, num_opcodes, sizeof (struct m68hc11_opcode), cmp_opcode); + + opc = (struct m68hc11_opcode_def *) + xmalloc (num_opcodes * sizeof (struct m68hc11_opcode_def)); + m68hc11_opcode_defs = opc--; + + /* Insert unique names into hash table. The M6811 instruction set + has several identical opcode names that have different opcodes based + on the operands. This hash table then provides a quick index to + the first opcode with a particular name in the opcode table. */ + for (i = 0; i < num_opcodes; i++, opcodes++) + { + int expect; + + if (strcmp (prev_name, opcodes->name)) + { + prev_name = (char *) opcodes->name; + + opc++; + opc->format = 0; + opc->min_operands = 100; + opc->max_operands = 0; + opc->nb_modes = 0; + opc->opcode = opcodes; + opc->used = 0; + hash_insert (m68hc11_hash, opcodes->name, (char *) opc); + } + opc->nb_modes++; + opc->format |= opcodes->format; + + /* See how many operands this opcode needs. */ + expect = 0; + if (opcodes->format & M6811_OP_MASK) + expect++; + if (opcodes->format & M6811_OP_BITMASK) + expect++; + if (opcodes->format & (M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16)) + expect++; + if (opcodes->format & (M6812_OP_IND16_P2 | M6812_OP_IDX_P2)) + expect++; + + if (expect < opc->min_operands) + opc->min_operands = expect; + if (expect > opc->max_operands) + opc->max_operands = expect; + } + opc++; + m68hc11_nb_opcode_defs = opc - m68hc11_opcode_defs; + + if (flag_print_opcodes) + { + print_opcode_list (); + exit (EXIT_SUCCESS); + } +} + +void +m68hc11_init_after_args () +{ +} + + +/* Builtin help. */ + +/* Return a string that represents the operand format for the instruction. + When example is true, this generates an example of operand. This is used + to give an example and also to generate a test. */ +static char * +print_opcode_format (opcode, example) + struct m68hc11_opcode *opcode; + int example; +{ + static char buf[128]; + int format = opcode->format; + char *p; + + p = buf; + buf[0] = 0; + if (format & M6811_OP_IMM8) + { + if (example) + sprintf (p, "#%d", rand () & 0x0FF); + else + strcpy (p, _("#<imm8>")); + p = &p[strlen (p)]; + } + + if (format & M6811_OP_IMM16) + { + if (example) + sprintf (p, "#%d", rand () & 0x0FFFF); + else + strcpy (p, _("#<imm16>")); + p = &p[strlen (p)]; + } + + if (format & M6811_OP_IX) + { + if (example) + sprintf (p, "%d,X", rand () & 0x0FF); + else + strcpy (p, _("<imm8>,X")); + p = &p[strlen (p)]; + } + + if (format & M6811_OP_IY) + { + if (example) + sprintf (p, "%d,X", rand () & 0x0FF); + else + strcpy (p, _("<imm8>,X")); + p = &p[strlen (p)]; + } + + if (format & M6812_OP_IDX) + { + if (example) + sprintf (p, "%d,X", rand () & 0x0FF); + else + strcpy (p, "n,r"); + p = &p[strlen (p)]; + } + + if (format & M6811_OP_DIRECT) + { + if (example) + sprintf (p, "*Z%d", rand () & 0x0FF); + else + strcpy (p, _("*<abs8>")); + p = &p[strlen (p)]; + } + + if (format & M6811_OP_BITMASK) + { + if (buf[0]) + *p++ = ' '; + + if (example) + sprintf (p, "#$%02x", rand () & 0x0FF); + else + strcpy (p, _("#<mask>")); + + p = &p[strlen (p)]; + if (format & M6811_OP_JUMP_REL) + *p++ = ' '; + } + + if (format & M6811_OP_IND16) + { + if (example) + sprintf (p, _("symbol%d"), rand () & 0x0FF); + else + strcpy (p, _("<abs>")); + + p = &p[strlen (p)]; + } + + if (format & (M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16)) + { + if (example) + { + if (format & M6811_OP_BITMASK) + { + sprintf (p, ".+%d", rand () & 0x7F); + } + else + { + sprintf (p, "L%d", rand () & 0x0FF); + } + } + else + strcpy (p, _("<label>")); + } + + return buf; +} + +/* Prints the list of instructions with the possible operands. */ +static void +print_opcode_list () +{ + int i; + char *prev_name = ""; + struct m68hc11_opcode *opcodes; + int example = flag_print_opcodes == 2; + + if (example) + { + printf (_("# Example of `%s' instructions\n\t.sect .text\n_start:\n"), + default_cpu); + } + + opcodes = m68hc11_sorted_opcodes; + + /* Walk the list sorted on names (by md_begin). We only report + one instruction per line, and we collect the different operand + formats. */ + for (i = 0; i < num_opcodes; i++, opcodes++) + { + char *fmt = print_opcode_format (opcodes, example); + + if (example) + { + printf ("L%d:\t", i); + printf ("%s %s\n", opcodes->name, fmt); + } + else + { + if (strcmp (prev_name, opcodes->name)) + { + if (i > 0) + printf ("\n"); + + printf ("%-5.5s ", opcodes->name); + prev_name = (char *) opcodes->name; + } + if (fmt[0]) + printf (" [%s]", fmt); + } + } + printf ("\n"); +} + + +/* Print the instruction format. This operation is called when some + instruction is not correct. Instruction format is printed as an + error message. */ +static void +print_insn_format (name) + char *name; +{ + struct m68hc11_opcode_def *opc; + struct m68hc11_opcode *opcode; + char buf[128]; + + opc = (struct m68hc11_opcode_def *) hash_find (m68hc11_hash, name); + if (opc == NULL) + { + as_bad (_("Instruction `%s' is not recognized."), name); + return; + } + opcode = opc->opcode; + + as_bad (_("Instruction formats for `%s':"), name); + do + { + char *fmt; + + fmt = print_opcode_format (opcode, 0, 0); + sprintf (buf, "\t%-5.5s %s", opcode->name, fmt); + + as_bad ("%s", buf); + opcode++; + } + while (strcmp (opcode->name, name) == 0); +} + + +/* Analysis of 68HC11 and 68HC12 operands. */ + +/* reg_name_search() finds the register number given its name. + Returns the register number or REG_NONE on failure. */ +static register_id +reg_name_search (name) + char *name; +{ + if (strcasecmp (name, "x") == 0 || strcasecmp (name, "ix") == 0) + return REG_X; + if (strcasecmp (name, "y") == 0 || strcasecmp (name, "iy") == 0) + return REG_Y; + if (strcasecmp (name, "a") == 0) + return REG_A; + if (strcasecmp (name, "b") == 0) + return REG_B; + if (strcasecmp (name, "d") == 0) + return REG_D; + if (strcasecmp (name, "sp") == 0) + return REG_SP; + if (strcasecmp (name, "pc") == 0) + return REG_PC; + if (strcasecmp (name, "ccr") == 0) + return REG_CCR; + + return REG_NONE; +} + +static char * +skip_whites (p) + char *p; +{ + while (*p == ' ' || *p == '\t') + p++; + + return p; +} + +/* register_name() checks the string at input_line_pointer + to see if it is a valid register name. */ +static register_id +register_name () +{ + register_id reg_number; + char c, *p = input_line_pointer; + + if (!is_name_beginner (*p++)) + return REG_NONE; + + while (is_part_of_name (*p++)) + continue; + + c = *--p; + if (c) + *p++ = 0; + + /* look to see if it's in the register table. */ + reg_number = reg_name_search (input_line_pointer); + if (reg_number != REG_NONE) + { + if (c) + *--p = c; + + input_line_pointer = p; + return reg_number; + } + if (c) + *--p = c; + + return reg_number; +} + +/* get_operands parses a string of operands and returns + an array of expressions. + + Operand mode[0] mode[1] exp[0] exp[1] + #n M6811_OP_IMM16 - O_* + *<exp> M6811_OP_DIRECT - O_* + .{+-}<exp> M6811_OP_JUMP_REL - O_* + <exp> M6811_OP_IND16 - O_* + ,r N,r M6812_OP_IDX M6812_OP_REG O_constant O_register + n,-r M6812_PRE_DEC M6812_OP_REG O_constant O_register + n,+r M6812_PRE_INC " " + n,r- M6812_POST_DEC " " + n,r+ M6812_POST_INC " " + A,r B,r D,r M6811_OP_REG M6812_OP_REG O_register O_register + [D,r] M6811_OP_IDX_2 M6812_OP_REG O_register O_register + [n,r] M6811_OP_IDX_1 M6812_OP_REG O_constant O_register + +*/ + +static int +get_operand (oper, which, opmode) + operand *oper; + int which; + long opmode; +{ + char *p = input_line_pointer; + int mode; + register_id reg; + + oper->exp.X_op = O_absent; + oper->reg1 = REG_NONE; + oper->reg2 = REG_NONE; + mode = M6811_OP_NONE; + + p = skip_whites (p); + + if (*p == 0 || *p == '\n' || *p == '\r') + { + input_line_pointer = p; + return 0; + } + + if (*p == '*' && (opmode & (M6811_OP_DIRECT | M6811_OP_IND16))) + { + mode = M6811_OP_DIRECT; + p++; + } + else if (*p == '#') + { + if (!(opmode & (M6811_OP_IMM8 | M6811_OP_IMM16 | M6811_OP_BITMASK))) + { + as_bad (_("Immediate operand is not allowed for operand %d."), + which); + return -1; + } + + mode = M6811_OP_IMM16; + p++; + if (strncmp (p, "%hi", 3) == 0) + { + p += 3; + mode |= M6811_OP_HIGH_ADDR; + } + else if (strncmp (p, "%lo", 3) == 0) + { + p += 3; + mode |= M6811_OP_LOW_ADDR; + } + } + else if (*p == '.' && (p[1] == '+' || p[1] == '-')) + { + p++; + mode = M6811_OP_JUMP_REL; + } + else if (*p == '[') + { + if (current_architecture & cpu6811) + as_bad (_("Indirect indexed addressing is not valid for 68HC11.")); + + p++; + mode = M6812_OP_IDX_2; + p = skip_whites (p); + } + else if (*p == ',') /* Special handling of ,x and ,y. */ + { + p++; + input_line_pointer = p; + + reg = register_name (); + if (reg != REG_NONE) + { + oper->reg1 = reg; + oper->exp.X_op = O_constant; + oper->exp.X_add_number = 0; + oper->mode = M6812_OP_IDX; + return 1; + } + as_bad (_("Spurious `,' or bad indirect register addressing mode.")); + return -1; + } + input_line_pointer = p; + + if (mode == M6811_OP_NONE || mode == M6812_OP_IDX_2) + reg = register_name (); + else + reg = REG_NONE; + + if (reg != REG_NONE) + { + p = skip_whites (input_line_pointer); + if (*p == ']' && mode == M6812_OP_IDX_2) + { + as_bad + (_("Missing second register or offset for indexed-indirect mode.")); + return -1; + } + + oper->reg1 = reg; + oper->mode = mode | M6812_OP_REG; + if (*p != ',') + { + if (mode == M6812_OP_IDX_2) + { + as_bad (_("Missing second register for indexed-indirect mode.")); + return -1; + } + return 1; + } + + p++; + input_line_pointer = p; + reg = register_name (); + if (reg != REG_NONE) + { + p = skip_whites (input_line_pointer); + if (mode == M6812_OP_IDX_2) + { + if (*p != ']') + { + as_bad (_("Missing `]' to close indexed-indirect mode.")); + return -1; + } + p++; + } + input_line_pointer = p; + + oper->reg2 = reg; + return 1; + } + return 1; + } + + /* In MRI mode, isolate the operand because we can't distinguish + operands from comments. */ + if (flag_mri) + { + char c = 0; + + p = skip_whites (p); + while (*p && *p != ' ' && *p != '\t') + p++; + + if (*p) + { + c = *p; + *p = 0; + } + + /* Parse as an expression. */ + expression (&oper->exp); + + if (c) + { + *p = c; + } + } + else + { + expression (&oper->exp); + } + + if (oper->exp.X_op == O_illegal) + { + as_bad (_("Illegal operand.")); + return -1; + } + else if (oper->exp.X_op == O_absent) + { + as_bad (_("Missing operand.")); + return -1; + } + + p = input_line_pointer; + + if (mode == M6811_OP_NONE || mode == M6811_OP_DIRECT + || mode == M6812_OP_IDX_2) + { + p = skip_whites (input_line_pointer); + + if (*p == ',') + { + p++; + + /* 68HC12 pre increment or decrement. */ + if (mode == M6811_OP_NONE) + { + if (*p == '-') + { + mode = M6812_PRE_DEC; + p++; + if (current_architecture & cpu6811) + as_bad (_("Pre-decrement mode is not valid for 68HC11")); + } + else if (*p == '+') + { + mode = M6812_PRE_INC; + p++; + if (current_architecture & cpu6811) + as_bad (_("Pre-increment mode is not valid for 68HC11")); + } + p = skip_whites (p); + } + input_line_pointer = p; + reg = register_name (); + + /* Backtrack... */ + if (which == 0 && opmode & M6812_OP_IDX_P2 + && reg != REG_X && reg != REG_Y + && reg != REG_PC && reg != REG_SP) + { + reg = REG_NONE; + input_line_pointer = p; + } + + if (reg == REG_NONE && mode != M6811_OP_DIRECT + && !(mode == M6811_OP_NONE && opmode & M6811_OP_IND16)) + { + as_bad (_("Wrong register in register indirect mode.")); + return -1; + } + if (mode == M6812_OP_IDX_2) + { + p = skip_whites (input_line_pointer); + if (*p++ != ']') + { + as_bad (_("Missing `]' to close register indirect operand.")); + return -1; + } + input_line_pointer = p; + } + if (reg != REG_NONE) + { + oper->reg1 = reg; + if (mode == M6811_OP_NONE) + { + p = input_line_pointer; + if (*p == '-') + { + mode = M6812_POST_DEC; + p++; + if (current_architecture & cpu6811) + as_bad + (_("Post-decrement mode is not valid for 68HC11.")); + } + else if (*p == '+') + { + mode = M6812_POST_INC; + p++; + if (current_architecture & cpu6811) + as_bad + (_("Post-increment mode is not valid for 68HC11.")); + } + else + mode = M6812_OP_IDX; + + input_line_pointer = p; + } + else + mode |= M6812_OP_IDX; + + oper->mode = mode; + return 1; + } + } + + if (mode == M6812_OP_D_IDX_2) + { + as_bad (_("Invalid indexed indirect mode.")); + return -1; + } + } + + /* If the mode is not known until now, this is either a label + or an indirect address. */ + if (mode == M6811_OP_NONE) + { + mode = M6811_OP_IND16 | M6811_OP_JUMP_REL; + } + + p = input_line_pointer; + while (*p == ' ' || *p == '\t') + p++; + input_line_pointer = p; + oper->mode = mode; + + return 1; +} + +#define M6812_AUTO_INC_DEC (M6812_PRE_INC | M6812_PRE_DEC \ + | M6812_POST_INC | M6812_POST_DEC) + +/* Checks that the number 'num' fits for a given mode. */ +static int +check_range (num, mode) + long num; + int mode; +{ + /* Auto increment and decrement are ok for [-8..8] without 0. */ + if (mode & M6812_AUTO_INC_DEC) + { + return (num != 0 && num <= 8 && num >= -8); + } + + /* The 68HC12 supports 5, 9 and 16-bits offsets. */ + if (mode & (M6812_INDEXED_IND | M6812_INDEXED | M6812_OP_IDX)) + { + mode = M6811_OP_IND16; + } + + if (mode & M6812_OP_JUMP_REL16) + mode = M6811_OP_IND16; + + switch (mode) + { + case M6811_OP_IX: + case M6811_OP_IY: + case M6811_OP_DIRECT: + return (num >= 0 && num <= 255) ? 1 : 0; + + case M6811_OP_BITMASK: + case M6811_OP_IMM8: + return (((num & 0xFFFFFF00) == 0) || ((num & 0xFFFFFF00) == 0xFFFFFF00)) + ? 1 : 0; + + case M6811_OP_JUMP_REL: + return (num >= -128 && num <= 127) ? 1 : 0; + + case M6811_OP_IND16: + case M6811_OP_IMM16: + return (((num & 0xFFFF0000) == 0) || ((num & 0xFFFF0000) == 0xFFFF0000)) + ? 1 : 0; + + case M6812_OP_IBCC_MARKER: + case M6812_OP_TBCC_MARKER: + case M6812_OP_DBCC_MARKER: + return (num >= -256 && num <= 255) ? 1 : 0; + + case M6812_OP_TRAP_ID: + return ((num >= 0x30 && num <= 0x39) + || (num >= 0x40 && num <= 0x0ff)) ? 1 : 0; + + default: + return 0; + } +} + + +/* Gas fixup generation. */ + +/* Put a 1 byte expression described by 'oper'. If this expression contains + unresolved symbols, generate an 8-bit fixup. */ +static void +fixup8 (oper, mode, opmode) + expressionS *oper; + int mode; + int opmode; +{ + char *f; + + f = frag_more (1); + + if (oper->X_op == O_constant) + { + if (mode & M6812_OP_TRAP_ID + && !check_range (oper->X_add_number, M6812_OP_TRAP_ID)) + { + static char trap_id_warn_once = 0; + + as_bad (_("Trap id `%ld' is out of range."), oper->X_add_number); + if (trap_id_warn_once == 0) + { + trap_id_warn_once = 1; + as_bad (_("Trap id must be within [0x30..0x39] or [0x40..0xff].")); + } + } + + if (!(mode & M6812_OP_TRAP_ID) + && !check_range (oper->X_add_number, mode)) + { + as_bad (_("Operand out of 8-bit range: `%ld'."), oper->X_add_number); + } + number_to_chars_bigendian (f, oper->X_add_number & 0x0FF, 1); + } + else if (oper->X_op != O_register) + { + if (mode & M6812_OP_TRAP_ID) + as_bad (_("The trap id must be a constant.")); + + if (mode == M6811_OP_JUMP_REL) + { + fixS *fixp; + + fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 1, + oper, true, BFD_RELOC_8_PCREL); + fixp->fx_pcrel_adjust = 1; + } + else + { + /* Now create an 8-bit fixup. If there was some %hi or %lo + modifier, generate the reloc accordingly. */ + fix_new_exp (frag_now, f - frag_now->fr_literal, 1, + oper, false, + ((opmode & M6811_OP_HIGH_ADDR) + ? BFD_RELOC_M68HC11_HI8 + : ((opmode & M6811_OP_LOW_ADDR) + ? BFD_RELOC_M68HC11_LO8 : BFD_RELOC_8))); + } + number_to_chars_bigendian (f, 0, 1); + } + else + { + as_fatal (_("Operand `%x' not recognized in fixup8."), oper->X_op); + } +} + +/* Put a 2 bytes expression described by 'oper'. If this expression contains + unresolved symbols, generate a 16-bit fixup. */ +static void +fixup16 (oper, mode, opmode) + expressionS *oper; + int mode; + int opmode ATTRIBUTE_UNUSED; +{ + char *f; + + f = frag_more (2); + + if (oper->X_op == O_constant) + { + if (!check_range (oper->X_add_number, mode)) + { + as_bad (_("Operand out of 16-bit range: `%ld'."), + oper->X_add_number); + } + number_to_chars_bigendian (f, oper->X_add_number & 0x0FFFF, 2); + } + else if (oper->X_op != O_register) + { + fixS *fixp; + + /* Now create a 16-bit fixup. */ + fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 2, + oper, + (mode & M6812_OP_JUMP_REL16 ? true : false), + (mode & M6812_OP_JUMP_REL16 + ? BFD_RELOC_16_PCREL : BFD_RELOC_16)); + number_to_chars_bigendian (f, 0, 2); + if (mode & M6812_OP_JUMP_REL16) + fixp->fx_pcrel_adjust = 2; + } + else + { + as_fatal (_("Operand `%x' not recognized in fixup16."), oper->X_op); + } +} + + +/* 68HC11 and 68HC12 code generation. */ + +/* Translate the short branch/bsr instruction into a long branch. */ +static unsigned char +convert_branch (code) + unsigned char code; +{ + if (IS_OPCODE (code, M6812_BSR)) + return M6812_JSR; + else if (IS_OPCODE (code, M6811_BSR)) + return M6811_JSR; + else if (IS_OPCODE (code, M6811_BRA)) + return (current_architecture & cpu6812) ? M6812_JMP : M6811_JMP; + else + as_fatal (_("Unexpected branch conversion with `%x'"), code); + + /* Keep gcc happy. */ + return M6811_JSR; +} + +/* Start a new insn that contains at least 'size' bytes. Record the + line information of that insn in the dwarf2 debug sections. */ +static char* +m68hc11_new_insn (size) + int size; +{ + char* f; + + f = frag_more (size); + + /* Emit line number information in dwarf2 debug sections. */ + if (debug_type == DEBUG_DWARF2) + { + bfd_vma addr; + + dwarf2_where (&debug_line); + addr = frag_now->fr_address + frag_now_fix () - size; + dwarf2_gen_line_info (addr, &debug_line); + } + return f; +} + +/* Builds a jump instruction (bra, bcc, bsr). */ +static void +build_jump_insn (opcode, operands, nb_operands, jmp_mode) + struct m68hc11_opcode *opcode; + operand operands[]; + int nb_operands; + int jmp_mode; +{ + unsigned char code; + int insn_size; + char *f; + unsigned long n; + + /* The relative branch convertion is not supported for + brclr and brset. */ + assert ((opcode->format & M6811_OP_BITMASK) == 0); + assert (nb_operands == 1); + assert (operands[0].reg1 == REG_NONE && operands[0].reg2 == REG_NONE); + + code = opcode->opcode; + insn_size = 1; + + n = operands[0].exp.X_add_number; + + /* Turn into a long branch: + - when force long branch option (and not for jbcc pseudos), + - when jbcc and the constant is out of -128..127 range, + - when branch optimization is allowed and branch out of range. */ + if ((jmp_mode == 0 && flag_force_long_jumps) + || (operands[0].exp.X_op == O_constant + && (!check_range (n, opcode->format) && + (jmp_mode == 1 || flag_fixed_branchs == 0)))) + { + if (code == M6811_BSR || code == M6811_BRA || code == M6812_BSR) + { + code = convert_branch (code); + + f = m68hc11_new_insn (1); + number_to_chars_bigendian (f, code, 1); + } + else if (current_architecture & cpu6812) + { + /* 68HC12: translate the bcc into a lbcc. */ + f = m68hc11_new_insn (2); + number_to_chars_bigendian (f, M6811_OPCODE_PAGE2, 1); + number_to_chars_bigendian (f + 1, code, 1); + fixup16 (&operands[0].exp, M6812_OP_JUMP_REL16, + M6812_OP_JUMP_REL16); + return; + } + else + { + /* 68HC11: translate the bcc into b!cc +3; jmp <L>. */ + f = m68hc11_new_insn (3); + code ^= 1; + number_to_chars_bigendian (f, code, 1); + number_to_chars_bigendian (f + 1, 3, 1); + number_to_chars_bigendian (f + 2, M6811_JMP, 1); + } + fixup16 (&operands[0].exp, M6811_OP_IND16, M6811_OP_IND16); + return; + } + + /* Branch with a constant that must fit in 8-bits. */ + if (operands[0].exp.X_op == O_constant) + { + if (!check_range (n, opcode->format)) + { + as_bad (_("Operand out of range for a relative branch: `%ld'"), + n); + } + else if (opcode->format & M6812_OP_JUMP_REL16) + { + f = m68hc11_new_insn (4); + number_to_chars_bigendian (f, M6811_OPCODE_PAGE2, 1); + number_to_chars_bigendian (f + 1, code, 1); + number_to_chars_bigendian (f + 2, n & 0x0ffff, 2); + } + else + { + f = m68hc11_new_insn (2); + number_to_chars_bigendian (f, code, 1); + number_to_chars_bigendian (f + 1, n & 0x0FF, 1); + } + } + else if (opcode->format & M6812_OP_JUMP_REL16) + { + f = m68hc11_new_insn (2); + number_to_chars_bigendian (f, M6811_OPCODE_PAGE2, 1); + number_to_chars_bigendian (f + 1, code, 1); + fixup16 (&operands[0].exp, M6812_OP_JUMP_REL16, M6812_OP_JUMP_REL16); + } + else + { + char *opcode; + + /* Branch offset must fit in 8-bits, don't do some relax. */ + if (jmp_mode == 0 && flag_fixed_branchs) + { + opcode = m68hc11_new_insn (1); + number_to_chars_bigendian (opcode, code, 1); + fixup8 (&operands[0].exp, M6811_OP_JUMP_REL, M6811_OP_JUMP_REL); + } + + /* bra/bsr made be changed into jmp/jsr. */ + else if (code == M6811_BSR || code == M6811_BRA || code == M6812_BSR) + { + opcode = m68hc11_new_insn (2); + number_to_chars_bigendian (opcode, code, 1); + number_to_chars_bigendian (opcode + 1, 0, 1); + frag_var (rs_machine_dependent, 1, 1, + ENCODE_RELAX (STATE_PC_RELATIVE, STATE_UNDF), + operands[0].exp.X_add_symbol, (offsetT) n, opcode); + } + else if (current_architecture & cpu6812) + { + opcode = m68hc11_new_insn (2); + number_to_chars_bigendian (opcode, code, 1); + number_to_chars_bigendian (opcode + 1, 0, 1); + frag_var (rs_machine_dependent, 2, 2, + ENCODE_RELAX (STATE_CONDITIONAL_BRANCH_6812, STATE_UNDF), + operands[0].exp.X_add_symbol, (offsetT) n, opcode); + } + else + { + opcode = m68hc11_new_insn (2); + number_to_chars_bigendian (opcode, code, 1); + number_to_chars_bigendian (opcode + 1, 0, 1); + frag_var (rs_machine_dependent, 3, 3, + ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF), + operands[0].exp.X_add_symbol, (offsetT) n, opcode); + } + } +} + +/* Builds a dbne/dbeq/tbne/tbeq instruction. */ +static void +build_dbranch_insn (opcode, operands, nb_operands, jmp_mode) + struct m68hc11_opcode *opcode; + operand operands[]; + int nb_operands; + int jmp_mode; +{ + unsigned char code; + int insn_size; + char *f; + unsigned long n; + + /* The relative branch convertion is not supported for + brclr and brset. */ + assert ((opcode->format & M6811_OP_BITMASK) == 0); + assert (nb_operands == 2); + assert (operands[0].reg1 != REG_NONE); + + code = opcode->opcode & 0x0FF; + insn_size = 1; + + f = m68hc11_new_insn (1); + number_to_chars_bigendian (f, code, 1); + + n = operands[1].exp.X_add_number; + code = operands[0].reg1; + + if (operands[0].reg1 == REG_NONE || operands[0].reg1 == REG_CCR + || operands[0].reg1 == REG_PC) + as_bad (_("Invalid register for dbcc/tbcc instruction.")); + + if (opcode->format & M6812_OP_IBCC_MARKER) + code |= 0x80; + else if (opcode->format & M6812_OP_TBCC_MARKER) + code |= 0x40; + + if (!(opcode->format & M6812_OP_EQ_MARKER)) + code |= 0x20; + + /* Turn into a long branch: + - when force long branch option (and not for jbcc pseudos), + - when jdbcc and the constant is out of -256..255 range, + - when branch optimization is allowed and branch out of range. */ + if ((jmp_mode == 0 && flag_force_long_jumps) + || (operands[1].exp.X_op == O_constant + && (!check_range (n, M6812_OP_IBCC_MARKER) && + (jmp_mode == 1 || flag_fixed_branchs == 0)))) + { + f = frag_more (2); + code ^= 0x20; + number_to_chars_bigendian (f, code, 1); + number_to_chars_bigendian (f + 1, M6812_JMP, 1); + fixup16 (&operands[0].exp, M6811_OP_IND16, M6811_OP_IND16); + return; + } + + /* Branch with a constant that must fit in 9-bits. */ + if (operands[1].exp.X_op == O_constant) + { + if (!check_range (n, M6812_OP_IBCC_MARKER)) + { + as_bad (_("Operand out of range for a relative branch: `%ld'"), + n); + } + else + { + if ((long) n < 0) + code |= 0x10; + + f = frag_more (2); + number_to_chars_bigendian (f, code, 1); + number_to_chars_bigendian (f + 1, n & 0x0FF, 1); + } + } + else + { + /* Branch offset must fit in 8-bits, don't do some relax. */ + if (jmp_mode == 0 && flag_fixed_branchs) + { + fixup8 (&operands[0].exp, M6811_OP_JUMP_REL, M6811_OP_JUMP_REL); + } + + else + { + f = frag_more (2); + number_to_chars_bigendian (f, code, 1); + number_to_chars_bigendian (f + 1, 0, 1); + frag_var (rs_machine_dependent, 3, 3, + ENCODE_RELAX (STATE_XBCC_BRANCH, STATE_UNDF), + operands[1].exp.X_add_symbol, (offsetT) n, f); + } + } +} + +#define OP_EXTENDED (M6811_OP_PAGE2 | M6811_OP_PAGE3 | M6811_OP_PAGE4) + +/* Assemble the post index byte for 68HC12 extended addressing modes. */ +static int +build_indexed_byte (op, format, move_insn) + operand *op; + int format ATTRIBUTE_UNUSED; + int move_insn; +{ + unsigned char byte = 0; + char *f; + int mode; + long val; + + val = op->exp.X_add_number; + mode = op->mode; + if (mode & M6812_AUTO_INC_DEC) + { + byte = 0x20; + if (mode & (M6812_POST_INC | M6812_POST_DEC)) + byte |= 0x10; + + if (op->exp.X_op == O_constant) + { + if (!check_range (val, mode)) + { + as_bad (_("Increment/decrement value is out of range: `%ld'."), + val); + } + if (mode & (M6812_POST_INC | M6812_PRE_INC)) + byte |= (val - 1) & 0x07; + else + byte |= (8 - ((val) & 7)) | 0x8; + } + switch (op->reg1) + { + case REG_NONE: + as_fatal (_("Expecting a register.")); + + case REG_X: + byte |= 0; + break; + + case REG_Y: + byte |= 0x40; + break; + + case REG_SP: + byte |= 0x80; + break; + + default: + as_bad (_("Invalid register for post/pre increment.")); + break; + } + + f = frag_more (1); + number_to_chars_bigendian (f, byte, 1); + return 1; + } + + if (mode & M6812_OP_IDX) + { + switch (op->reg1) + { + case REG_X: + byte = 0; + break; + + case REG_Y: + byte = 1; + break; + + case REG_SP: + byte = 2; + break; + + case REG_PC: + byte = 3; + break; + + default: + as_bad (_("Invalid register.")); + break; + } + if (op->exp.X_op == O_constant) + { + if (!check_range (val, M6812_OP_IDX)) + { + as_bad (_("Offset out of 16-bit range: %ld."), val); + } + + if (move_insn && !(val >= -16 && val <= 15)) + { + as_bad (_("Offset out of 5-bit range for movw/movb insn.")); + return -1; + } + + if (val >= -16 && val <= 15 && !(mode & M6812_OP_IDX_2)) + { + byte = byte << 6; + byte |= val & 0x1f; + f = frag_more (1); + number_to_chars_bigendian (f, byte, 1); + return 1; + } + else if (val >= -256 && val <= 255 && !(mode & M6812_OP_IDX_2)) + { + byte = byte << 3; + byte |= 0xe0; + if (val < 0) + byte |= 0x1; + f = frag_more (2); + number_to_chars_bigendian (f, byte, 1); + number_to_chars_bigendian (f + 1, val & 0x0FF, 1); + return 2; + } + else + { + byte = byte << 3; + if (mode & M6812_OP_IDX_2) + byte |= 0xe3; + else + byte |= 0xe2; + + f = frag_more (3); + number_to_chars_bigendian (f, byte, 1); + number_to_chars_bigendian (f + 1, val & 0x0FFFF, 2); + return 3; + } + } + f = frag_more (1); + number_to_chars_bigendian (f, byte, 1); + /* + fix_new_exp (frag_now, f - frag_now->fr_literal, 2, + &op->exp, false, BFD_RELOC_16); */ + frag_var (rs_machine_dependent, 2, 2, + ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_UNDF), + op->exp.X_add_symbol, val, f); + return 3; + } + + if (mode & M6812_OP_REG) + { + if (mode & M6812_OP_IDX_2) + { + if (op->reg1 != REG_D) + as_bad (_("Expecting register D for indexed indirect mode.")); + if (move_insn) + as_bad (_("Indexed indirect mode is not allowed for movb/movw.")); + + byte = 0xE7; + } + else + { + switch (op->reg1) + { + case REG_A: + byte = 0xE4; + break; + + case REG_B: + byte = 0xE5; + break; + + default: + as_bad (_("Invalid accumulator register.")); + + case REG_D: + byte = 0xE6; + break; + } + } + switch (op->reg2) + { + case REG_X: + break; + + case REG_Y: + byte |= (1 << 3); + break; + + case REG_SP: + byte |= (2 << 3); + break; + + case REG_PC: + byte |= (3 << 3); + break; + + default: + as_bad (_("Invalid indexed register.")); + break; + } + f = frag_more (1); + number_to_chars_bigendian (f, byte, 1); + return 1; + } + + as_fatal (_("Addressing mode not implemented yet.")); + return 0; +} + +/* Assemble the 68HC12 register mode byte. */ +static int +build_reg_mode (op, format) + operand *op; + int format; +{ + unsigned char byte; + char *f; + + if (format & M6812_OP_SEX_MARKER + && op->reg1 != REG_A && op->reg1 != REG_B && op->reg1 != REG_CCR) + as_bad (_("Invalid source register for this instruction, use 'tfr'.")); + else if (op->reg1 == REG_NONE || op->reg1 == REG_PC) + as_bad (_("Invalid source register.")); + + if (format & M6812_OP_SEX_MARKER + && op->reg2 != REG_D + && op->reg2 != REG_X && op->reg2 != REG_Y && op->reg2 != REG_SP) + as_bad (_("Invalid destination register for this instruction, use 'tfr'.")); + else if (op->reg2 == REG_NONE || op->reg2 == REG_PC) + as_bad (_("Invalid destination register.")); + + byte = (op->reg1 << 4) | (op->reg2); + if (format & M6812_OP_EXG_MARKER) + byte |= 0x80; + + f = frag_more (1); + number_to_chars_bigendian (f, byte, 1); + return 1; +} + +/* build_insn takes a pointer to the opcode entry in the opcode table, + the array of operand expressions and builds the correspding instruction. + This operation only deals with non relative jumps insn (need special + handling). */ +static void +build_insn (opcode, operands, nb_operands) + struct m68hc11_opcode *opcode; + operand operands[]; + int nb_operands ATTRIBUTE_UNUSED; +{ + int i; + char *f; + int insn_size = 1; + long format; + int move_insn = 0; + + /* Put the page code instruction if there is one. */ + format = opcode->format; + if (format & OP_EXTENDED) + { + int page_code; + + f = m68hc11_new_insn (2); + if (format & M6811_OP_PAGE2) + page_code = M6811_OPCODE_PAGE2; + else if (format & M6811_OP_PAGE3) + page_code = M6811_OPCODE_PAGE3; + else + page_code = M6811_OPCODE_PAGE4; + + number_to_chars_bigendian (f, page_code, 1); + f++; + insn_size = 2; + } + else + f = m68hc11_new_insn (1); + + number_to_chars_bigendian (f, opcode->opcode, 1); + + i = 0; + + /* The 68HC12 movb and movw instructions are special. We have to handle + them in a special way. */ + if (format & (M6812_OP_IND16_P2 | M6812_OP_IDX_P2)) + { + move_insn = 1; + if (format & M6812_OP_IDX) + { + insn_size += build_indexed_byte (&operands[0], format, 1); + i = 1; + format &= ~M6812_OP_IDX; + } + if (format & M6812_OP_IDX_P2) + { + insn_size += build_indexed_byte (&operands[1], format, 1); + i = 0; + format &= ~M6812_OP_IDX_P2; + } + } + + if (format & (M6811_OP_DIRECT | M6811_OP_IMM8)) + { + insn_size++; + fixup8 (&operands[i].exp, + format & (M6811_OP_DIRECT | M6811_OP_IMM8 | M6812_OP_TRAP_ID), + operands[i].mode); + i++; + } + else if (format & (M6811_OP_IMM16 | M6811_OP_IND16)) + { + insn_size += 2; + fixup16 (&operands[i].exp, format & (M6811_OP_IMM16 | M6811_OP_IND16), + operands[i].mode); + i++; + } + else if (format & (M6811_OP_IX | M6811_OP_IY)) + { + if ((format & M6811_OP_IX) && (operands[0].reg1 != REG_X)) + as_bad (_("Invalid indexed register, expecting register X.")); + if ((format & M6811_OP_IY) && (operands[0].reg1 != REG_Y)) + as_bad (_("Invalid indexed register, expecting register Y.")); + + insn_size++; + fixup8 (&operands[0].exp, M6811_OP_IX, operands[0].mode); + i = 1; + } + else if (format & + (M6812_OP_IDX | M6812_OP_IDX_2 | M6812_OP_IDX_1 | M6812_OP_D_IDX)) + { + insn_size += build_indexed_byte (&operands[i], format, move_insn); + i++; + } + else if (format & M6812_OP_REG && current_architecture & cpu6812) + { + insn_size += build_reg_mode (&operands[i], format); + i++; + } + if (format & M6811_OP_BITMASK) + { + insn_size++; + fixup8 (&operands[i].exp, M6811_OP_BITMASK, operands[i].mode); + i++; + } + if (format & M6811_OP_JUMP_REL) + { + insn_size++; + fixup8 (&operands[i].exp, M6811_OP_JUMP_REL, operands[i].mode); + i++; + } + else if (format & M6812_OP_IND16_P2) + { + insn_size += 2; + fixup16 (&operands[1].exp, M6811_OP_IND16, operands[1].mode); + } +} + + +/* Opcode identification and operand analysis. */ + +/* find() gets a pointer to an entry in the opcode table. It must look at all + opcodes with the same name and use the operands to choose the correct + opcode. Returns the opcode pointer if there was a match and 0 if none. */ +static struct m68hc11_opcode * +find (opc, operands, nb_operands) + struct m68hc11_opcode_def *opc; + operand operands[]; + int nb_operands; +{ + int i, match, pos; + struct m68hc11_opcode *opcode; + struct m68hc11_opcode *op_indirect; + + op_indirect = 0; + opcode = opc->opcode; + + /* Now search the opcode table table for one with operands + that matches what we've got. We're only done if the operands matched so + far AND there are no more to check. */ + for (pos = match = 0; match == 0 && pos < opc->nb_modes; pos++, opcode++) + { + int poss_indirect = 0; + long format = opcode->format; + int expect; + + expect = 0; + if (opcode->format & M6811_OP_MASK) + expect++; + if (opcode->format & M6811_OP_BITMASK) + expect++; + if (opcode->format & (M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16)) + expect++; + if (opcode->format & (M6812_OP_IND16_P2 | M6812_OP_IDX_P2)) + expect++; + + for (i = 0; expect == nb_operands && i < nb_operands; i++) + { + int mode = operands[i].mode; + + if (mode & M6811_OP_IMM16) + { + if (format & + (M6811_OP_IMM8 | M6811_OP_IMM16 | M6811_OP_BITMASK)) + continue; + break; + } + if (mode == M6811_OP_DIRECT) + { + if (format & M6811_OP_DIRECT) + continue; + + /* If the operand is a page 0 operand, remember a + possible <abs-16> addressing mode. We mark + this and continue to check other operands. */ + if (format & M6811_OP_IND16 + && flag_strict_direct_addressing && op_indirect == 0) + { + poss_indirect = 1; + continue; + } + break; + } + if (mode & M6811_OP_IND16) + { + if (i == 0 && (format & M6811_OP_IND16) != 0) + continue; + if (i != 0 && (format & M6812_OP_IND16_P2) != 0) + continue; + if (i == 0 && (format & M6811_OP_BITMASK)) + break; + } + if (mode & (M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16)) + { + if (format & (M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16)) + continue; + } + if (mode & M6812_OP_REG) + { + if (i == 0 && format & M6812_OP_REG + && operands[i].reg2 == REG_NONE) + continue; + if (i == 0 && format & M6812_OP_REG + && format & M6812_OP_REG_2 && operands[i].reg2 != REG_NONE) + { + continue; + } + if (i == 0 && format & M6812_OP_D_IDX) + continue; + if (i == 0 && (format & M6812_OP_IDX) + && (format & (M6812_OP_IND16_P2 | M6812_OP_IDX_P2))) + continue; + if (i == 1 && format & M6812_OP_IDX_P2) + continue; + break; + } + if (mode & M6812_OP_IDX) + { + if (format & M6811_OP_IX && operands[i].reg1 == REG_X) + continue; + if (format & M6811_OP_IY && operands[i].reg1 == REG_Y) + continue; + if (i == 0 + && format & (M6812_OP_IDX | M6812_OP_IDX_1 | M6812_OP_IDX_2) + && (operands[i].reg1 == REG_X + || operands[i].reg1 == REG_Y + || operands[i].reg1 == REG_SP + || operands[i].reg1 == REG_PC)) + continue; + if (i == 1 && format & M6812_OP_IDX_P2) + continue; + } + if (mode & M6812_AUTO_INC_DEC) + { + if (i == 0 + && format & (M6812_OP_IDX | M6812_OP_IDX_1 | + M6812_OP_IDX_2)) + continue; + if (i == 1 && format & M6812_OP_IDX_P2) + continue; + } + break; + } + match = i == nb_operands; + + /* Operands are ok but an operand uses page 0 addressing mode + while the insn supports abs-16 mode. Keep a reference to this + insns in case there is no insn supporting page 0 addressing. */ + if (match && poss_indirect) + { + op_indirect = opcode; + match = 0; + } + if (match) + break; + } + + /* Page 0 addressing is used but not supported by any insn. + If absolute addresses are supported, we use that insn. */ + if (match == 0 && op_indirect) + { + opcode = op_indirect; + match = 1; + } + + if (!match) + { + return (0); + } + + return opcode; +} + + +/* Find the real opcode and its associated operands. We use a progressive + approach here. On entry, 'opc' points to the first opcode in the + table that matches the opcode name in the source line. We try to + isolate an operand, find a possible match in the opcode table. + We isolate another operand if no match were found. The table 'operands' + is filled while operands are recognized. + + Returns the opcode pointer that matches the opcode name in the + source line and the associated operands. */ +static struct m68hc11_opcode * +find_opcode (opc, operands, nb_operands) + struct m68hc11_opcode_def *opc; + operand operands[]; + int *nb_operands; +{ + struct m68hc11_opcode *opcode; + int i; + + if (opc->max_operands == 0) + { + *nb_operands = 0; + return opc->opcode; + } + + for (i = 0; i < opc->max_operands;) + { + int result; + + result = get_operand (&operands[i], i, opc->format); + if (result <= 0) + { + return 0; + } + + /* Special case where the bitmask of the bclr/brclr + instructions is not introduced by #. + Example: bclr 3,x $80. */ + if (i == 1 && (opc->format & M6811_OP_BITMASK) + && (operands[i].mode & M6811_OP_IND16)) + { + operands[i].mode = M6811_OP_IMM16; + } + + i += result; + *nb_operands = i; + if (i >= opc->min_operands) + { + opcode = find (opc, operands, i); + if (opcode) + { + return opcode; + } + } + + if (*input_line_pointer == ',') + input_line_pointer++; + } + return 0; +} + +#define M6812_XBCC_MARKER (M6812_OP_TBCC_MARKER \ + | M6812_OP_DBCC_MARKER \ + | M6812_OP_IBCC_MARKER) + + +/* Gas line assembler entry point. */ + +/* This is the main entry point for the machine-dependent assembler. str + points to a machine-dependent instruction. This function is supposed to + emit the frags/bytes it assembles to. */ +void +md_assemble (str) + char *str; +{ + struct m68hc11_opcode_def *opc; + struct m68hc11_opcode *opcode; + + unsigned char *op_start, *save; + unsigned char *op_end; + char name[20]; + int nlen = 0; + operand operands[M6811_MAX_OPERANDS]; + int nb_operands; + int branch_optimize = 0; + int alias_id = -1; + + /* Drop leading whitespace */ + while (*str == ' ') + str++; + + /* Find the opcode end and get the opcode in 'name'. The opcode is forced + lower case (the opcode table only has lower case op-codes). */ + for (op_start = op_end = (unsigned char *) (str); + *op_end && nlen < 20 && !is_end_of_line[*op_end] && *op_end != ' '; + op_end++) + { + name[nlen] = tolower (op_start[nlen]); + nlen++; + } + name[nlen] = 0; + + if (nlen == 0) + { + as_bad (_("No instruction or missing opcode.")); + return; + } + + /* Find the opcode definition given its name. */ + opc = (struct m68hc11_opcode_def *) hash_find (m68hc11_hash, name); + + /* If it's not recognized, look for 'jbsr' and 'jbxx'. These are + pseudo insns for relative branch. For these branchs, we always + optimize them (turned into absolute branchs) even if --short-branchs + is given. */ + if (opc == NULL && name[0] == 'j' && name[1] == 'b') + { + opc = (struct m68hc11_opcode_def *) hash_find (m68hc11_hash, &name[1]); + if (opc + && (!(opc->format & M6811_OP_JUMP_REL) + || (opc->format & M6811_OP_BITMASK))) + opc = 0; + if (opc) + branch_optimize = 1; + } + + /* The following test should probably be removed. This is not conform + to Motorola assembler specs. */ + if (opc == NULL && flag_mri) + { + if (*op_end == ' ' || *op_end == '\t') + { + while (*op_end == ' ' || *op_end == '\t') + op_end++; + + if (nlen < 19 + && (*op_end && + (is_end_of_line[op_end[1]] + || op_end[1] == ' ' || op_end[1] == '\t' + || !isalnum (op_end[1]))) + && (*op_end == 'a' || *op_end == 'b' + || *op_end == 'A' || *op_end == 'B' + || *op_end == 'd' || *op_end == 'D' + || *op_end == 'x' || *op_end == 'X' + || *op_end == 'y' || *op_end == 'Y')) + { + name[nlen++] = tolower (*op_end++); + name[nlen] = 0; + opc = (struct m68hc11_opcode_def *) hash_find (m68hc11_hash, + name); + } + } + } + + /* Identify a possible instruction alias. There are some on the + 68HC12 to emulate a fiew 68HC11 instructions. */ + if (opc == NULL && (current_architecture & cpu6812)) + { + int i; + + for (i = 0; i < m68hc12_num_alias; i++) + if (strcmp (m68hc12_alias[i].name, name) == 0) + { + alias_id = i; + break; + } + } + if (opc == NULL && alias_id < 0) + { + as_bad (_("Opcode `%s' is not recognized."), name); + return; + } + save = input_line_pointer; + input_line_pointer = op_end; + + if (opc) + { + opc->used++; + opcode = find_opcode (opc, operands, &nb_operands); + } + else + opcode = 0; + + if ((opcode || alias_id >= 0) && !flag_mri) + { + char *p = input_line_pointer; + + while (*p == ' ' || *p == '\t' || *p == '\n' || *p == '\r') + p++; + + if (*p != '\n' && *p) + as_bad (_("Garbage at end of instruction: `%s'."), p); + } + + input_line_pointer = save; + + if (alias_id >= 0) + { + char *f = m68hc11_new_insn (m68hc12_alias[alias_id].size); + + number_to_chars_bigendian (f, m68hc12_alias[alias_id].code1, 1); + if (m68hc12_alias[alias_id].size > 1) + number_to_chars_bigendian (f + 1, m68hc12_alias[alias_id].code2, 1); + + return; + } + + /* Opcode is known but does not have valid operands. Print out the + syntax for this opcode. */ + if (opcode == 0) + { + if (flag_print_insn_syntax) + print_insn_format (name); + + as_bad (_("Invalid operand for `%s'"), name); + return; + } + + /* Treat dbeq/ibeq/tbeq instructions in a special way. The branch is + relative and must be in the range -256..255 (9-bits). */ + if ((opcode->format & M6812_XBCC_MARKER) + && (opcode->format & M6811_OP_JUMP_REL)) + build_dbranch_insn (opcode, operands, nb_operands); + + /* Relative jumps instructions are taken care of separately. We have to make + sure that the relative branch is within the range -128..127. If it's out + of range, the instructions are changed into absolute instructions. + This is not supported for the brset and brclr instructions. */ + else if ((opcode->format & (M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16)) + && !(opcode->format & M6811_OP_BITMASK)) + build_jump_insn (opcode, operands, nb_operands, branch_optimize); + else + build_insn (opcode, operands, nb_operands); +} + + +/* Relocation, relaxation and frag conversions. */ + +long +md_pcrel_from_section (fixp, sec) + fixS *fixp; + segT sec; +{ + int adjust; + if (fixp->fx_addsy != (symbolS *) NULL + && (!S_IS_DEFINED (fixp->fx_addsy) + || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) + return 0; + + adjust = fixp->fx_pcrel_adjust; + return fixp->fx_frag->fr_address + fixp->fx_where + adjust; +} + +/* If while processing a fixup, a reloc really needs to be created + then it is done here. */ +arelent * +tc_gen_reloc (section, fixp) + asection *section; + fixS *fixp; +{ + arelent *reloc; + + reloc = (arelent *) xmalloc (sizeof (arelent)); + reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); + *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); + reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; + if (fixp->fx_r_type == 0) + reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_16); + else + reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); + if (reloc->howto == (reloc_howto_type *) NULL) + { + as_bad_where (fixp->fx_file, fixp->fx_line, + _("Relocation %d is not supported by object file format."), + (int) fixp->fx_r_type); + return NULL; + } + + if (!fixp->fx_pcrel) + reloc->addend = fixp->fx_addnumber; + else + reloc->addend = (section->vma + + (fixp->fx_pcrel_adjust == 64 + ? -1 : fixp->fx_pcrel_adjust) + + fixp->fx_addnumber + + md_pcrel_from_section (fixp, section)); + return reloc; +} + +void +md_convert_frag (abfd, sec, fragP) + bfd *abfd ATTRIBUTE_UNUSED; + asection *sec ATTRIBUTE_UNUSED; + fragS *fragP; +{ + fixS *fixp; + long disp; + char *buffer_address = fragP->fr_literal; + + /* Address in object code of the displacement. */ + register int object_address = fragP->fr_fix + fragP->fr_address; + + buffer_address += fragP->fr_fix; + + /* The displacement of the address, from current location. */ + disp = fragP->fr_symbol ? S_GET_VALUE (fragP->fr_symbol) : 0; + disp = (disp + fragP->fr_offset) - object_address; + disp += symbol_get_frag (fragP->fr_symbol)->fr_address; + + switch (fragP->fr_subtype) + { + case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE): + fragP->fr_opcode[1] = disp; + break; + + case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_WORD): + /* This relax is only for bsr and bra. */ + assert (IS_OPCODE (fragP->fr_opcode[0], M6811_BSR) + || IS_OPCODE (fragP->fr_opcode[0], M6811_BRA) + || IS_OPCODE (fragP->fr_opcode[0], M6812_BSR)); + + fragP->fr_opcode[0] = convert_branch (fragP->fr_opcode[0]); + + fix_new (fragP, fragP->fr_fix - 1, 2, + fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_16); + fragP->fr_fix += 1; + break; + + case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE): + case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH_6812, STATE_BYTE): + fragP->fr_opcode[1] = disp; + break; + + case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD): + /* Invert branch. */ + fragP->fr_opcode[0] ^= 1; + fragP->fr_opcode[1] = 3; /* Branch offset */ + buffer_address[0] = M6811_JMP; + fix_new (fragP, fragP->fr_fix + 1, 2, + fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_16); + fragP->fr_fix += 3; + break; + + case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH_6812, STATE_WORD): + /* Translate branch into a long branch. */ + fragP->fr_opcode[1] = fragP->fr_opcode[0]; + fragP->fr_opcode[0] = M6811_OPCODE_PAGE2; + + fixp = fix_new (fragP, fragP->fr_fix, 2, + fragP->fr_symbol, fragP->fr_offset, 1, + BFD_RELOC_16_PCREL); + fixp->fx_pcrel_adjust = 2; + fragP->fr_fix += 2; + break; + + case ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_BITS5): + fragP->fr_opcode[0] = fragP->fr_opcode[0] << 5; + fragP->fr_opcode[0] |= disp & 0x1f; + break; + + case ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_BITS9): + fragP->fr_opcode[0] = (fragP->fr_opcode[0] << 3); + fragP->fr_opcode[0] |= 0xE0; + fix_new (fragP, fragP->fr_fix + 1, 1, + fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_8); + fragP->fr_fix += 1; + break; + + case ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_BITS16): + fragP->fr_opcode[0] = (fragP->fr_opcode[0] << 3); + fragP->fr_opcode[0] |= 0xE2; + fix_new (fragP, fragP->fr_fix, 2, + fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_16); + fragP->fr_fix += 1; + break; + + case ENCODE_RELAX (STATE_XBCC_BRANCH, STATE_BYTE): + if (disp < 0) + fragP->fr_opcode[0] |= 0x10; + + fragP->fr_opcode[1] = disp & 0x0FF; + break; + + case ENCODE_RELAX (STATE_XBCC_BRANCH, STATE_WORD): + /* Invert branch. */ + fragP->fr_opcode[0] ^= 0x20; + fragP->fr_opcode[1] = 3; /* Branch offset. */ + buffer_address[0] = M6812_JMP; + fix_new (fragP, fragP->fr_fix + 1, 2, + fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_16); + fragP->fr_fix += 3; + break; + + default: + break; + } +} + +/* Force truly undefined symbols to their maximum size, and generally set up + the frag list to be relaxed. */ +int +md_estimate_size_before_relax (fragP, segment) + fragS *fragP; + asection *segment; +{ + int old_fr_fix; + char *buffer_address = fragP->fr_fix + fragP->fr_literal; + + old_fr_fix = fragP->fr_fix; + + switch (fragP->fr_subtype) + { + case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_UNDF): + + /* This relax is only for bsr and bra. */ + assert (IS_OPCODE (fragP->fr_opcode[0], M6811_BSR) + || IS_OPCODE (fragP->fr_opcode[0], M6811_BRA) + || IS_OPCODE (fragP->fr_opcode[0], M6812_BSR)); + + /* A relaxable case. */ + if (S_GET_SEGMENT (fragP->fr_symbol) == segment) + { + fragP->fr_subtype = ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE); + } + else + { + if (flag_fixed_branchs) + as_bad_where (fragP->fr_file, fragP->fr_line, + _("bra or bsr with undefined symbol.")); + + /* The symbol is undefined or in a separate section. Turn bra into a + jmp and bsr into a jsr. The insn becomes 3 bytes long (instead of + 2). A fixup is necessary for the unresolved symbol address. */ + + fragP->fr_opcode[0] = convert_branch (fragP->fr_opcode[0]); + + fragP->fr_fix++; + fix_new (fragP, old_fr_fix - 1, 2, fragP->fr_symbol, + fragP->fr_offset, 0, BFD_RELOC_16); + frag_wane (fragP); + } + break; + + case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF): + assert (current_architecture & cpu6811); + + if (S_GET_SEGMENT (fragP->fr_symbol) == segment) + { + fragP->fr_subtype = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, + STATE_BYTE); + } + else + { + fragP->fr_opcode[0] ^= 1; /* Reverse sense of branch. */ + fragP->fr_opcode[1] = 3; /* Skip next jmp insn (3 bytes) */ + + /* Don't use fr_opcode[2] because this may be + in a different frag. */ + buffer_address[0] = M6811_JMP; + + fragP->fr_fix++; + fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, + fragP->fr_offset, 0, BFD_RELOC_16); + fragP->fr_fix += 2; + frag_wane (fragP); + } + break; + + case ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_UNDF): + assert (current_architecture & cpu6812); + + if (S_GET_SEGMENT (fragP->fr_symbol) == segment) + { + fragP->fr_subtype = ENCODE_RELAX (STATE_INDEXED_OFFSET, + STATE_BITS5); + } + else + { + /* Switch the indexed operation to 16-bit mode. */ + if ((fragP->fr_opcode[1] & 0x21) == 0x20) + fragP->fr_opcode[1] = (fragP->fr_opcode[1] >> 3) | 0xc0 | 0x02; + + fragP->fr_fix++; + fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, + fragP->fr_offset, 0, BFD_RELOC_16); + fragP->fr_fix += 2; + frag_wane (fragP); + } + break; + + case ENCODE_RELAX (STATE_XBCC_BRANCH, STATE_UNDF): + assert (current_architecture & cpu6812); + + if (S_GET_SEGMENT (fragP->fr_symbol) == segment) + { + fragP->fr_subtype = ENCODE_RELAX (STATE_XBCC_BRANCH, STATE_BYTE); + } + else + { + fragP->fr_opcode[0] ^= 0x20; /* Reverse sense of branch. */ + fragP->fr_opcode[1] = 3; /* Skip next jmp insn (3 bytes). */ + + /* Don't use fr_opcode[2] because this may be + in a different frag. */ + buffer_address[0] = M6812_JMP; + + fragP->fr_fix++; + fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, + fragP->fr_offset, 0, BFD_RELOC_16); + fragP->fr_fix += 2; + frag_wane (fragP); + } + break; + + case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH_6812, STATE_UNDF): + assert (current_architecture & cpu6812); + + if (S_GET_SEGMENT (fragP->fr_symbol) == segment) + { + fragP->fr_subtype = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH_6812, + STATE_BYTE); + } + else + { + /* Translate into a lbcc branch. */ + fragP->fr_opcode[1] = fragP->fr_opcode[0]; + fragP->fr_opcode[0] = M6811_OPCODE_PAGE2; + + fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, + fragP->fr_offset, 0, BFD_RELOC_16_PCREL); + fragP->fr_fix += 2; + frag_wane (fragP); + } + break; + + default: + as_fatal (_("Subtype %d is not recognized."), fragP->fr_subtype); + } + + return (fragP->fr_fix - old_fr_fix); +} + +int +md_apply_fix (fixp, valuep) + fixS *fixp; + valueT *valuep; +{ + char *where; + long value; + int op_type; + + if (fixp->fx_addsy == (symbolS *) NULL) + { + value = *valuep; + fixp->fx_done = 1; + } + else if (fixp->fx_pcrel) + { + value = *valuep; + } + else + { + value = fixp->fx_offset; + if (fixp->fx_subsy != (symbolS *) NULL) + { + if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section) + { + value -= S_GET_VALUE (fixp->fx_subsy); + } + else + { + /* We don't actually support subtracting a symbol. */ + as_bad_where (fixp->fx_file, fixp->fx_line, + _("Expression too complex.")); + } + } + } + + op_type = fixp->fx_r_type; + + /* Patch the instruction with the resolved operand. Elf relocation + info will also be generated to take care of linker/loader fixups. + The 68HC11 addresses only 64Kb, we are only concerned by 8 and 16-bit + relocs. BFD_RELOC_8 is basically used for .page0 access (the linker + will warn for overflows). BFD_RELOC_8_PCREL should not be generated + because it's either resolved or turned out into non-relative insns (see + relax table, bcc, bra, bsr transformations) + + The BFD_RELOC_32 is necessary for the support of --gstabs. */ + where = fixp->fx_frag->fr_literal + fixp->fx_where; + + switch (fixp->fx_r_type) + { + case BFD_RELOC_32: + bfd_putb32 ((bfd_vma) value, (unsigned char *) where); + break; + + case BFD_RELOC_16: + case BFD_RELOC_16_PCREL: + bfd_putb16 ((bfd_vma) value, (unsigned char *) where); + if (value < -65537 || value > 65535) + as_bad_where (fixp->fx_file, fixp->fx_line, + _("Value out of 16-bit range.")); + break; + + case BFD_RELOC_M68HC11_HI8: + value = value >> 8; + /* Fall through */ + + case BFD_RELOC_M68HC11_LO8: + case BFD_RELOC_8: + /*bfd_putb8 ((bfd_vma) value, (unsigned char *) where); */ + ((bfd_byte *) where)[0] = (bfd_byte) value; + break; + + case BFD_RELOC_8_PCREL: + /*bfd_putb8 ((bfd_vma) value, (unsigned char *) where); */ + ((bfd_byte *) where)[0] = (bfd_byte) value; + + if (value < -128 || value > 127) + as_bad_where (fixp->fx_file, fixp->fx_line, + _("Value %ld too large for 8-bit PC-relative branch."), + value); + break; + + case BFD_RELOC_M68HC11_3B: + if (value <= 0 || value > 8) + as_bad_where (fixp->fx_file, fixp->fx_line, + _("Auto increment/decrement offset '%ld' is out of range."), + value); + if (where[0] & 0x8) + value = 8 - value; + else + value--; + + where[0] = where[0] | (value & 0x07); + break; + + default: + as_fatal (_("Line %d: unknown relocation type: 0x%x."), + fixp->fx_line, fixp->fx_r_type); + } + return 0; +} + +int +m68hc11_cleanup () +{ + return 1; +} + +void +m68hc11_end_of_source () +{ + segT saved_seg; + subsegT saved_subseg; + segT debug_info; + char* p; + long total_size = 0; + + if (debug_type != DEBUG_DWARF2) + return; + + dwarf2_finish (); + + saved_seg = now_seg; + saved_subseg = now_subseg; + + debug_info = subseg_new (".debug_info", 0); + bfd_set_section_flags (stdoutput, debug_info, SEC_READONLY); + subseg_set (debug_info, 0); + p = frag_more (10); + total_size = 12; + +# define STUFF(val,size) md_number_to_chars (p, val, size); p += size; + STUFF (total_size, 4); /* Length of compilation unit. */ + STUFF (2, 2); /* Dwarf version */ + STUFF (0, 4); + STUFF (2, 1); /* Pointer size */ + STUFF (1, 1); /* Compile unit */ + STUFF (0, 4); + + now_subseg = saved_subseg; + now_seg = saved_seg; +} diff --git a/gas/config/tc-m68hc11.h b/gas/config/tc-m68hc11.h new file mode 100644 index 0000000..2d4466a --- /dev/null +++ b/gas/config/tc-m68hc11.h @@ -0,0 +1,109 @@ +/* tc-m68hc11.h -- Header file for tc-m68hc11.c. + Copyright (C) 1999, 2000 Free Software Foundation, Inc. + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GAS; see the file COPYING. If not, write to the Free + Software Foundation, 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. */ + +#define TC_M68HC11 +#define TC_M68HC12 + +/* Define TC_M68K so that we can use the MRI mode. */ +#define TC_M68K + +#define TARGET_BYTES_BIG_ENDIAN 1 + +/* Motorola assembler specs does not require '.' before pseudo-ops. */ +#define NO_PSEUDO_DOT 1 + +#if 0 +/* Treat the single quote as a string delimiter. + ??? This does not work at all. */ +#define SINGLE_QUOTE_STRINGS 1 +#endif + +#ifndef BFD_ASSEMBLER +#error M68HC11 support requires BFD_ASSEMBLER +#endif + +/* The target BFD architecture. */ +#define TARGET_ARCH (m68hc11_arch ()) +extern enum bfd_architecture m68hc11_arch PARAMS ((void)); + +#define TARGET_MACH (m68hc11_mach ()) +extern int m68hc11_mach PARAMS ((void)); + +#define TARGET_FORMAT (m68hc11_arch_format ()) +extern const char *m68hc11_arch_format PARAMS ((void)); + +/* Specific sections: + - The .page0 is a data section that is mapped in [0x0000..0x00FF]. + Page0 accesses are faster on the M68HC11. Soft registers used by GCC-m6811 + are located in .page0. + - The .vectors is the data section that represents the interrupt + vectors. */ +#define ELF_TC_SPECIAL_SECTIONS \ + { ".page0", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, \ + { ".vectors", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, + +#define LISTING_WORD_SIZE 1 /* A word is 1 bytes */ +#define LISTING_LHS_WIDTH 4 /* One word on the first line */ +#define LISTING_LHS_WIDTH_SECOND 4 /* One word on the second line */ +#define LISTING_LHS_CONT_LINES 4 /* And 4 lines max */ +#define LISTING_HEADER "M68HC11 GAS " + +/* call md_pcrel_from_section, not md_pcrel_from */ +#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section(FIXP, SEC) + +/* Permit temporary numeric labels. */ +#define LOCAL_LABELS_FB 1 + +#define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs */ + +extern void m68hc11_init_after_args PARAMS ((void)); +#define tc_init_after_args m68hc11_init_after_args + +extern int m68hc11_parse_long_option PARAMS ((char *)); +#define md_parse_long_option m68hc11_parse_long_option + +extern void m68hc11_end_of_source PARAMS ((void)); +#define md_end() m68hc11_end_of_source () + +#define DWARF2_LINE_MIN_INSN_LENGTH 1 + +/* We don't need to handle .word strangely. */ +#define WORKING_DOT_WORD + +#define md_number_to_chars number_to_chars_bigendian + +/* Relax table to translate short relative branches (-128..127) into + absolute branches. */ +extern struct relax_type md_relax_table[]; +#define TC_GENERIC_RELAX_TABLE md_relax_table + +extern int m68hc11_cleanup PARAMS ((void)); + +#define md_operand(x) +#define md_after_pass_hook() m68hc11_cleanup() +#define md_cleanup() m68hc11_cleanup() +#define md_do_align(a,b,c,d,e) m68hc11_cleanup() +#define tc_frob_label(sym) do {\ + m68hc11_cleanup(); \ + S_SET_VALUE (sym, (valueT) frag_now_fix ()); \ +} while (0) + +#define tc_print_statistics m68hc11_print_statistics +extern void m68hc11_print_statistics PARAMS ((FILE *)); diff --git a/gas/configure b/gas/configure index 3e1cead..f6c7971 100755 --- a/gas/configure +++ b/gas/configure @@ -1660,6 +1660,7 @@ for this_target in $target $canon_targets ; do hppa*) cpu_type=hppa ;; i[456]86) cpu_type=i386 ;; ia64) cpu_type=ia64 ;; + m6811|m6812) cpu_type=m68hc11 ;; m680[012346]0) cpu_type=m68k ;; m68008) cpu_type=m68k ;; m683??) cpu_type=m68k ;; @@ -1811,6 +1812,8 @@ EOF m32r-*-*) fmt=elf bfd_gas=yes ;; + m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*)fmt=elf bfd_gas=yes ;; + m68k-*-vxworks* | m68k-ericsson-ose | m68k-*-sunos*) fmt=aout em=sun3 ;; m68k-motorola-sysv*) fmt=coff em=delta ;; @@ -2430,7 +2433,7 @@ EOF # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2434: checking for $ac_word" >&5 +echo "configure:2437: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2460,7 +2463,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2464: checking for $ac_word" >&5 +echo "configure:2467: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2511,7 +2514,7 @@ fi # Extract the first word of "cl", so it can be a program name with args. set dummy cl; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2515: checking for $ac_word" >&5 +echo "configure:2518: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2543,7 +2546,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:2547: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:2550: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -2554,12 +2557,12 @@ cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext << EOF -#line 2558 "configure" +#line 2561 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:2563: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2566: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -2585,12 +2588,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:2589: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:2592: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:2594: checking whether we are using GNU C" >&5 +echo "configure:2597: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2599,7 +2602,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:2603: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:2606: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -2618,7 +2621,7 @@ ac_test_CFLAGS="${CFLAGS+set}" ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:2622: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:2625: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2655,7 +2658,7 @@ do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2659: checking for $ac_word" >&5 +echo "configure:2662: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_YACC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2686,7 +2689,7 @@ done test -n "$YACC" || YACC="yacc" echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 -echo "configure:2690: checking how to run the C preprocessor" >&5 +echo "configure:2693: checking how to run the C preprocessor" >&5 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= @@ -2701,13 +2704,13 @@ else # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. cat > conftest.$ac_ext <<EOF -#line 2705 "configure" +#line 2708 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2711: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:2714: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -2718,13 +2721,13 @@ else rm -rf conftest* CPP="${CC-cc} -E -traditional-cpp" cat > conftest.$ac_ext <<EOF -#line 2722 "configure" +#line 2725 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2728: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:2731: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -2735,13 +2738,13 @@ else rm -rf conftest* CPP="${CC-cc} -nologo -E" cat > conftest.$ac_ext <<EOF -#line 2739 "configure" +#line 2742 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2745: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:2748: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -2771,7 +2774,7 @@ do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2775: checking for $ac_word" >&5 +echo "configure:2778: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2804,7 +2807,7 @@ test -n "$LEX" || LEX=""$missing_dir/missing flex"" # Extract the first word of "flex", so it can be a program name with args. set dummy flex; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2808: checking for $ac_word" >&5 +echo "configure:2811: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2838,7 +2841,7 @@ then *) ac_lib=l ;; esac echo $ac_n "checking for yywrap in -l$ac_lib""... $ac_c" 1>&6 -echo "configure:2842: checking for yywrap in -l$ac_lib" >&5 +echo "configure:2845: checking for yywrap in -l$ac_lib" >&5 ac_lib_var=`echo $ac_lib'_'yywrap | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -2846,7 +2849,7 @@ else ac_save_LIBS="$LIBS" LIBS="-l$ac_lib $LIBS" cat > conftest.$ac_ext <<EOF -#line 2850 "configure" +#line 2853 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -2857,7 +2860,7 @@ int main() { yywrap() ; return 0; } EOF -if { (eval echo configure:2861: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2864: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -2880,7 +2883,7 @@ fi fi echo $ac_n "checking lex output file root""... $ac_c" 1>&6 -echo "configure:2884: checking lex output file root" >&5 +echo "configure:2887: checking lex output file root" >&5 if eval "test \"`echo '$''{'ac_cv_prog_lex_root'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2901,7 +2904,7 @@ echo "$ac_t""$ac_cv_prog_lex_root" 1>&6 LEX_OUTPUT_ROOT=$ac_cv_prog_lex_root echo $ac_n "checking whether yytext is a pointer""... $ac_c" 1>&6 -echo "configure:2905: checking whether yytext is a pointer" >&5 +echo "configure:2908: checking whether yytext is a pointer" >&5 if eval "test \"`echo '$''{'ac_cv_prog_lex_yytext_pointer'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2913,14 +2916,14 @@ echo 'extern char *yytext;' >>$LEX_OUTPUT_ROOT.c ac_save_LIBS="$LIBS" LIBS="$LIBS $LEXLIB" cat > conftest.$ac_ext <<EOF -#line 2917 "configure" +#line 2920 "configure" #include "confdefs.h" `cat $LEX_OUTPUT_ROOT.c` int main() { ; return 0; } EOF -if { (eval echo configure:2924: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2927: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_prog_lex_yytext_pointer=yes else @@ -2944,7 +2947,7 @@ fi ALL_LINGUAS= echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6 -echo "configure:2948: checking for POSIXized ISC" >&5 +echo "configure:2951: checking for POSIXized ISC" >&5 if test -d /etc/conf/kconfig.d && grep _POSIX_VERSION /usr/include/sys/unistd.h >/dev/null 2>&1 then @@ -2965,12 +2968,12 @@ else fi echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6 -echo "configure:2969: checking for ANSI C header files" >&5 +echo "configure:2972: checking for ANSI C header files" >&5 if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2974 "configure" +#line 2977 "configure" #include "confdefs.h" #include <stdlib.h> #include <stdarg.h> @@ -2978,7 +2981,7 @@ else #include <float.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2982: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:2985: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -2995,7 +2998,7 @@ rm -f conftest* if test $ac_cv_header_stdc = yes; then # SunOS 4.x string.h does not declare mem*, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 2999 "configure" +#line 3002 "configure" #include "confdefs.h" #include <string.h> EOF @@ -3013,7 +3016,7 @@ fi if test $ac_cv_header_stdc = yes; then # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 3017 "configure" +#line 3020 "configure" #include "confdefs.h" #include <stdlib.h> EOF @@ -3034,7 +3037,7 @@ if test "$cross_compiling" = yes; then : else cat > conftest.$ac_ext <<EOF -#line 3038 "configure" +#line 3041 "configure" #include "confdefs.h" #include <ctype.h> #define ISLOWER(c) ('a' <= (c) && (c) <= 'z') @@ -3045,7 +3048,7 @@ if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); exit (0); } EOF -if { (eval echo configure:3049: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3052: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then : else @@ -3069,12 +3072,12 @@ EOF fi echo $ac_n "checking for working const""... $ac_c" 1>&6 -echo "configure:3073: checking for working const" >&5 +echo "configure:3076: checking for working const" >&5 if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3078 "configure" +#line 3081 "configure" #include "confdefs.h" int main() { @@ -3123,7 +3126,7 @@ ccp = (char const *const *) p; ; return 0; } EOF -if { (eval echo configure:3127: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3130: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_const=yes else @@ -3144,21 +3147,21 @@ EOF fi echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:3148: checking for inline" >&5 +echo "configure:3151: checking for inline" >&5 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat > conftest.$ac_ext <<EOF -#line 3155 "configure" +#line 3158 "configure" #include "confdefs.h" int main() { } $ac_kw foo() { ; return 0; } EOF -if { (eval echo configure:3162: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3165: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_inline=$ac_kw; break else @@ -3184,12 +3187,12 @@ EOF esac echo $ac_n "checking for off_t""... $ac_c" 1>&6 -echo "configure:3188: checking for off_t" >&5 +echo "configure:3191: checking for off_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3193 "configure" +#line 3196 "configure" #include "confdefs.h" #include <sys/types.h> #if STDC_HEADERS @@ -3217,12 +3220,12 @@ EOF fi echo $ac_n "checking for size_t""... $ac_c" 1>&6 -echo "configure:3221: checking for size_t" >&5 +echo "configure:3224: checking for size_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3226 "configure" +#line 3229 "configure" #include "confdefs.h" #include <sys/types.h> #if STDC_HEADERS @@ -3252,19 +3255,19 @@ fi # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:3256: checking for working alloca.h" >&5 +echo "configure:3259: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3261 "configure" +#line 3264 "configure" #include "confdefs.h" #include <alloca.h> int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:3268: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3271: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -3285,12 +3288,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:3289: checking for alloca" >&5 +echo "configure:3292: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3294 "configure" +#line 3297 "configure" #include "confdefs.h" #ifdef __GNUC__ @@ -3318,7 +3321,7 @@ int main() { char *p = (char *) alloca(1); ; return 0; } EOF -if { (eval echo configure:3322: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3325: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -3350,12 +3353,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:3354: checking whether alloca needs Cray hooks" >&5 +echo "configure:3357: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3359 "configure" +#line 3362 "configure" #include "confdefs.h" #if defined(CRAY) && ! defined(CRAY2) webecray @@ -3380,12 +3383,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3384: checking for $ac_func" >&5 +echo "configure:3387: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3389 "configure" +#line 3392 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -3408,7 +3411,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:3412: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3415: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3435,7 +3438,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:3439: checking stack direction for C alloca" >&5 +echo "configure:3442: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3443,7 +3446,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <<EOF -#line 3447 "configure" +#line 3450 "configure" #include "confdefs.h" find_stack_direction () { @@ -3462,7 +3465,7 @@ main () exit (find_stack_direction() < 0); } EOF -if { (eval echo configure:3466: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3469: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -3487,17 +3490,17 @@ for ac_hdr in unistd.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:3491: checking for $ac_hdr" >&5 +echo "configure:3494: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3496 "configure" +#line 3499 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3501: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3504: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3526,12 +3529,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3530: checking for $ac_func" >&5 +echo "configure:3533: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3535 "configure" +#line 3538 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -3554,7 +3557,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:3558: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3561: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3579,7 +3582,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:3583: checking for working mmap" >&5 +echo "configure:3586: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3587,7 +3590,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext <<EOF -#line 3591 "configure" +#line 3594 "configure" #include "confdefs.h" /* Thanks to Mike Haertel and Jim Avera for this test. @@ -3727,7 +3730,7 @@ main() } EOF -if { (eval echo configure:3731: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3734: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -3755,17 +3758,17 @@ unistd.h values.h sys/param.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:3759: checking for $ac_hdr" >&5 +echo "configure:3762: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3764 "configure" +#line 3767 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3769: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3772: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3795,12 +3798,12 @@ done __argz_count __argz_stringify __argz_next do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3799: checking for $ac_func" >&5 +echo "configure:3802: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3804 "configure" +#line 3807 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -3823,7 +3826,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:3827: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3830: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3852,12 +3855,12 @@ done for ac_func in stpcpy do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3856: checking for $ac_func" >&5 +echo "configure:3859: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3861 "configure" +#line 3864 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -3880,7 +3883,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:3884: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3887: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3914,19 +3917,19 @@ EOF if test $ac_cv_header_locale_h = yes; then echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6 -echo "configure:3918: checking for LC_MESSAGES" >&5 +echo "configure:3921: checking for LC_MESSAGES" >&5 if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3923 "configure" +#line 3926 "configure" #include "confdefs.h" #include <locale.h> int main() { return LC_MESSAGES ; return 0; } EOF -if { (eval echo configure:3930: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3933: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* am_cv_val_LC_MESSAGES=yes else @@ -3947,7 +3950,7 @@ EOF fi fi echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6 -echo "configure:3951: checking whether NLS is requested" >&5 +echo "configure:3954: checking whether NLS is requested" >&5 # Check whether --enable-nls or --disable-nls was given. if test "${enable_nls+set}" = set; then enableval="$enable_nls" @@ -3967,7 +3970,7 @@ fi EOF echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6 -echo "configure:3971: checking whether included gettext is requested" >&5 +echo "configure:3974: checking whether included gettext is requested" >&5 # Check whether --with-included-gettext or --without-included-gettext was given. if test "${with_included_gettext+set}" = set; then withval="$with_included_gettext" @@ -3986,17 +3989,17 @@ fi ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for libintl.h""... $ac_c" 1>&6 -echo "configure:3990: checking for libintl.h" >&5 +echo "configure:3993: checking for libintl.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3995 "configure" +#line 3998 "configure" #include "confdefs.h" #include <libintl.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4000: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4003: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4013,19 +4016,19 @@ fi if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6 -echo "configure:4017: checking for gettext in libc" >&5 +echo "configure:4020: checking for gettext in libc" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4022 "configure" +#line 4025 "configure" #include "confdefs.h" #include <libintl.h> int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:4029: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4032: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libc=yes else @@ -4041,7 +4044,7 @@ echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6 if test "$gt_cv_func_gettext_libc" != "yes"; then echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6 -echo "configure:4045: checking for bindtextdomain in -lintl" >&5 +echo "configure:4048: checking for bindtextdomain in -lintl" >&5 ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -4049,7 +4052,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lintl $LIBS" cat > conftest.$ac_ext <<EOF -#line 4053 "configure" +#line 4056 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -4060,7 +4063,7 @@ int main() { bindtextdomain() ; return 0; } EOF -if { (eval echo configure:4064: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4067: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -4076,19 +4079,19 @@ fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6 -echo "configure:4080: checking for gettext in libintl" >&5 +echo "configure:4083: checking for gettext in libintl" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4085 "configure" +#line 4088 "configure" #include "confdefs.h" int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:4092: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4095: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libintl=yes else @@ -4116,7 +4119,7 @@ EOF # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4120: checking for $ac_word" >&5 +echo "configure:4123: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4150,12 +4153,12 @@ fi for ac_func in dcgettext do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4154: checking for $ac_func" >&5 +echo "configure:4157: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4159 "configure" +#line 4162 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4178,7 +4181,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4182: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4185: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4205,7 +4208,7 @@ done # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4209: checking for $ac_word" >&5 +echo "configure:4212: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4241,7 +4244,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4245: checking for $ac_word" >&5 +echo "configure:4248: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4273,7 +4276,7 @@ else fi cat > conftest.$ac_ext <<EOF -#line 4277 "configure" +#line 4280 "configure" #include "confdefs.h" int main() { @@ -4281,7 +4284,7 @@ extern int _nl_msg_cat_cntr; return _nl_msg_cat_cntr ; return 0; } EOF -if { (eval echo configure:4285: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4288: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* CATOBJEXT=.gmo DATADIRNAME=share @@ -4313,7 +4316,7 @@ fi # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4317: checking for $ac_word" >&5 +echo "configure:4320: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4347,7 +4350,7 @@ fi # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4351: checking for $ac_word" >&5 +echo "configure:4354: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4383,7 +4386,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4387: checking for $ac_word" >&5 +echo "configure:4390: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4473,7 +4476,7 @@ fi LINGUAS= else echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6 -echo "configure:4477: checking for catalogs to be installed" >&5 +echo "configure:4480: checking for catalogs to be installed" >&5 NEW_LINGUAS= for lang in ${LINGUAS=$ALL_LINGUAS}; do case "$ALL_LINGUAS" in @@ -4501,17 +4504,17 @@ echo "configure:4477: checking for catalogs to be installed" >&5 if test "$CATOBJEXT" = ".cat"; then ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6 -echo "configure:4505: checking for linux/version.h" >&5 +echo "configure:4508: checking for linux/version.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4510 "configure" +#line 4513 "configure" #include "confdefs.h" #include <linux/version.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4515: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4518: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4574,7 +4577,7 @@ fi echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 -echo "configure:4578: checking whether to enable maintainer-specific portions of Makefiles" >&5 +echo "configure:4581: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" @@ -4597,12 +4600,12 @@ fi echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6 -echo "configure:4601: checking for Cygwin environment" >&5 +echo "configure:4604: checking for Cygwin environment" >&5 if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4606 "configure" +#line 4609 "configure" #include "confdefs.h" int main() { @@ -4613,7 +4616,7 @@ int main() { return __CYGWIN__; ; return 0; } EOF -if { (eval echo configure:4617: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:4620: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_cygwin=yes else @@ -4630,19 +4633,19 @@ echo "$ac_t""$ac_cv_cygwin" 1>&6 CYGWIN= test "$ac_cv_cygwin" = yes && CYGWIN=yes echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6 -echo "configure:4634: checking for mingw32 environment" >&5 +echo "configure:4637: checking for mingw32 environment" >&5 if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4639 "configure" +#line 4642 "configure" #include "confdefs.h" int main() { return __MINGW32__; ; return 0; } EOF -if { (eval echo configure:4646: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:4649: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_mingw32=yes else @@ -4661,7 +4664,7 @@ test "$ac_cv_mingw32" = yes && MINGW32=yes echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 -echo "configure:4665: checking for executable suffix" >&5 +echo "configure:4668: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4671,7 +4674,7 @@ else rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= - if { (eval echo configure:4675: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then + if { (eval echo configure:4678: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in *.c | *.o | *.obj | *.ilk | *.pdb) ;; @@ -4696,17 +4699,17 @@ for ac_hdr in string.h stdlib.h memory.h strings.h unistd.h stdarg.h varargs.h e do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:4700: checking for $ac_hdr" >&5 +echo "configure:4703: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4705 "configure" +#line 4708 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4710: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4713: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4736,7 +4739,7 @@ done # Put this here so that autoconf's "cross-compiling" message doesn't confuse # people who are not cross-compiling but are compiling cross-assemblers. echo $ac_n "checking whether compiling a cross-assembler""... $ac_c" 1>&6 -echo "configure:4740: checking whether compiling a cross-assembler" >&5 +echo "configure:4743: checking whether compiling a cross-assembler" >&5 if test "${host}" = "${target}"; then cross_gas=no else @@ -4751,19 +4754,19 @@ echo "$ac_t""$cross_gas" 1>&6 # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:4755: checking for working alloca.h" >&5 +echo "configure:4758: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4760 "configure" +#line 4763 "configure" #include "confdefs.h" #include <alloca.h> int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:4767: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4770: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -4784,12 +4787,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:4788: checking for alloca" >&5 +echo "configure:4791: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4793 "configure" +#line 4796 "configure" #include "confdefs.h" #ifdef __GNUC__ @@ -4817,7 +4820,7 @@ int main() { char *p = (char *) alloca(1); ; return 0; } EOF -if { (eval echo configure:4821: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4824: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -4849,12 +4852,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:4853: checking whether alloca needs Cray hooks" >&5 +echo "configure:4856: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4858 "configure" +#line 4861 "configure" #include "confdefs.h" #if defined(CRAY) && ! defined(CRAY2) webecray @@ -4879,12 +4882,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4883: checking for $ac_func" >&5 +echo "configure:4886: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4888 "configure" +#line 4891 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4907,7 +4910,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4911: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4914: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4934,7 +4937,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:4938: checking stack direction for C alloca" >&5 +echo "configure:4941: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4942,7 +4945,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <<EOF -#line 4946 "configure" +#line 4949 "configure" #include "confdefs.h" find_stack_direction () { @@ -4961,7 +4964,7 @@ main () exit (find_stack_direction() < 0); } EOF -if { (eval echo configure:4965: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4968: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -4983,21 +4986,21 @@ EOF fi echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:4987: checking for inline" >&5 +echo "configure:4990: checking for inline" >&5 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat > conftest.$ac_ext <<EOF -#line 4994 "configure" +#line 4997 "configure" #include "confdefs.h" int main() { } $ac_kw foo() { ; return 0; } EOF -if { (eval echo configure:5001: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:5004: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_inline=$ac_kw; break else @@ -5027,12 +5030,12 @@ esac for ac_func in unlink remove do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5031: checking for $ac_func" >&5 +echo "configure:5034: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5036 "configure" +#line 5039 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -5055,7 +5058,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:5059: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5062: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5084,12 +5087,12 @@ done for ac_func in sbrk do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5088: checking for $ac_func" >&5 +echo "configure:5091: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5093 "configure" +#line 5096 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -5112,7 +5115,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:5116: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5119: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5141,12 +5144,12 @@ done # enough, but on some of those systems, the assert macro relies on requoting # working properly! echo $ac_n "checking for working assert macro""... $ac_c" 1>&6 -echo "configure:5145: checking for working assert macro" >&5 +echo "configure:5148: checking for working assert macro" >&5 if eval "test \"`echo '$''{'gas_cv_assert_ok'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5150 "configure" +#line 5153 "configure" #include "confdefs.h" #include <assert.h> #include <stdio.h> @@ -5162,7 +5165,7 @@ assert (a == b ; return 0; } EOF -if { (eval echo configure:5166: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5169: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_assert_ok=yes else @@ -5203,12 +5206,12 @@ gas_test_headers=" " echo $ac_n "checking whether declaration is required for strstr""... $ac_c" 1>&6 -echo "configure:5207: checking whether declaration is required for strstr" >&5 +echo "configure:5210: checking whether declaration is required for strstr" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_strstr'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5212 "configure" +#line 5215 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -5219,7 +5222,7 @@ x = (f) strstr; ; return 0; } EOF -if { (eval echo configure:5223: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5226: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_strstr=no else @@ -5240,12 +5243,12 @@ fi echo $ac_n "checking whether declaration is required for malloc""... $ac_c" 1>&6 -echo "configure:5244: checking whether declaration is required for malloc" >&5 +echo "configure:5247: checking whether declaration is required for malloc" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_malloc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5249 "configure" +#line 5252 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -5256,7 +5259,7 @@ x = (f) malloc; ; return 0; } EOF -if { (eval echo configure:5260: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5263: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_malloc=no else @@ -5277,12 +5280,12 @@ fi echo $ac_n "checking whether declaration is required for free""... $ac_c" 1>&6 -echo "configure:5281: checking whether declaration is required for free" >&5 +echo "configure:5284: checking whether declaration is required for free" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_free'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5286 "configure" +#line 5289 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -5293,7 +5296,7 @@ x = (f) free; ; return 0; } EOF -if { (eval echo configure:5297: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5300: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_free=no else @@ -5314,12 +5317,12 @@ fi echo $ac_n "checking whether declaration is required for sbrk""... $ac_c" 1>&6 -echo "configure:5318: checking whether declaration is required for sbrk" >&5 +echo "configure:5321: checking whether declaration is required for sbrk" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_sbrk'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5323 "configure" +#line 5326 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -5330,7 +5333,7 @@ x = (f) sbrk; ; return 0; } EOF -if { (eval echo configure:5334: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5337: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_sbrk=no else @@ -5351,12 +5354,12 @@ fi echo $ac_n "checking whether declaration is required for environ""... $ac_c" 1>&6 -echo "configure:5355: checking whether declaration is required for environ" >&5 +echo "configure:5358: checking whether declaration is required for environ" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_environ'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5360 "configure" +#line 5363 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -5367,7 +5370,7 @@ x = (f) environ; ; return 0; } EOF -if { (eval echo configure:5371: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5374: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_environ=no else @@ -5391,12 +5394,12 @@ fi # for it? echo $ac_n "checking whether declaration is required for errno""... $ac_c" 1>&6 -echo "configure:5395: checking whether declaration is required for errno" >&5 +echo "configure:5398: checking whether declaration is required for errno" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_errno'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5400 "configure" +#line 5403 "configure" #include "confdefs.h" #ifdef HAVE_ERRNO_H @@ -5411,7 +5414,7 @@ x = (f) errno; ; return 0; } EOF -if { (eval echo configure:5415: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5418: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_errno=no else diff --git a/gas/configure.in b/gas/configure.in index f322cb0..30b7f6d 100644 --- a/gas/configure.in +++ b/gas/configure.in @@ -122,6 +122,7 @@ changequote([,])dnl changequote(,)dnl i[456]86) cpu_type=i386 ;; ia64) cpu_type=ia64 ;; + m6811|m6812) cpu_type=m68hc11 ;; m680[012346]0) cpu_type=m68k ;; changequote([,])dnl m68008) cpu_type=m68k ;; @@ -274,6 +275,8 @@ changequote([,])dnl m32r-*-*) fmt=elf bfd_gas=yes ;; + m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*)fmt=elf bfd_gas=yes ;; + m68k-*-vxworks* | m68k-ericsson-ose | m68k-*-sunos*) fmt=aout em=sun3 ;; m68k-motorola-sysv*) fmt=coff em=delta ;; diff --git a/gas/doc/Makefile.am b/gas/doc/Makefile.am index c6eaf77..65d7d6e 100644 --- a/gas/doc/Makefile.am +++ b/gas/doc/Makefile.am @@ -26,6 +26,7 @@ CPU_DOCS = \ c-i386.texi \ c-i960.texi \ c-m32r.texi \ + c-m68hc11.texi \ c-m68k.texi \ c-mips.texi \ c-ns32k.texi \ diff --git a/gas/doc/Makefile.in b/gas/doc/Makefile.in index 48f4e08..6336678 100644 --- a/gas/doc/Makefile.in +++ b/gas/doc/Makefile.in @@ -129,6 +129,7 @@ CPU_DOCS = \ c-i386.texi \ c-i960.texi \ c-m32r.texi \ + c-m68hc11.texi \ c-m68k.texi \ c-mips.texi \ c-ns32k.texi \ @@ -164,7 +165,7 @@ DIST_COMMON = Makefile.am Makefile.in DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST) -TAR = tar +TAR = gtar GZIP_ENV = --best all: all-redirect .SUFFIXES: diff --git a/gas/doc/all.texi b/gas/doc/all.texi index d1058fb..14f735d 100644 --- a/gas/doc/all.texi +++ b/gas/doc/all.texi @@ -37,6 +37,7 @@ @set I80386 @set I960 @set M32R +@set M68HC11 @set M680X0 @set MCORE @set MIPS diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index 20efcd3..62f8868 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -267,6 +267,11 @@ Here is a brief summary of how to invoke @code{@value{AS}}. For details, [ -jsri2bsr ] [ -sifilter ] [ -relax ] [ -mcpu=[210|340] ] @end ifset +@ifset M68HC11 + [ -m68hc11 | -m68hc12 ] + [ --force-long-branchs ] [ --short-branchs ] [ --strict-direct-mode ] + [ --print-insn-syntax ] [ --print-opcodes ] [ --generate-example ] +@end ifset @ifset MIPS [ -nocpp ] [ -EL ] [ -EB ] [ -G @var{num} ] [ -mcpu=@var{CPU} ] [ -mips1 ] [ -mips2 ] [ -mips3 ] [ -m4650 ] [ -no-m4650 ] @@ -558,6 +563,42 @@ Generate ``little endian'' format output. @end table @end ifset +@ifset M68HC11 +The following options are available when @value{AS} is configured for the +Motorola 68HC11 or 68HC12 series. + +@table @code + +@item -m68hc11 | -m68hc12 +Specify what processor is the target. The default is +defined by the configuration option when building the assembler. + +@item --force-long-branchs +Relative branches are turned into absolute ones. This concerns +conditional branches, unconditional branches and branches to a +sub routine. + +@item -S | --short-branchs +Do not turn relative branchs into absolute ones +when the offset is out of range. + +@item --strict-direct-mode +Do not turn the direct addressing mode into extended addressing mode +when the instruction does not support direct addressing mode. + +@item --print-insn-syntax +Print the syntax of instruction in case of error. + +@item --print-opcodes +print the list of instructions with syntax and then exit. + +@item --generate-example +print an example of instruction for each possible instruction and then exit. +This option is only useful for testing @code{@value{AS}}. + +@end table +@end ifset + @ifset SPARC The following options are available when @code{@value{AS}} is configured for the SPARC architecture: @@ -1614,6 +1655,9 @@ is considered a comment and is ignored. The line comment character is @ifset M680X0 @samp{|} on the 680x0; @end ifset +@ifset M68HC11 +@samp{#} on the 68HC11 and 68HC12; +@end ifset @ifset VAX @samp{#} on the Vax; @end ifset @@ -4972,6 +5016,9 @@ subject, see the hardware manufacturer's manual. @ifset M680X0 * M68K-Dependent:: M680x0 Dependent Features @end ifset +@ifset M68HC11 +* M68HC11-Dependent:: M68HC11 and 68HC12 Dependent Features +@end ifset @ifset MIPS * MIPS-Dependent:: MIPS Dependent Features @end ifset @@ -5150,6 +5197,10 @@ family. @include c-m68k.texi @end ifset +@ifset M68HC11 +@include c-m68hc11.texi +@end ifset + @ifset MIPS @include c-mips.texi @end ifset diff --git a/gas/doc/c-m68hc11.texi b/gas/doc/c-m68hc11.texi new file mode 100644 index 0000000..df80f8d --- /dev/null +++ b/gas/doc/c-m68hc11.texi @@ -0,0 +1,235 @@ +@c Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. +@c This is part of the GAS manual. +@c For copying conditions, see the file as.texinfo. +@ifset GENERIC +@page +@node M68HC11-Dependent +@chapter M68HC11 and M68HC12 Dependent Features +@end ifset +@ifclear GENERIC +@node Machine Dependencies +@chapter M68HC11 and M68HC12 Dependent Features +@end ifclear + +@cindex M68HC11 and M68HC12 support +@menu +* M68HC11-Opts:: M68HC11 and M68HC12 Options +* M68HC11-Syntax:: Syntax +* M68HC11-Float:: Floating Point +* M68HC11-opcodes:: Opcodes +@end menu + +@node M68HC11-Opts +@section M68HC11 and M68HC12 Options + +@cindex options, M68HC11 +@cindex M68HC11 options +The Motorola 68HC11 and 68HC12 version of @code{@value{AS}} has a few machine +dependent options. + +@cindex @samp{-m68hc11} +This option switches the assembler in the M68HC11 mode. In this mode, +the assembler only accepts 68HC11 operands and mnemonics. It produces +code for the 68HC11. + +@cindex @samp{-m68hc12} +This option switches the assembler in the M68HC12 mode. In this mode, +the assembler also accepts 68HC12 operands and mnemonics. It produces +code for the 68HC12. A fiew 68HC11 instructions are replaced by +some 68HC12 instructions as recommended by Motorola specifications. + +@cindex @samp{--strict-direct-mode} +You can use the @samp{--strict-direct-mode} option to disable +the automatic translation of direct page mode addressing into +extended mode when the instruction does not support direct mode. +For example, the @samp{clr} instruction does not support direct page +mode addressing. When it is used with the direct page mode, +@code{@value{AS}} will ignore it and generate an absolute addressing. +This option prevents @code{@value{AS}} from doing this, and the wrong +usage of the direct page mode will raise an error. + +@cindex @samp{--short-branchs} +The @samp{--short-branchs} option turns off the translation of +relative branches into absolute branches when the branch offset is +out of range. By default @code{@value{AS}} transforms the relative +branch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne}, +@samp{ble}, @samp{blt}, @samp{bhi}, @samp{bcc}, @samp{bls}, +@samp{bcs}, @samp{bmi}, @samp{bvs}, @samp{bvs}, @samp{bra}) into +an absolute branch when the offset is out of the -128 .. 127 range. +In that case, the @samp{bsr} instruction is translated into a +@samp{jsr}, the @samp{bra} instruction is translated into a +@samp{jmp} and the conditional branchs instructions are inverted and +followed by a @samp{jmp}. This option disables these translations +and @code{@value{AS}} will generate an error if a relative branch +is out of range. This option does not affect the optimization +associated to the @samp{jbra}, @samp{jbsr} and @samp{jbXX} pseudo opcodes. + +@cindex @samp{--force-long-branchs} +The @samp{--force-long-branchs} option forces the translation of +relative branches into absolute branches. This option does not affect +the optimization associated to the @samp{jbra}, @samp{jbsr} and +@samp{jbXX} pseudo opcodes. + +@cindex @samp{--print-insn-syntax} +You can use the @samp{--print-insn-syntax} option to obtain the +syntax description of the instruction when an error is detected. + +@cindex @samp{--print-opcodes} +The @samp{--print-opcodes} option prints the list of all the +instructions with their syntax. The first item of each line +represents the instruction name and the rest of the line indicates +the possible operands for that instruction. The list is printed +in alphabetical order. Once the list is printed @code{@value{AS}} +exits. + +@cindex @samp{--generate-example} +The @samp{--generate-example} option is similar to @samp{--print-opcodes} +but it generates an example for each instruction instead. + +@node M68HC11-Syntax +@section Syntax + +@cindex M68HC11 syntax +@cindex syntax, M68HC11 + +In the M68HC11 syntax, the instruction name comes first and it may +be followed by one or several operands (up to three). Operands are +separated by comma (@samp{,}). In the normal mode, +@code{@value{AS}} will complain if too many operands are specified for +a given instruction. In the MRI mode (turned on with @samp{-M} option), +it will treat them as comments. Example: + +@smallexample +inx +lda #23 +bset 2,x #4 +brclr *bot #8 foo +@end smallexample + +@cindex M68HC11 addressing modes +@cindex addressing modes, M68HC11 +The following addressing modes are understood: +@table @dfn +@item Immediate +@samp{#@var{number}} + +@item Address Register +@samp{@var{number},X}, @samp{@var{number},Y} + +The @var{number} may be omitted in which case 0 is assumed. + +@item Direct Addressing mode +@samp{*@var{symbol}}, or @samp{*@var{digits}} + +@item Absolute +@samp{@var{symbol}}, or @samp{@var{digits}} +@end table + +@node M68HC11-Float +@section Floating Point + +@cindex floating point, M68HC11 +@cindex M68HC11 floating point +Packed decimal (P) format floating literals are not supported. +Feel free to add the code! + +The floating point formats generated by directives are these. + +@table @code +@cindex @code{float} directive, M68HC11 +@item .float +@code{Single} precision floating point constants. + +@cindex @code{double} directive, M68HC11 +@item .double +@code{Double} precision floating point constants. + +@cindex @code{extend} directive M68HC11 +@cindex @code{ldouble} directive M68HC11 +@item .extend +@itemx .ldouble +@code{Extended} precision (@code{long double}) floating point constants. +@end table + +@need 2000 +@node M68HC11-opcodes +@section Opcodes + +@cindex M68HC11 opcodes +@cindex opcodes, M68HC11 +@cindex instruction set, M68HC11 + +@menu +* M68HC11-Branch:: Branch Improvement +@end menu + +@node M68HC11-Branch +@subsection Branch Improvement + +@cindex pseudo-opcodes, M68HC11 +@cindex M68HC11 pseudo-opcodes +@cindex branch improvement, M68HC11 +@cindex M68HC11 branch improvement + +Certain pseudo opcodes are permitted for branch instructions. +They expand to the shortest branch instruction that reach the +target. Generally these mnemonics are made by prepending @samp{j} to +the start of Motorola mnemonic. These pseudo opcodes are not affected +by the @samp{--short-branchs} or @samp{--force-long-branchs} options. + +The following table summarizes the pseudo-operations. + +@smallexample + Displacement Width + +-------------------------------------------------------------+ + | Options | + | --short-branchs --force-long-branchs | + +--------------------------+----------------------------------+ +Pseudo-Op |BYTE WORD | BYTE WORD | + +--------------------------+----------------------------------+ + bsr | bsr <pc-rel> <error> | jsr <abs> | + bra | bra <pc-rel> <error> | jmp <abs> | + jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> | + jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> | + bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> | + jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> | + | jmp <abs> | | + +--------------------------+----------------------------------+ +XX: condition +NX: negative of condition XX + +@end smallexample + +@table @code +@item jbsr +@itemx jbra +These are the simplest jump pseudo-operations; they always map to one +particular machine instruction, depending on the displacement to the +branch target. + +@item jb@var{XX} +Here, @samp{jb@var{XX}} stands for an entire family of pseudo-operations, +where @var{XX} is a conditional branch or condition-code test. The full +list of pseudo-ops in this family is: +@smallexample + jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo + jbcs jbne jblt jble jbls jbvc jbmi +@end smallexample + +For the cases of non-PC relative displacements and long displacements, +@code{@value{AS}} issues a longer code fragment in terms of +@var{NX}, the opposite condition to @var{XX}. For example, for the +non-PC relative case: +@smallexample + jb@var{XX} foo +@end smallexample +gives +@smallexample + b@var{NX}s oof + jmp foo + oof: +@end smallexample + +@end table + + @@ -541,8 +541,8 @@ integer_constant (radix, expressionP) } } - if ((NUMBERS_WITH_SUFFIX || flag_m68k_mri) - && suffix != NULL + if ((NUMBERS_WITH_SUFFIX || flag_m68k_mri) + && suffix != NULL && input_line_pointer - 1 == suffix) c = *input_line_pointer++; @@ -815,7 +815,7 @@ operand (expressionP) case '9': input_line_pointer--; - integer_constant ((NUMBERS_WITH_SUFFIX || flag_m68k_mri) + integer_constant ((NUMBERS_WITH_SUFFIX || flag_m68k_mri) ? 0 : 10, expressionP); break; diff --git a/gas/po/POTFILES.in b/gas/po/POTFILES.in index 0e420b3..c5d9d4a 100644 --- a/gas/po/POTFILES.in +++ b/gas/po/POTFILES.in @@ -46,6 +46,8 @@ config/tc-arc.c config/tc-arc.h config/tc-arm.c config/tc-arm.h +config/tc-avr.c +config/tc-avr.h config/tc-d10v.c config/tc-d10v.h config/tc-d30v.c @@ -66,8 +68,12 @@ config/tc-i860.c config/tc-i860.h config/tc-i960.c config/tc-i960.h +config/tc-ia64.c +config/tc-ia64.h config/tc-m32r.c config/tc-m32r.h +config/tc-m68hc11.c +config/tc-m68hc11.h config/tc-m68k.c config/tc-m68k.h config/tc-m88k.c @@ -114,18 +120,18 @@ ecoff.c ecoff.h ehopt.c ehopt.c -emul-target.h emul.h +emul-target.h expr.c expr.c expr.h flonum-copy.c flonum-copy.c +flonum.h flonum-konst.c flonum-konst.c flonum-mult.c flonum-mult.c -flonum.h frags.c frags.c frags.h diff --git a/gas/po/gas.pot b/gas/po/gas.pot index eb90adc..7e02403 100644 --- a/gas/po/gas.pot +++ b/gas/po/gas.pot @@ -6,7 +6,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" -"POT-Creation-Date: 2000-04-04 23:20+0930\n" +"POT-Creation-Date: 2000-06-18 18:12-0700\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n" "Language-Team: LANGUAGE <LL@li.org>\n" @@ -14,48 +14,48 @@ msgstr "" "Content-Type: text/plain; charset=CHARSET\n" "Content-Transfer-Encoding: ENCODING\n" -#: app.c:466 app.c:480 +#: app.c:465 app.c:479 msgid "end of file in comment" msgstr "" -#: app.c:559 +#: app.c:558 msgid "end of file in string: inserted '\"'" msgstr "" -#: app.c:625 +#: app.c:624 #, c-format msgid "Unknown escape '\\%c' in string: Ignored" msgstr "" -#: app.c:634 +#: app.c:633 msgid "End of file in string: '\"' inserted" msgstr "" -#: app.c:754 +#: app.c:753 msgid "end of file not at end of a line; newline inserted" msgstr "" -#: app.c:911 +#: app.c:910 msgid "end of file in multiline comment" msgstr "" -#: app.c:960 +#: app.c:974 msgid "end of file after a one-character quote; \\0 inserted" msgstr "" -#: app.c:968 +#: app.c:982 msgid "end of file in escape character" msgstr "" -#: app.c:980 +#: app.c:994 msgid "Missing close quote: (assumed)" msgstr "" -#: app.c:1043 app.c:1097 app.c:1166 +#: app.c:1057 app.c:1111 app.c:1180 msgid "end of file in comment; newline inserted" msgstr "" -#: app.c:1107 +#: app.c:1121 msgid "EOF in Comment: Newline inserted" msgstr "" @@ -260,7 +260,7 @@ msgid "GNU assembler %s\n" msgstr "" #: as.c:517 -msgid "Copyright 1997 Free Software Foundation, Inc.\n" +msgid "Copyright 2000 Free Software Foundation, Inc.\n" msgstr "" #: as.c:518 gasp.c:3648 @@ -311,31 +311,31 @@ msgstr "" msgid "bad defsym; format is --defsym name=value" msgstr "" -#: as.c:575 +#: as.c:579 msgid "No file name following -t option\n" msgstr "" -#: as.c:591 +#: as.c:595 #, c-format msgid "Failed to read instruction table %s\n" msgstr "" -#: as.c:705 +#: as.c:712 #, c-format msgid "invalid listing option `%c'" msgstr "" -#: as.c:899 +#: as.c:906 #, c-format msgid "%d warnings, treating warnings as errors" msgstr "" -#: as.c:930 +#: as.c:937 #, c-format msgid "%s: total time in assembly: %ld.%06ld\n" msgstr "" -#: as.c:933 +#: as.c:940 #, c-format msgid "%s: data size %ld\n" msgstr "" @@ -345,8 +345,8 @@ msgstr "" #. * This should never happen. #. #: atof-generic.c:438 config/tc-a29k.c:544 config/tc-i860.c:335 -#: config/tc-i860.c:708 config/tc-m68k.c:3124 config/tc-m68k.c:3153 -#: config/tc-sparc.c:2462 +#: config/tc-i860.c:708 config/tc-m68k.c:3122 config/tc-m68k.c:3151 +#: config/tc-sparc.c:2478 msgid "failed sanity check." msgstr "" @@ -424,7 +424,7 @@ msgstr "" msgid "Attempt to put an undefined symbol into set %s" msgstr "" -#: config/obj-aout.c:198 config/obj-coff.c:1204 config/obj-elf.c:1675 +#: config/obj-aout.c:198 config/obj-coff.c:1204 config/obj-elf.c:1706 #: ecoff.c:3668 #, c-format msgid "Symbol `%s' can not be both weak and common" @@ -552,12 +552,12 @@ msgstr "" msgid "unsupported section attribute '%c'" msgstr "" -#: config/obj-coff.c:1410 config/obj-coff.c:3668 config/tc-ppc.c:3791 +#: config/obj-coff.c:1410 config/obj-coff.c:3668 config/tc-ppc.c:3917 #, c-format msgid "unknown section attribute '%c'" msgstr "" -#: config/obj-coff.c:1432 config/tc-ppc.c:3809 read.c:2504 +#: config/obj-coff.c:1432 config/tc-ppc.c:3935 read.c:2502 #, c-format msgid "error setting flags for \"%s\": %s" msgstr "" @@ -595,11 +595,11 @@ msgstr "" msgid "Too many new sections; can't add \"%s\"" msgstr "" -#: config/obj-coff.c:3986 config/tc-m88k.c:1260 config/tc-sparc.c:3354 +#: config/obj-coff.c:3986 config/tc-m88k.c:1260 config/tc-sparc.c:3454 msgid "Expected comma after name" msgstr "" -#: config/obj-coff.c:3992 read.c:1967 +#: config/obj-coff.c:3992 read.c:1965 msgid "Missing size expression" msgstr "" @@ -608,7 +608,7 @@ msgstr "" msgid "lcomm length (%d.) <0! Ignored." msgstr "" -#: config/obj-coff.c:4026 read.c:2188 +#: config/obj-coff.c:4026 read.c:2186 #, c-format msgid "Symbol %s already defined" msgstr "" @@ -649,140 +649,150 @@ msgstr "" msgid "Signed .word overflow; switch may be too large; %ld at 0x%lx" msgstr "" -#: config/obj-ecoff.c:240 +#: config/obj-ecoff.c:241 msgid "Can't set GP value" msgstr "" -#: config/obj-ecoff.c:247 +#: config/obj-ecoff.c:248 msgid "Can't set register masks" msgstr "" -#: config/obj-elf.c:299 config/tc-sparc.c:3495 config/tc-v850.c:263 +#: config/obj-elf.c:310 config/tc-sparc.c:3595 config/tc-v850.c:263 msgid "Expected comma after symbol-name" msgstr "" -#: config/obj-elf.c:306 config/tc-arc.c:779 config/tc-sparc.c:3502 +#: config/obj-elf.c:317 config/tc-arc.c:779 config/tc-sparc.c:3602 #, c-format msgid ".COMMon length (%d.) <0! Ignored." msgstr "" -#: config/obj-elf.c:316 config/tc-alpha.c:4320 config/tc-sparc.c:3512 +#: config/obj-elf.c:327 config/tc-alpha.c:4320 config/tc-sparc.c:3612 #: config/tc-v850.c:285 msgid "Ignoring attempt to re-define symbol" msgstr "" -#: config/obj-elf.c:324 config/tc-arc.c:797 config/tc-sparc.c:3520 +#: config/obj-elf.c:335 config/tc-arc.c:797 config/tc-sparc.c:3620 #: config/tc-v850.c:295 #, c-format msgid "Length of .comm \"%s\" is already %ld. Not changed to %d." msgstr "" -#: config/obj-elf.c:347 config/tc-arc.c:816 config/tc-v850.c:322 +#: config/obj-elf.c:358 config/tc-arc.c:816 config/tc-v850.c:322 msgid "Common alignment negative; 0 assumed" msgstr "" -#: config/obj-elf.c:366 config/tc-m32r.c:1269 config/tc-ppc.c:1396 +#: config/obj-elf.c:377 config/tc-m32r.c:1269 config/tc-ppc.c:1514 #: config/tc-v850.c:385 msgid "Common alignment not a power of 2" msgstr "" -#: config/obj-elf.c:429 config/tc-arc.c:876 config/tc-sparc.c:3644 -#: config/tc-v850.c:563 +#: config/obj-elf.c:440 config/tc-arc.c:876 config/tc-sparc.c:3744 +#: config/tc-v850.c:566 #, c-format msgid "bad .common segment %s" msgstr "" -#: config/obj-elf.c:658 +#: config/obj-elf.c:668 #, c-format msgid "Setting incorrect section type for %s" msgstr "" -#: config/obj-elf.c:668 +#: config/obj-elf.c:672 +#, c-format +msgid "Ignoring incorrect section type for %s" +msgstr "" + +#: config/obj-elf.c:685 #, c-format msgid "Setting incorrect section attributes for %s" msgstr "" -#: config/obj-elf.c:726 +#: config/obj-elf.c:727 +#, c-format +msgid "Ignoring changed section attributes for %s" +msgstr "" + +#: config/obj-elf.c:757 msgid "Unrecognized .section attribute: want a,w,x" msgstr "" -#: config/obj-elf.c:766 +#: config/obj-elf.c:797 msgid "Unrecognized section attribute" msgstr "" -#: config/obj-elf.c:788 +#: config/obj-elf.c:819 msgid "Unrecognized section type" msgstr "" -#: config/obj-elf.c:839 +#: config/obj-elf.c:870 msgid "Missing section name" msgstr "" -#: config/obj-elf.c:905 +#: config/obj-elf.c:936 msgid "Bad .section directive - character following name is not '#'" msgstr "" -#: config/obj-elf.c:1006 +#: config/obj-elf.c:1037 msgid ".previous without corresponding .section; ignored" msgstr "" -#: config/obj-elf.c:1033 +#: config/obj-elf.c:1064 msgid ".popsection without corresponding .pushsection; ignored" msgstr "" -#: config/obj-elf.c:1085 +#: config/obj-elf.c:1116 #, c-format msgid "multiple .symver directives for symbol `%s'" msgstr "" -#: config/obj-elf.c:1094 +#: config/obj-elf.c:1125 msgid "expected comma after name in .symver" msgstr "" -#: config/obj-elf.c:1115 +#: config/obj-elf.c:1146 #, c-format msgid "missing version name in `%s' for symbol `%s'" msgstr "" -#: config/obj-elf.c:1324 config/obj-som.c:148 config/obj-som.c:193 +#: config/obj-elf.c:1355 config/obj-som.c:149 config/obj-som.c:194 msgid "Expected quoted string" msgstr "" -#: config/obj-elf.c:1345 +#: config/obj-elf.c:1376 #, c-format msgid "expected comma after name `%s' in .size directive" msgstr "" -#: config/obj-elf.c:1354 +#: config/obj-elf.c:1385 msgid "missing expression in .size directive" msgstr "" -#: config/obj-elf.c:1421 +#: config/obj-elf.c:1452 #, c-format msgid "ignoring unrecognized symbol type \"%s\"" msgstr "" -#: config/obj-elf.c:1599 +#: config/obj-elf.c:1630 msgid ".size expression too complicated to fix up" msgstr "" -#: config/obj-elf.c:1630 +#: config/obj-elf.c:1661 #, c-format msgid "" "invalid attempt to declare external version name as default in symbol `%s'" msgstr "" -#: config/obj-elf.c:1762 +#: config/obj-elf.c:1793 #, c-format msgid "Failed to set up debugging information: %s" msgstr "" -#: config/obj-elf.c:1782 +#: config/obj-elf.c:1813 #, c-format msgid "Can't start writing .mdebug section: %s" msgstr "" -#: config/obj-elf.c:1790 +#: config/obj-elf.c:1821 #, c-format msgid "Could not write .mdebug section: %s" msgstr "" @@ -791,20 +801,20 @@ msgstr "" msgid "too many sections" msgstr "" -#: config/obj-som.c:131 +#: config/obj-som.c:132 msgid "Only one .version pseudo-op per file!" msgstr "" -#: config/obj-som.c:157 +#: config/obj-som.c:158 #, c-format msgid "FATAL: Attaching version header %s" msgstr "" -#: config/obj-som.c:176 +#: config/obj-som.c:177 msgid "Only one .copyright pseudo-op per file!" msgstr "" -#: config/obj-som.c:202 +#: config/obj-som.c:203 #, c-format msgid "FATAL: Attaching copyright header %s" msgstr "" @@ -955,26 +965,27 @@ msgstr "" msgid "unhandled stab type %d" msgstr "" -#: config/tc-a29k.c:160 config/tc-sparc.c:3696 +#: config/tc-a29k.c:160 config/tc-sparc.c:3796 msgid "Unknown segment type" msgstr "" #. Probably a memory allocation problem? Give up now. -#: config/tc-a29k.c:330 config/tc-hppa.c:1387 config/tc-i860.c:202 -#: config/tc-mips.c:1062 config/tc-mips.c:1104 config/tc-sparc.c:789 +#: config/tc-a29k.c:330 config/tc-hppa.c:1401 config/tc-i860.c:202 +#: config/tc-mips.c:1062 config/tc-mips.c:1104 config/tc-sparc.c:806 msgid "Broken assembler. No assembly attempted." msgstr "" -#: config/tc-a29k.c:375 config/tc-arc.c:535 config/tc-d10v.c:507 -#: config/tc-d30v.c:553 config/tc-h8300.c:305 config/tc-h8500.c:297 -#: config/tc-mcore.c:656 config/tc-mn10200.c:935 config/tc-mn10300.c:1296 -#: config/tc-ppc.c:1852 config/tc-sh.c:632 config/tc-tic80.c:291 -#: config/tc-v850.c:2033 config/tc-w65.c:257 config/tc-z8k.c:341 +#: config/tc-a29k.c:375 config/tc-arc.c:535 config/tc-avr.c:1045 +#: config/tc-d10v.c:514 config/tc-d30v.c:553 config/tc-h8300.c:304 +#: config/tc-h8500.c:297 config/tc-mcore.c:656 config/tc-mn10200.c:935 +#: config/tc-mn10300.c:1303 config/tc-ppc.c:1970 config/tc-sh.c:638 +#: config/tc-tic80.c:291 config/tc-v850.c:2034 config/tc-w65.c:257 +#: config/tc-z8k.c:338 msgid "missing operand" msgstr "" -#: config/tc-a29k.c:415 config/tc-hppa.c:1533 config/tc-i860.c:407 -#: config/tc-i860.c:423 config/tc-sparc.c:1352 config/tc-sparc.c:1358 +#: config/tc-a29k.c:415 config/tc-hppa.c:1547 config/tc-i860.c:407 +#: config/tc-i860.c:423 config/tc-sparc.c:1369 config/tc-sparc.c:1375 #, c-format msgid "Unknown opcode: `%s'" msgstr "" @@ -1039,10 +1050,10 @@ msgstr "" msgid "syntax error" msgstr "" -#: config/tc-alpha.c:1025 config/tc-arm.c:5167 config/tc-h8300.c:1413 -#: config/tc-h8500.c:1222 config/tc-hppa.c:3904 config/tc-i860.c:813 -#: config/tc-m68k.c:4125 config/tc-m88k.c:1106 config/tc-ns32k.c:1589 -#: config/tc-sparc.c:2741 config/tc-z8k.c:1355 +#: config/tc-alpha.c:1025 config/tc-arm.c:5220 config/tc-h8300.c:1409 +#: config/tc-h8500.c:1221 config/tc-hppa.c:3989 config/tc-i860.c:813 +#: config/tc-m68hc11.c:486 config/tc-m68k.c:4125 config/tc-m88k.c:1106 +#: config/tc-ns32k.c:1589 config/tc-sparc.c:2757 config/tc-z8k.c:1352 msgid "Bad call to MD_ATOF()" msgstr "" @@ -1136,10 +1147,10 @@ msgstr "" msgid "operand out of range (%s not between %d and %d)" msgstr "" -#: config/tc-alpha.c:2434 config/tc-arc.c:548 config/tc-d10v.c:596 -#: config/tc-d30v.c:636 config/tc-mn10200.c:990 config/tc-mn10300.c:1368 -#: config/tc-ppc.c:1818 config/tc-ppc.c:1926 config/tc-ppc.c:1938 -#: config/tc-v850.c:1819 config/tc-v850.c:1842 config/tc-v850.c:2055 +#: config/tc-alpha.c:2434 config/tc-arc.c:548 config/tc-d10v.c:603 +#: config/tc-d30v.c:636 config/tc-mn10200.c:990 config/tc-mn10300.c:1375 +#: config/tc-ppc.c:1936 config/tc-ppc.c:2044 config/tc-ppc.c:2056 +#: config/tc-v850.c:1820 config/tc-v850.c:1843 config/tc-v850.c:2056 msgid "too many fixups" msgstr "" @@ -1153,7 +1164,7 @@ msgstr "" msgid "opcode `%s' not supported for target %s" msgstr "" -#: config/tc-alpha.c:2651 config/tc-alpha.c:2719 +#: config/tc-alpha.c:2651 config/tc-alpha.c:2719 config/tc-avr.c:1012 #, c-format msgid "unknown opcode `%s'" msgstr "" @@ -1185,11 +1196,11 @@ msgstr "" msgid "macro requires $at while $at in use" msgstr "" -#: config/tc-alpha.c:3075 expr.c:86 read.c:3160 +#: config/tc-alpha.c:3075 expr.c:86 read.c:3158 msgid "bignum invalid; zero assumed" msgstr "" -#: config/tc-alpha.c:3077 expr.c:88 read.c:3162 read.c:3498 read.c:4396 +#: config/tc-alpha.c:3077 expr.c:88 read.c:3160 read.c:3496 read.c:4394 msgid "floating point number invalid; zero assumed" msgstr "" @@ -1206,14 +1217,14 @@ msgstr "" msgid "bad instruction format for lda !%s!%d" msgstr "" -#: config/tc-alpha.c:4291 config/tc-ppc.c:1345 config/tc-ppc.c:3555 -#: read.c:1387 +#: config/tc-alpha.c:4291 config/tc-ppc.c:1463 config/tc-ppc.c:3681 +#: read.c:1385 #, c-format msgid ".COMMon length (%ld.) <0! Ignored." msgstr "" -#: config/tc-alpha.c:4329 config/tc-alpha.c:4338 config/tc-ppc.c:3592 -#: read.c:1408 +#: config/tc-alpha.c:4329 config/tc-alpha.c:4338 config/tc-ppc.c:3718 +#: read.c:1406 #, c-format msgid "Length of .comm \"%s\" is already %ld. Not changed to %ld." msgstr "" @@ -1303,8 +1314,8 @@ msgstr "" msgid "Bad .fmask directive" msgstr "" -#: config/tc-alpha.c:5169 config/tc-arm.c:1325 read.c:2151 read.c:2731 -#: stabs.c:460 +#: config/tc-alpha.c:5169 config/tc-arm.c:1331 read.c:2149 read.c:2729 +#: stabs.c:459 #, c-format msgid "Expected comma after name \"%s\"" msgstr "" @@ -1335,7 +1346,7 @@ msgstr "" msgid "Alignment too large: %d. assumed" msgstr "" -#: config/tc-alpha.c:5275 config/tc-d30v.c:2182 +#: config/tc-alpha.c:5275 config/tc-d30v.c:2181 msgid "Alignment negative: 0 assumed" msgstr "" @@ -1352,9 +1363,9 @@ msgid "" msgstr "" #: config/tc-arc.c:155 config/tc-arc.c:178 config/tc-arc.c:922 -#: config/tc-hppa.c:1347 config/tc-hppa.c:6734 config/tc-hppa.c:6740 -#: config/tc-hppa.c:6746 config/tc-hppa.c:6752 config/tc-mn10300.c:885 -#: config/tc-mn10300.c:1996 +#: config/tc-hppa.c:1361 config/tc-hppa.c:6752 config/tc-hppa.c:6758 +#: config/tc-hppa.c:6764 config/tc-hppa.c:6770 config/tc-mn10300.c:891 +#: config/tc-mn10300.c:2020 msgid "could not set architecture and machine" msgstr "" @@ -1362,8 +1373,8 @@ msgstr "" msgid "virtual memory exhausted" msgstr "" -#: config/tc-arc.c:254 config/tc-mn10200.c:1354 config/tc-mn10300.c:1907 -#: config/tc-ppc.c:1102 config/tc-v850.c:1618 +#: config/tc-arc.c:254 config/tc-mn10200.c:1354 config/tc-mn10300.c:1931 +#: config/tc-ppc.c:1220 config/tc-v850.c:1619 #, c-format msgid "operand out of range (%s not between %ld and %ld)" msgstr "" @@ -1377,14 +1388,14 @@ msgstr "" msgid "too many suffixes" msgstr "" -#: config/tc-arc.c:533 config/tc-d10v.c:505 config/tc-d30v.c:551 -#: config/tc-mn10200.c:932 config/tc-mn10300.c:1293 config/tc-ppc.c:1850 -#: config/tc-tic80.c:287 config/tc-v850.c:2030 +#: config/tc-arc.c:533 config/tc-d10v.c:512 config/tc-d30v.c:551 +#: config/tc-mn10200.c:932 config/tc-mn10300.c:1300 config/tc-ppc.c:1968 +#: config/tc-tic80.c:287 config/tc-v850.c:2031 msgid "illegal operand" msgstr "" -#: config/tc-arc.c:620 config/tc-mn10200.c:1031 config/tc-mn10300.c:1438 -#: config/tc-ppc.c:1975 config/tc-v850.c:2108 +#: config/tc-arc.c:620 config/tc-mn10200.c:1031 config/tc-mn10300.c:1445 +#: config/tc-ppc.c:2093 config/tc-v850.c:2109 #, c-format msgid "junk at end of line: `%s'" msgstr "" @@ -1401,7 +1412,7 @@ msgstr "" msgid "conditional branch follows set of flags" msgstr "" -#: config/tc-arc.c:749 config/tc-arm.c:6377 +#: config/tc-arc.c:749 config/tc-arm.c:6425 #, c-format msgid "bad instruction `%s'" msgstr "" @@ -1430,7 +1441,7 @@ msgstr "" msgid "bad .cpu op" msgstr "" -#: config/tc-arc.c:951 config/tc-ppc.c:2623 +#: config/tc-arc.c:951 config/tc-ppc.c:2741 msgid "missing rename string" msgstr "" @@ -1438,9 +1449,10 @@ msgstr "" msgid "invalid symbol to rename to" msgstr "" -#: config/tc-arc.c:1010 config/tc-d10v.c:284 config/tc-d30v.c:366 -#: config/tc-mips.c:8770 config/tc-mn10200.c:355 config/tc-pj.c:365 -#: config/tc-ppc.c:4384 config/tc-sh.c:1742 config/tc-v850.c:1276 +#: config/tc-arc.c:1010 config/tc-avr.c:288 config/tc-d10v.c:291 +#: config/tc-d30v.c:366 config/tc-mips.c:8770 config/tc-mn10200.c:355 +#: config/tc-pj.c:365 config/tc-ppc.c:4510 config/tc-sh.c:1824 +#: config/tc-v850.c:1278 msgid "bad call to md_atof" msgstr "" @@ -1453,583 +1465,595 @@ msgstr "" msgid "expression too complex for %%st" msgstr "" -#: config/tc-arc.c:1326 config/tc-arm.c:3142 config/tc-d10v.c:1475 -#: config/tc-d30v.c:1828 config/tc-mips.c:3250 config/tc-mips.c:4182 -#: config/tc-mips.c:4967 config/tc-mips.c:5513 config/tc-ppc.c:4720 -#: config/tc-v850.c:2338 +#: config/tc-arc.c:1326 config/tc-arm.c:3195 config/tc-avr.c:771 +#: config/tc-d10v.c:1532 config/tc-d30v.c:1827 config/tc-mips.c:3250 +#: config/tc-mips.c:4182 config/tc-mips.c:4967 config/tc-mips.c:5513 +#: config/tc-ppc.c:4846 config/tc-v850.c:2341 msgid "expression too complex" msgstr "" -#: config/tc-arc.c:1392 config/tc-ppc.c:4823 config/tc-v850.c:2382 +#: config/tc-arc.c:1392 config/tc-ppc.c:4948 config/tc-v850.c:2385 msgid "unresolved expression that must be resolved" msgstr "" -#: config/tc-arc.c:1457 config/tc-sparc.c:3203 +#: config/tc-arc.c:1457 config/tc-sparc.c:3303 #, c-format msgid "internal error: can't export reloc type %d (`%s')" msgstr "" -#: config/tc-arm.c:1023 +#: config/tc-arm.c:1029 msgid "Literal Pool Overflow" msgstr "" -#: config/tc-arm.c:1165 +#: config/tc-arm.c:1171 msgid "Invalid syntax for .req directive." msgstr "" -#: config/tc-arm.c:1237 config/tc-mips.c:9963 read.c:2040 +#: config/tc-arm.c:1243 config/tc-mips.c:9979 read.c:2038 #, c-format msgid "Alignment too large: %d. assumed." msgstr "" -#: config/tc-arm.c:1240 read.c:2045 +#: config/tc-arm.c:1246 read.c:2043 msgid "Alignment negative. 0 assumed." msgstr "" -#: config/tc-arm.c:1374 config/tc-m32r.c:418 read.c:2790 read.c:4867 +#: config/tc-arm.c:1380 config/tc-m32r.c:418 read.c:2788 read.c:4865 #, c-format msgid "symbol `%s' already defined" msgstr "" -#: config/tc-arm.c:1444 +#: config/tc-arm.c:1450 msgid "selected processor does not support THUMB opcodes" msgstr "" -#: config/tc-arm.c:1456 +#: config/tc-arm.c:1462 msgid "selected processor does not support ARM opcodes" msgstr "" -#: config/tc-arm.c:1465 +#: config/tc-arm.c:1471 #, c-format msgid "invalid instruction size selected (%d)" msgstr "" -#: config/tc-arm.c:1500 +#: config/tc-arm.c:1506 #, c-format msgid "invalid operand to .code directive (%d) (expecting 16 or 32)" msgstr "" -#: config/tc-arm.c:1511 +#: config/tc-arm.c:1517 msgid "Garbage following instruction" msgstr "" #. In the few cases where we might be able to accept something else #. this error can be overridden. -#: config/tc-arm.c:1560 +#: config/tc-arm.c:1566 #, c-format msgid "Register expected, not '%.100s'" msgstr "" -#. In the few cases where we might be able to accept something else -#. this error can be overridden. -#: config/tc-arm.c:1586 -msgid "<psr(f)> expected" +#. In the few cases where we might be able to accept +#. something else this error can be overridden. +#: config/tc-arm.c:1630 +msgid "flag for {c}psr instruction expected" msgstr "" -#: config/tc-arm.c:1616 +#: config/tc-arm.c:1660 msgid "Illegal co-processor number" msgstr "" -#: config/tc-arm.c:1623 +#: config/tc-arm.c:1667 msgid "Bad or missing co-processor number" msgstr "" -#: config/tc-arm.c:1647 +#: config/tc-arm.c:1691 msgid "bad or missing expression" msgstr "" -#: config/tc-arm.c:1653 +#: config/tc-arm.c:1697 msgid "immediate co-processor expression too large" msgstr "" #. In the few cases where we might be able to accept something else #. this error can be overridden. -#: config/tc-arm.c:1678 +#: config/tc-arm.c:1722 msgid "Co-processor register expected" msgstr "" #. In the few cases where we might be able to accept something else #. this error can be overridden. -#: config/tc-arm.c:1702 +#: config/tc-arm.c:1746 msgid "Floating point register expected" msgstr "" -#: config/tc-arm.c:1719 +#: config/tc-arm.c:1763 msgid "immediate expression expected" msgstr "" -#: config/tc-arm.c:1734 +#: config/tc-arm.c:1778 msgid "co-processor address must be word aligned" msgstr "" -#: config/tc-arm.c:1740 +#: config/tc-arm.c:1784 msgid "offset too large" msgstr "" -#: config/tc-arm.c:1788 +#: config/tc-arm.c:1832 msgid "pc may not be used in post-increment" msgstr "" -#: config/tc-arm.c:1804 config/tc-arm.c:2934 +#: config/tc-arm.c:1848 config/tc-arm.c:2987 msgid "pre-indexed expression expected" msgstr "" -#: config/tc-arm.c:1817 config/tc-arm.c:2946 config/tc-arm.c:3288 +#: config/tc-arm.c:1861 config/tc-arm.c:2999 config/tc-arm.c:3341 msgid "missing ]" msgstr "" -#: config/tc-arm.c:1827 +#: config/tc-arm.c:1871 msgid "pc may not be used with write-back" msgstr "" -#: config/tc-arm.c:1881 -msgid "<psr> expected" +#: config/tc-arm.c:1926 +msgid "comma expected after register name" msgstr "" -#: config/tc-arm.c:1942 config/tc-arm.c:2556 -msgid "Register or shift expression expected" +#: config/tc-arm.c:1944 +msgid "{C|S}PSR expected" msgstr "" -#: config/tc-arm.c:1956 config/tc-arm.c:2271 config/tc-arm.c:2523 -#: config/tc-arm.c:2543 -msgid "Invalid constant" +#: config/tc-arm.c:1971 +msgid "comma missing after psr flags" +msgstr "" + +#: config/tc-arm.c:1987 config/tc-arm.c:1996 +msgid "only a register or immediate value can follow a psr flag" msgstr "" -#: config/tc-arm.c:1967 -msgid "Error: unrecognised syntax for second argument to msr instruction" +#: config/tc-arm.c:2002 +msgid "can only set flag field with immediate value" +msgstr "" + +#: config/tc-arm.c:2019 config/tc-arm.c:2324 config/tc-arm.c:2576 +#: config/tc-arm.c:2596 +msgid "Invalid constant" msgstr "" -#: config/tc-arm.c:2016 +#: config/tc-arm.c:2069 msgid "rdhi, rdlo and rm must all be different" msgstr "" -#: config/tc-arm.c:2072 +#: config/tc-arm.c:2125 msgid "rd and rm should be different in mul" msgstr "" -#: config/tc-arm.c:2128 +#: config/tc-arm.c:2181 msgid "rd and rm should be different in mla" msgstr "" -#: config/tc-arm.c:2255 +#: config/tc-arm.c:2308 msgid "bad_segment" msgstr "" -#: config/tc-arm.c:2301 config/tc-arm.c:2378 +#: config/tc-arm.c:2354 config/tc-arm.c:2431 msgid "Shift expression expected" msgstr "" -#: config/tc-arm.c:2342 +#: config/tc-arm.c:2395 msgid "Invalid immediate shift" msgstr "" -#: config/tc-arm.c:2371 +#: config/tc-arm.c:2424 msgid "shift requires register or #expression" msgstr "" -#: config/tc-arm.c:2372 +#: config/tc-arm.c:2425 msgid "shift requires #expression" msgstr "" -#: config/tc-arm.c:2514 config/tc-arm.c:2975 +#: config/tc-arm.c:2567 config/tc-arm.c:3028 msgid "Constant expression expected" msgstr "" #: config/tc-arm.c:2609 +msgid "Register or shift expression expected" +msgstr "" + +#: config/tc-arm.c:2662 msgid "Invalid floating point immediate expression" msgstr "" -#: config/tc-arm.c:2612 +#: config/tc-arm.c:2665 msgid "Floating point register or immediate expression expected" msgstr "" -#: config/tc-arm.c:2781 +#: config/tc-arm.c:2834 msgid "address offset too large" msgstr "" -#: config/tc-arm.c:2853 +#: config/tc-arm.c:2906 msgid "Processor does not support halfwords or signed bytes" msgstr "" -#: config/tc-arm.c:2874 +#: config/tc-arm.c:2927 msgid "Address expected" msgstr "" -#: config/tc-arm.c:2904 config/tc-arm.c:2918 config/tc-arm.c:2955 +#: config/tc-arm.c:2957 config/tc-arm.c:2971 config/tc-arm.c:3008 #, c-format msgid "%s register same as write-back base" msgstr "" -#: config/tc-arm.c:2905 config/tc-arm.c:2919 config/tc-arm.c:2956 +#: config/tc-arm.c:2958 config/tc-arm.c:2972 config/tc-arm.c:3009 msgid "destination" msgstr "" -#: config/tc-arm.c:2905 config/tc-arm.c:2919 config/tc-arm.c:2956 +#: config/tc-arm.c:2958 config/tc-arm.c:2972 config/tc-arm.c:3009 msgid "source" msgstr "" -#: config/tc-arm.c:2995 +#: config/tc-arm.c:3048 msgid "literal pool insertion failed" msgstr "" -#: config/tc-arm.c:3033 +#: config/tc-arm.c:3086 msgid "Pre-increment instruction with translate" msgstr "" -#: config/tc-arm.c:3074 +#: config/tc-arm.c:3127 msgid "Bad range in register list" msgstr "" -#: config/tc-arm.c:3082 config/tc-arm.c:3091 config/tc-arm.c:3132 +#: config/tc-arm.c:3135 config/tc-arm.c:3144 config/tc-arm.c:3185 #, c-format msgid "Warning: Duplicated register (r%d) in register list" msgstr "" -#: config/tc-arm.c:3094 +#: config/tc-arm.c:3147 msgid "Warning: Register range not in ascending order" msgstr "" -#: config/tc-arm.c:3105 +#: config/tc-arm.c:3158 msgid "Missing `}'" msgstr "" -#: config/tc-arm.c:3121 +#: config/tc-arm.c:3174 msgid "invalid register mask" msgstr "" -#: config/tc-arm.c:3180 +#: config/tc-arm.c:3233 msgid "r15 not allowed as base register" msgstr "" -#: config/tc-arm.c:3248 config/tc-arm.c:3262 +#: config/tc-arm.c:3301 config/tc-arm.c:3315 msgid "r15 not allowed in swap" msgstr "" -#: config/tc-arm.c:3615 config/tc-v850.c:1921 config/tc-v850.c:1942 +#: config/tc-arm.c:3668 config/tc-v850.c:1922 config/tc-v850.c:1943 msgid "constant expression expected" msgstr "" -#: config/tc-arm.c:3621 +#: config/tc-arm.c:3674 msgid "Constant value required for number of registers" msgstr "" -#: config/tc-arm.c:3629 +#: config/tc-arm.c:3682 msgid "number of registers must be in the range [1:4]" msgstr "" -#: config/tc-arm.c:3689 +#: config/tc-arm.c:3742 msgid "R15 not allowed as base register with write-back" msgstr "" -#: config/tc-arm.c:3936 +#: config/tc-arm.c:3989 msgid "lo register required" msgstr "" -#: config/tc-arm.c:3944 +#: config/tc-arm.c:3997 msgid "hi register required" msgstr "" -#: config/tc-arm.c:4013 +#: config/tc-arm.c:4066 msgid "dest and source1 must be the same register" msgstr "" -#: config/tc-arm.c:4020 +#: config/tc-arm.c:4073 msgid "subtract valid only on lo regs" msgstr "" -#: config/tc-arm.c:4044 +#: config/tc-arm.c:4097 msgid "invalid Hi register with immediate" msgstr "" -#: config/tc-arm.c:4071 config/tc-arm.c:4104 config/tc-arm.c:4114 +#: config/tc-arm.c:4124 config/tc-arm.c:4157 config/tc-arm.c:4167 msgid "immediate value out of range" msgstr "" -#: config/tc-arm.c:4082 +#: config/tc-arm.c:4135 msgid "invalid immediate value for stack adjust" msgstr "" -#: config/tc-arm.c:4093 +#: config/tc-arm.c:4146 msgid "invalid immediate for address calculation" msgstr "" -#: config/tc-arm.c:4180 +#: config/tc-arm.c:4233 msgid "source1 and dest must be same register" msgstr "" -#: config/tc-arm.c:4215 +#: config/tc-arm.c:4268 msgid "Invalid immediate for shift" msgstr "" -#: config/tc-arm.c:4294 +#: config/tc-arm.c:4347 msgid "only lo regs allowed with immediate" msgstr "" -#: config/tc-arm.c:4313 +#: config/tc-arm.c:4366 msgid "invalid immediate" msgstr "" -#: config/tc-arm.c:4367 +#: config/tc-arm.c:4420 msgid "expected ']'" msgstr "" -#: config/tc-arm.c:4433 +#: config/tc-arm.c:4486 msgid "byte or halfword not valid for base register" msgstr "" -#: config/tc-arm.c:4438 +#: config/tc-arm.c:4491 msgid "R15 based store not allowed" msgstr "" -#: config/tc-arm.c:4443 +#: config/tc-arm.c:4496 msgid "Invalid base register for register offset" msgstr "" -#: config/tc-arm.c:4461 +#: config/tc-arm.c:4514 msgid "invalid offset" msgstr "" -#: config/tc-arm.c:4472 +#: config/tc-arm.c:4525 msgid "invalid base register in load/store" msgstr "" -#: config/tc-arm.c:4496 +#: config/tc-arm.c:4549 msgid "Invalid offset" msgstr "" -#: config/tc-arm.c:4570 +#: config/tc-arm.c:4623 msgid "dest and source1 one must be the same register" msgstr "" -#: config/tc-arm.c:4578 +#: config/tc-arm.c:4631 msgid "Rs and Rd must be different in MUL" msgstr "" -#: config/tc-arm.c:4722 +#: config/tc-arm.c:4775 msgid "" "Inserted missing '!': load/store multiple always writes back base register" msgstr "" -#: config/tc-arm.c:4738 config/tc-arm.c:4838 +#: config/tc-arm.c:4791 config/tc-arm.c:4891 msgid "Expression too complex" msgstr "" -#: config/tc-arm.c:4744 +#: config/tc-arm.c:4797 msgid "only lo-regs valid in load/store multiple" msgstr "" -#: config/tc-arm.c:4790 +#: config/tc-arm.c:4843 msgid "Syntax: ldrs[b] Rd, [Rb, Ro]" msgstr "" -#: config/tc-arm.c:4854 +#: config/tc-arm.c:4907 msgid "invalid register list to push/pop instruction" msgstr "" -#: config/tc-arm.c:4996 +#: config/tc-arm.c:5049 msgid "Virtual memory exhausted" msgstr "" -#: config/tc-arm.c:5394 +#: config/tc-arm.c:5421 #, c-format msgid "invalid constant (%lx) after fixup" msgstr "" -#: config/tc-arm.c:5428 +#: config/tc-arm.c:5455 #, c-format msgid "Unable to compute ADRL instructions for PC offset of 0x%x" msgstr "" -#: config/tc-arm.c:5456 +#: config/tc-arm.c:5483 #, c-format msgid "bad immediate value for offset (%ld)" msgstr "" -#: config/tc-arm.c:5477 config/tc-arm.c:5499 +#: config/tc-arm.c:5504 config/tc-arm.c:5526 msgid "invalid literal constant: pool needs to be closer" msgstr "" -#: config/tc-arm.c:5479 +#: config/tc-arm.c:5506 #, c-format msgid "bad immediate value for half-word offset (%ld)" msgstr "" -#: config/tc-arm.c:5516 +#: config/tc-arm.c:5543 msgid "shift expression is too large" msgstr "" -#: config/tc-arm.c:5534 config/tc-arm.c:5543 +#: config/tc-arm.c:5561 config/tc-arm.c:5570 msgid "Invalid swi expression" msgstr "" -#: config/tc-arm.c:5553 +#: config/tc-arm.c:5580 msgid "Invalid expression in load/store multiple" msgstr "" -#: config/tc-arm.c:5605 +#: config/tc-arm.c:5632 msgid "gas can't handle same-section branch dest >= 0x04000000" msgstr "" -#: config/tc-arm.c:5614 +#: config/tc-arm.c:5641 msgid "out of range branch" msgstr "" -#: config/tc-arm.c:5631 config/tc-arm.c:5647 config/tc-mips.c:9790 +#: config/tc-arm.c:5674 config/tc-arm.c:5690 config/tc-mips.c:9806 msgid "Branch out of range" msgstr "" -#: config/tc-arm.c:5669 +#: config/tc-arm.c:5713 msgid "Branch with link out of range" msgstr "" -#: config/tc-arm.c:5736 +#: config/tc-arm.c:5780 msgid "Illegal value for co-processor offset" msgstr "" -#: config/tc-arm.c:5759 +#: config/tc-arm.c:5803 #, c-format msgid "Invalid offset, target not word aligned (0x%08X)" msgstr "" -#: config/tc-arm.c:5764 config/tc-arm.c:5773 config/tc-arm.c:5780 -#: config/tc-arm.c:5787 config/tc-arm.c:5794 +#: config/tc-arm.c:5808 config/tc-arm.c:5817 config/tc-arm.c:5824 +#: config/tc-arm.c:5831 config/tc-arm.c:5838 #, c-format msgid "Invalid offset, value too big (0x%08X)" msgstr "" -#: config/tc-arm.c:5831 +#: config/tc-arm.c:5875 msgid "Invalid immediate for stack address calculation" msgstr "" -#: config/tc-arm.c:5840 +#: config/tc-arm.c:5884 #, c-format msgid "Invalid immediate for address calculation (value = 0x%08lX)" msgstr "" -#: config/tc-arm.c:5850 +#: config/tc-arm.c:5894 msgid "Invalid 8bit immediate" msgstr "" -#: config/tc-arm.c:5858 +#: config/tc-arm.c:5902 msgid "Invalid 3bit immediate" msgstr "" -#: config/tc-arm.c:5874 +#: config/tc-arm.c:5918 #, c-format msgid "Invalid immediate: %ld is too large" msgstr "" -#: config/tc-arm.c:5889 +#: config/tc-arm.c:5933 #, c-format msgid "Illegal Thumb shift value: %ld" msgstr "" -#: config/tc-arm.c:5903 +#: config/tc-arm.c:5947 #, c-format msgid "Bad relocation fixup type (%d)" msgstr "" -#: config/tc-arm.c:5973 +#: config/tc-arm.c:6019 msgid "Literal referenced across section boundary (Implicit dump?)" msgstr "" -#: config/tc-arm.c:5986 +#: config/tc-arm.c:6032 #, c-format msgid "Internal_relocation (type %d) not fixed up (IMMEDIATE)" msgstr "" -#: config/tc-arm.c:5992 +#: config/tc-arm.c:6038 msgid "ADRL used for a symbol not defined in the same file" msgstr "" -#: config/tc-arm.c:5998 +#: config/tc-arm.c:6044 #, c-format msgid "Internal_relocation (type %d) not fixed up (OFFSET_IMM)" msgstr "" -#: config/tc-arm.c:6018 config/tc-mcore.c:2110 config/tc-ns32k.c:2283 +#: config/tc-arm.c:6064 config/tc-mcore.c:2110 config/tc-ns32k.c:2283 msgid "<unknown>" msgstr "" -#: config/tc-arm.c:6021 +#: config/tc-arm.c:6067 #, c-format msgid "Can not represent %s relocation in this object file format (%d)" msgstr "" -#: config/tc-arm.c:6042 config/tc-mips.c:11281 config/tc-sh.c:2866 +#: config/tc-arm.c:6088 config/tc-mips.c:11302 config/tc-sh.c:2953 #, c-format msgid "Can not represent %s relocation in this object file format" msgstr "" -#: config/tc-arm.c:6060 +#: config/tc-arm.c:6106 msgid "md_estimate_size_before_relax\n" msgstr "" -#: config/tc-arm.c:6135 +#: config/tc-arm.c:6181 #, c-format msgid "No operator -- statement `%s'\n" msgstr "" -#: config/tc-arm.c:6153 +#: config/tc-arm.c:6199 msgid "selected processor does not support this opcode" msgstr "" -#: config/tc-arm.c:6197 +#: config/tc-arm.c:6245 #, c-format msgid "Opcode `%s' must have suffix from list: <%s>" msgstr "" -#: config/tc-arm.c:6227 +#: config/tc-arm.c:6275 msgid "Warning: Use of the 'nv' conditional is deprecated\n" msgstr "" -#: config/tc-arm.c:6244 +#: config/tc-arm.c:6292 #, c-format msgid "Opcode `%s' is unconditional\n" msgstr "" -#: config/tc-arm.c:6269 +#: config/tc-arm.c:6317 #, c-format msgid "Opcode `%s' must have suffix from <%s>\n" msgstr "" -#: config/tc-arm.c:6355 +#: config/tc-arm.c:6403 #, c-format msgid "register '%s' does not exist\n" msgstr "" -#: config/tc-arm.c:6360 +#: config/tc-arm.c:6408 #, c-format msgid "ignoring redefinition of register alias '%s'" msgstr "" -#: config/tc-arm.c:6366 +#: config/tc-arm.c:6414 #, c-format msgid "" "ignoring redefinition of register alias '%s' to non-existant register '%s'" msgstr "" -#: config/tc-arm.c:6370 +#: config/tc-arm.c:6418 msgid "ignoring incomplete .req pseuso op" msgstr "" -#: config/tc-arm.c:6550 +#: config/tc-arm.c:6598 #, c-format msgid "Unrecognised APCS switch -m%s" msgstr "" -#: config/tc-arm.c:6693 config/tc-arm.c:6706 config/tc-arm.c:6719 -#: config/tc-arm.c:6732 config/tc-arm.c:6738 +#: config/tc-arm.c:6741 config/tc-arm.c:6754 config/tc-arm.c:6767 +#: config/tc-arm.c:6779 config/tc-arm.c:6785 #, c-format msgid "Invalid architecture variant -m%s" msgstr "" -#: config/tc-arm.c:6745 +#: config/tc-arm.c:6792 #, c-format msgid "Invalid processor variant -m%s" msgstr "" -#: config/tc-arm.c:6768 +#: config/tc-arm.c:6815 msgid "" " ARM Specific Assembler Options:\n" " -m[arm][<processor name>] select processor variant\n" @@ -2045,7 +2069,7 @@ msgid "" " -k generate PIC code.\n" msgstr "" -#: config/tc-arm.c:6780 +#: config/tc-arm.c:6827 msgid "" " -mapcs-32, -mapcs-26 specify which ARM Procedure Calling Standard to " "use\n" @@ -2053,120 +2077,255 @@ msgid "" " -mapcs-reentrant the code is position independent/reentrant\n" msgstr "" -#: config/tc-arm.c:6786 +#: config/tc-arm.c:6833 msgid " -moabi support the old ELF ABI\n" msgstr "" -#: config/tc-arm.c:6790 +#: config/tc-arm.c:6837 msgid "" " -EB assemble code for a big endian cpu\n" " -EL assemble code for a little endian cpu\n" msgstr "" -#: config/tc-arm.c:6939 +#: config/tc-arm.c:6987 #, c-format msgid "%s: unexpected function type: %d" msgstr "" -#: config/tc-d10v.c:228 +#: config/tc-avr.c:204 +msgid "" +"AVR options:\n" +" -mmcu=[avr-name] select microcontroller variant\n" +" [avr-name] can be:\n" +" avr1 - AT90S1200\n" +" avr2 - AT90S2xxx, AT90S4xxx, AT90S85xx, ATtiny22\n" +" avr3 - ATmega103 or ATmega603\n" +" avr4 - ATmega161\n" +" or immediate microcontroller name.\n" +msgstr "" + +#: config/tc-avr.c:246 +#, c-format +msgid "unknown MCU: %s\n" +msgstr "" + +#: config/tc-avr.c:250 +#, c-format +msgid "redefinition of mcu type `%s'" +msgstr "" + +#: config/tc-avr.c:352 +msgid "constant value required" +msgstr "" + +#: config/tc-avr.c:355 +#, c-format +msgid "number must be less than %d" +msgstr "" + +#: config/tc-avr.c:406 +msgid "`,' required" +msgstr "" + +#: config/tc-avr.c:427 +msgid "undefined combination of operands" +msgstr "" + +#: config/tc-avr.c:436 +msgid "skipping two-word instruction" +msgstr "" + +#: config/tc-avr.c:501 +msgid "register r16-r23 required" +msgstr "" + +#: config/tc-avr.c:507 +msgid "register number above 15 required" +msgstr "" + +#: config/tc-avr.c:513 +msgid "even register number required" +msgstr "" + +#: config/tc-avr.c:520 +msgid "register r24,r26,r28 or r30 required" +msgstr "" + +#: config/tc-avr.c:526 +msgid "register name or number from 0 to 31 required" +msgstr "" + +#: config/tc-avr.c:544 +msgid "pointer register (X,Y or Z) required" +msgstr "" + +#: config/tc-avr.c:551 +msgid "cannot both predecrement and postincrement" +msgstr "" + +#: config/tc-avr.c:559 +msgid "addressing mode not supported" +msgstr "" + +#: config/tc-avr.c:566 +msgid "can't predecrement" +msgstr "" + +#: config/tc-avr.c:569 +msgid "pointer register Z required" +msgstr "" + +#: config/tc-avr.c:586 +msgid "pointer register (Y or Z) required" +msgstr "" + +#: config/tc-avr.c:695 +#, c-format +msgid "unknown constraint `%c'" +msgstr "" + +#: config/tc-avr.c:800 config/tc-avr.c:814 config/tc-avr.c:919 +#, c-format +msgid "odd address operand: %ld" +msgstr "" + +#: config/tc-avr.c:806 config/tc-avr.c:830 +#, c-format +msgid "operand out of range: %ld" +msgstr "" + +#: config/tc-avr.c:928 config/tc-d10v.c:1601 config/tc-d30v.c:1952 +#, c-format +msgid "line %d: unknown relocation type: 0x%x" +msgstr "" + +#: config/tc-avr.c:942 +msgid "only constant expression allowed" +msgstr "" + +#: config/tc-avr.c:981 config/tc-d10v.c:1469 config/tc-d30v.c:1771 +#: config/tc-mn10200.c:1233 config/tc-mn10300.c:1788 config/tc-ppc.c:5153 +#: config/tc-v850.c:2258 +#, c-format +msgid "reloc %d not supported by object file format" +msgstr "" + +#: config/tc-avr.c:1006 config/tc-d10v.c:1085 config/tc-d10v.c:1099 +#: config/tc-h8300.c:1275 config/tc-h8500.c:1121 config/tc-mcore.c:989 +#: config/tc-pj.c:274 config/tc-sh.c:1437 config/tc-z8k.c:1220 +msgid "can't find opcode " +msgstr "" + +#: config/tc-avr.c:1023 +#, c-format +msgid "illegal opcode %s for mcu %s" +msgstr "" + +#: config/tc-avr.c:1031 +msgid "garbage at end of line" +msgstr "" + +#: config/tc-avr.c:1089 +msgid "illegal expression" +msgstr "" + +#: config/tc-avr.c:1111 config/tc-avr.c:1160 +msgid "`)' required" +msgstr "" + +#: config/tc-avr.c:1185 config/tc-avr.c:1192 +#, c-format +msgid "illegal %srelocation size: %d" +msgstr "" + +#: config/tc-d10v.c:235 msgid "" "D10V options:\n" "-O optimize. Will do some operations in parallel.\n" msgstr "" -#: config/tc-d10v.c:547 config/tc-d10v.c:629 config/tc-d30v.c:652 +#: config/tc-d10v.c:554 config/tc-d10v.c:636 config/tc-d30v.c:652 #, c-format msgid "operand out of range: %d" msgstr "" -#: config/tc-d10v.c:690 +#: config/tc-d10v.c:697 msgid "Instruction must be executed in parallel with another instruction." msgstr "" -#: config/tc-d10v.c:742 +#: config/tc-d10v.c:752 msgid "Instruction must be executed in parallel" msgstr "" -#: config/tc-d10v.c:745 +#: config/tc-d10v.c:755 msgid "Long instructions may not be combined." msgstr "" -#: config/tc-d10v.c:785 +#: config/tc-d10v.c:797 msgid "One of these instructions may not be executed in parallel." msgstr "" -#: config/tc-d10v.c:790 config/tc-d30v.c:860 +#: config/tc-d10v.c:801 config/tc-d30v.c:859 msgid "Two IU instructions may not be executed in parallel" msgstr "" -#: config/tc-d10v.c:792 config/tc-d10v.c:800 config/tc-d10v.c:815 -#: config/tc-d10v.c:828 config/tc-d30v.c:861 config/tc-d30v.c:870 +#: config/tc-d10v.c:803 config/tc-d10v.c:811 config/tc-d10v.c:829 +#: config/tc-d10v.c:847 config/tc-d30v.c:860 config/tc-d30v.c:869 msgid "Swapping instruction order" msgstr "" -#: config/tc-d10v.c:798 config/tc-d30v.c:867 +#: config/tc-d10v.c:809 config/tc-d30v.c:866 msgid "Two MU instructions may not be executed in parallel" msgstr "" -#: config/tc-d10v.c:819 config/tc-d30v.c:886 +#: config/tc-d10v.c:833 config/tc-d30v.c:885 msgid "IU instruction may not be in the left container" msgstr "" -#: config/tc-d10v.c:832 config/tc-d30v.c:899 -msgid "MU instruction may not be in the right container" +#: config/tc-d10v.c:835 config/tc-d10v.c:853 +msgid "" +"Instruction in R container is squashed by flow control instruction in L " +"container." msgstr "" -#: config/tc-d10v.c:836 config/tc-d30v.c:907 -msgid "unknown execution type passed to write_2_short()" +#: config/tc-d10v.c:851 config/tc-d30v.c:898 +msgid "MU instruction may not be in the right container" msgstr "" -#: config/tc-d10v.c:1049 config/tc-d10v.c:1063 config/tc-h8300.c:1279 -#: config/tc-h8500.c:1122 config/tc-mcore.c:989 config/tc-pj.c:274 -#: config/tc-sh.c:1355 config/tc-z8k.c:1223 -msgid "can't find opcode " +#: config/tc-d10v.c:860 config/tc-d30v.c:906 +msgid "unknown execution type passed to write_2_short()" msgstr "" -#: config/tc-d10v.c:1076 config/tc-d10v.c:1094 config/tc-d30v.c:1385 +#: config/tc-d10v.c:1112 config/tc-d10v.c:1130 config/tc-d30v.c:1384 msgid "Unable to mix instructions as specified" msgstr "" -#: config/tc-d10v.c:1142 config/tc-d30v.c:1520 +#: config/tc-d10v.c:1178 config/tc-d30v.c:1519 #, c-format msgid "unknown opcode: %s" msgstr "" -#: config/tc-d10v.c:1223 config/tc-d10v.c:1369 config/tc-tic80.c:537 +#: config/tc-d10v.c:1259 config/tc-d10v.c:1426 config/tc-tic80.c:537 msgid "bad opcode or operands" msgstr "" -#: config/tc-d10v.c:1272 config/tc-m68k.c:4232 +#: config/tc-d10v.c:1329 config/tc-m68k.c:4232 msgid "value out of range" msgstr "" -#: config/tc-d10v.c:1344 +#: config/tc-d10v.c:1401 msgid "illegal operand - register name found where none expected" msgstr "" -#: config/tc-d10v.c:1380 config/tc-tic80.c:548 +#: config/tc-d10v.c:1437 config/tc-tic80.c:548 msgid "Register number must be EVEN" msgstr "" -#: config/tc-d10v.c:1412 config/tc-d30v.c:1772 config/tc-mn10200.c:1233 -#: config/tc-mn10300.c:1764 config/tc-ppc.c:5020 config/tc-v850.c:2255 -#, c-format -msgid "reloc %d not supported by object file format" -msgstr "" - -#: config/tc-d10v.c:1525 +#: config/tc-d10v.c:1582 #, c-format msgid "line %d: rep or repi must include at least 4 instructions" msgstr "" -#: config/tc-d10v.c:1544 config/tc-d30v.c:1953 -#, c-format -msgid "line %d: unknown relocation type: 0x%x" -msgstr "" - #: config/tc-d30v.c:191 #, c-format msgid "Register name %s conflicts with symbol of the same name" @@ -2206,91 +2365,91 @@ msgstr "" msgid "parallel" msgstr "" -#: config/tc-d30v.c:856 +#: config/tc-d30v.c:855 msgid "Instructions may not be executed in parallel" msgstr "" -#: config/tc-d30v.c:869 config/tc-d30v.c:876 config/tc-d30v.c:892 -#: config/tc-d30v.c:901 +#: config/tc-d30v.c:868 config/tc-d30v.c:875 config/tc-d30v.c:891 +#: config/tc-d30v.c:900 #, c-format msgid "Executing %s in IU may not work" msgstr "" -#: config/tc-d30v.c:888 +#: config/tc-d30v.c:887 #, c-format msgid "special left instruction `%s' kills instruction `%s' in right container" msgstr "" -#: config/tc-d30v.c:1267 config/tc-d30v.c:1284 +#: config/tc-d30v.c:1266 config/tc-d30v.c:1283 msgid "Cannot assemble instruction" msgstr "" -#: config/tc-d30v.c:1269 +#: config/tc-d30v.c:1268 msgid "First opcode is long. Unable to mix instructions as specified." msgstr "" -#: config/tc-d30v.c:1337 +#: config/tc-d30v.c:1336 msgid "word of NOPs added between word multiply and load" msgstr "" -#: config/tc-d30v.c:1339 +#: config/tc-d30v.c:1338 msgid "word of NOPs added between word multiply and 16-bit multiply" msgstr "" -#: config/tc-d30v.c:1369 +#: config/tc-d30v.c:1368 msgid "Instruction uses long version, so it cannot be mixed as specified" msgstr "" -#: config/tc-d30v.c:1453 config/tc-d30v.c:1490 +#: config/tc-d30v.c:1452 config/tc-d30v.c:1489 #, c-format msgid "unknown condition code: %s" msgstr "" -#: config/tc-d30v.c:1483 +#: config/tc-d30v.c:1482 #, c-format msgid "cmpu doesn't support condition code %s" msgstr "" -#: config/tc-d30v.c:1531 +#: config/tc-d30v.c:1530 #, c-format msgid "operands for opcode `%s' do not match any valid format" msgstr "" -#: config/tc-d30v.c:1744 +#: config/tc-d30v.c:1743 msgid "Odd numbered register used as target of multi-register instruction" msgstr "" -#: config/tc-d30v.c:1842 +#: config/tc-d30v.c:1841 #, c-format msgid "line %d: unable to place address of symbol '%s' into a byte" msgstr "" -#: config/tc-d30v.c:1845 +#: config/tc-d30v.c:1844 #, c-format msgid "line %d: unable to place value %x into a byte" msgstr "" -#: config/tc-d30v.c:1853 +#: config/tc-d30v.c:1852 #, c-format msgid "line %d: unable to place address of symbol '%s' into a short" msgstr "" -#: config/tc-d30v.c:1856 +#: config/tc-d30v.c:1855 #, c-format msgid "line %d: unable to place value %x into a short" msgstr "" -#: config/tc-d30v.c:1864 +#: config/tc-d30v.c:1863 #, c-format msgid "line %d: unable to place address of symbol '%s' into a quad" msgstr "" -#: config/tc-d30v.c:2034 +#: config/tc-d30v.c:2033 #, c-format msgid "value too large to fit in %d bits" msgstr "" -#: config/tc-d30v.c:2178 +#: config/tc-d30v.c:2177 #, c-format msgid "Alignment too large: %d assumed" msgstr "" @@ -2312,33 +2471,33 @@ msgstr "" msgid "Bad call to md_atof()" msgstr "" -#: config/tc-h8300.c:254 config/tc-h8300.c:262 +#: config/tc-h8300.c:253 config/tc-h8300.c:261 msgid "Reg not valid for H8/300" msgstr "" -#: config/tc-h8300.c:423 config/tc-h8300.c:426 config/tc-h8300.c:429 -#: config/tc-h8300.c:433 +#: config/tc-h8300.c:422 config/tc-h8300.c:425 config/tc-h8300.c:428 +#: config/tc-h8300.c:432 msgid "Invalid register list for ldm/stm\n" msgstr "" -#: config/tc-h8300.c:490 config/tc-h8300.c:553 config/tc-h8300.c:560 +#: config/tc-h8300.c:489 config/tc-h8300.c:552 config/tc-h8300.c:559 msgid "Wrong size pointer register for architecture." msgstr "" -#: config/tc-h8300.c:518 config/tc-h8300.c:527 config/tc-h8300.c:537 +#: config/tc-h8300.c:517 config/tc-h8300.c:526 config/tc-h8300.c:536 msgid "expected @(exp, reg16)" msgstr "" -#: config/tc-h8300.c:617 +#: config/tc-h8300.c:616 msgid "expect :8 or :16 here" msgstr "" -#: config/tc-h8300.c:823 +#: config/tc-h8300.c:822 #, c-format msgid "operand %s0x%lx out of range." msgstr "" -#: config/tc-h8300.c:910 +#: config/tc-h8300.c:914 msgid "Can't work out size of operand.\n" msgstr "" @@ -2355,63 +2514,63 @@ msgstr "" msgid "#4 not valid on H8/300." msgstr "" -#: config/tc-h8300.c:1112 config/tc-h8300.c:1150 +#: config/tc-h8300.c:1112 config/tc-h8300.c:1145 #, c-format msgid "branch operand has odd offset (%lx)\n" msgstr "" -#: config/tc-h8300.c:1191 +#: config/tc-h8300.c:1187 msgid "destination operand must be 16 bit register" msgstr "" -#: config/tc-h8300.c:1201 +#: config/tc-h8300.c:1197 msgid "source operand must be 8 bit register" msgstr "" -#: config/tc-h8300.c:1209 +#: config/tc-h8300.c:1205 msgid "destination operand must be 16bit absolute address" msgstr "" -#: config/tc-h8300.c:1216 +#: config/tc-h8300.c:1212 msgid "destination operand must be 8 bit register" msgstr "" -#: config/tc-h8300.c:1225 +#: config/tc-h8300.c:1221 msgid "source operand must be 16bit absolute address" msgstr "" -#: config/tc-h8300.c:1233 +#: config/tc-h8300.c:1229 msgid "invalid operands" msgstr "" -#: config/tc-h8300.c:1290 config/tc-h8500.c:1129 config/tc-mips.c:7966 -#: config/tc-sh.c:1584 config/tc-w65.c:759 config/tc-z8k.c:1235 +#: config/tc-h8300.c:1286 config/tc-h8500.c:1128 config/tc-mips.c:7966 +#: config/tc-sh.c:1666 config/tc-w65.c:759 config/tc-z8k.c:1232 msgid "unknown opcode" msgstr "" -#: config/tc-h8300.c:1336 +#: config/tc-h8300.c:1332 msgid "mismatch between opcode size and operand size" msgstr "" -#: config/tc-h8300.c:1348 config/tc-h8500.c:1157 config/tc-sh.c:1698 -#: config/tc-w65.c:791 config/tc-z8k.c:1290 +#: config/tc-h8300.c:1344 config/tc-h8500.c:1156 config/tc-sh.c:1780 +#: config/tc-w65.c:791 config/tc-z8k.c:1287 msgid "call to tc_crawl_symbol_chain \n" msgstr "" -#: config/tc-h8300.c:1362 config/tc-h8500.c:1171 config/tc-sh.c:1705 -#: config/tc-w65.c:805 config/tc-z8k.c:1304 +#: config/tc-h8300.c:1358 config/tc-h8500.c:1170 config/tc-sh.c:1787 +#: config/tc-w65.c:805 config/tc-z8k.c:1301 msgid "call to tc_headers_hook \n" msgstr "" -#: config/tc-h8300.c:1451 config/tc-h8500.c:1260 config/tc-z8k.c:1415 +#: config/tc-h8300.c:1447 config/tc-h8500.c:1259 config/tc-z8k.c:1412 msgid "call to tc_aout_fix_to_chars \n" msgstr "" -#: config/tc-h8300.c:1461 config/tc-z8k.c:1425 +#: config/tc-h8300.c:1457 config/tc-z8k.c:1422 msgid "call to md_convert_frag \n" msgstr "" -#: config/tc-h8300.c:1506 config/tc-z8k.c:1500 +#: config/tc-h8300.c:1502 config/tc-z8k.c:1497 msgid "call tomd_estimate_size_before_relax \n" msgstr "" @@ -2443,713 +2602,731 @@ msgstr "" msgid "@Rn needs word register" msgstr "" -#: config/tc-h8500.c:845 config/tc-sh.c:1149 +#: config/tc-h8500.c:845 config/tc-sh.c:1160 #, c-format msgid "unhandled %d\n" msgstr "" -#: config/tc-h8500.c:873 config/tc-sh.c:1173 +#: config/tc-h8500.c:873 config/tc-sh.c:1184 #, c-format msgid "operand must be absolute in range %d..%d" msgstr "" -#: config/tc-h8500.c:963 config/tc-sh.c:1299 +#: config/tc-h8500.c:963 config/tc-sh.c:1381 #, c-format msgid "failed for %d\n" msgstr "" -#: config/tc-h8500.c:1145 config/tc-sh.c:1394 config/tc-sh.c:1632 +#: config/tc-h8500.c:1144 config/tc-sh.c:1476 config/tc-sh.c:1714 #: config/tc-w65.c:779 msgid "invalid operands for opcode" msgstr "" -#: config/tc-hppa.c:1140 +#: config/tc-hppa.c:1154 msgid "Missing .exit\n" msgstr "" -#: config/tc-hppa.c:1143 +#: config/tc-hppa.c:1157 msgid "Missing .procend\n" msgstr "" -#: config/tc-hppa.c:1322 +#: config/tc-hppa.c:1336 msgid "Invalid field selector. Assuming F%%." msgstr "" -#: config/tc-hppa.c:1353 +#: config/tc-hppa.c:1367 msgid "-R option not supported on this target." msgstr "" -#: config/tc-hppa.c:1369 config/tc-sparc.c:746 config/tc-sparc.c:781 +#: config/tc-hppa.c:1383 config/tc-sparc.c:763 config/tc-sparc.c:798 #, c-format msgid "Internal error: can't hash `%s': %s\n" msgstr "" -#: config/tc-hppa.c:1377 config/tc-i860.c:191 +#: config/tc-hppa.c:1391 config/tc-i860.c:191 #, c-format msgid "internal error: losing opcode: `%s' \"%s\"\n" msgstr "" -#: config/tc-hppa.c:1446 config/tc-hppa.c:6873 config/tc-hppa.c:6928 +#: config/tc-hppa.c:1460 config/tc-hppa.c:6891 config/tc-hppa.c:6946 msgid "Missing function name for .PROC (corrupted label chain)" msgstr "" -#: config/tc-hppa.c:1449 config/tc-hppa.c:6931 +#: config/tc-hppa.c:1463 config/tc-hppa.c:6949 msgid "Missing function name for .PROC" msgstr "" -#: config/tc-hppa.c:1570 config/tc-hppa.c:4715 +#: config/tc-hppa.c:1584 config/tc-hppa.c:4784 msgid "could not update architecture and machine" msgstr "" -#: config/tc-hppa.c:1783 +#: config/tc-hppa.c:1797 msgid "Invalid Indexed Load Completer." msgstr "" -#: config/tc-hppa.c:1788 +#: config/tc-hppa.c:1802 msgid "Invalid Indexed Load Completer Syntax." msgstr "" -#: config/tc-hppa.c:1824 +#: config/tc-hppa.c:1838 msgid "Invalid Short Load/Store Completer." msgstr "" -#: config/tc-hppa.c:1883 config/tc-hppa.c:1888 +#: config/tc-hppa.c:1897 config/tc-hppa.c:1902 msgid "Invalid Store Bytes Short Completer" msgstr "" -#: config/tc-hppa.c:2199 config/tc-hppa.c:2205 +#: config/tc-hppa.c:2213 config/tc-hppa.c:2219 msgid "Invalid left/right combination completer" msgstr "" -#: config/tc-hppa.c:2254 config/tc-hppa.c:2261 +#: config/tc-hppa.c:2268 config/tc-hppa.c:2275 msgid "Invalid permutation completer" msgstr "" -#: config/tc-hppa.c:2362 +#: config/tc-hppa.c:2376 #, c-format msgid "Invalid Add Condition: %s" msgstr "" -#: config/tc-hppa.c:2373 config/tc-hppa.c:2383 +#: config/tc-hppa.c:2387 config/tc-hppa.c:2397 #, c-format msgid "Invalid Add and Branch Condition: %c" msgstr "" -#: config/tc-hppa.c:2404 +#: config/tc-hppa.c:2418 msgid "Invalid Compare/Subtract Condition" msgstr "" -#: config/tc-hppa.c:2444 +#: config/tc-hppa.c:2458 #, c-format msgid "Invalid Bit Branch Condition: %c" msgstr "" -#: config/tc-hppa.c:2530 +#: config/tc-hppa.c:2544 #, c-format msgid "Invalid Compare/Subtract Condition: %s" msgstr "" -#: config/tc-hppa.c:2542 +#: config/tc-hppa.c:2556 #, c-format msgid "Invalid Compare/Subtract Condition: %c" msgstr "" -#: config/tc-hppa.c:2557 +#: config/tc-hppa.c:2571 msgid "Invalid Compare and Branch Condition." msgstr "" -#: config/tc-hppa.c:2655 +#: config/tc-hppa.c:2669 msgid "Invalid Logical Instruction Condition." msgstr "" -#: config/tc-hppa.c:2711 +#: config/tc-hppa.c:2725 msgid "Invalid Shift/Extract/Deposit Condition." msgstr "" -#: config/tc-hppa.c:2823 +#: config/tc-hppa.c:2837 msgid "Invalid Unit Instruction Condition." msgstr "" -#: config/tc-hppa.c:3096 config/tc-hppa.c:3129 config/tc-hppa.c:3166 -#: config/tc-hppa.c:3205 +#: config/tc-hppa.c:3185 config/tc-hppa.c:3216 config/tc-hppa.c:3249 +#: config/tc-hppa.c:3281 msgid "Branch to unaligned address" msgstr "" -#: config/tc-hppa.c:3389 +#: config/tc-hppa.c:3463 msgid "Invalid SFU identifier" msgstr "" -#: config/tc-hppa.c:3439 +#: config/tc-hppa.c:3513 msgid "Invalid COPR identifier" msgstr "" -#: config/tc-hppa.c:3568 +#: config/tc-hppa.c:3642 msgid "Invalid Floating Point Operand Format." msgstr "" -#: config/tc-hppa.c:3706 config/tc-hppa.c:3730 config/tc-hppa.c:3753 -#: config/tc-hppa.c:3776 config/tc-hppa.c:3799 +#: config/tc-hppa.c:3780 config/tc-hppa.c:3804 config/tc-hppa.c:3827 +#: config/tc-hppa.c:3850 config/tc-hppa.c:3873 msgid "Invalid register for single precision fmpyadd or fmpysub" msgstr "" -#: config/tc-hppa.c:3848 +#: config/tc-hppa.c:3933 #, c-format msgid "Invalid operands %s" msgstr "" -#: config/tc-hppa.c:4415 +#: config/tc-hppa.c:4484 msgid "Unknown relocation encountered in md_apply_fix." msgstr "" -#: config/tc-hppa.c:4425 +#: config/tc-hppa.c:4494 #, c-format msgid "no hppa_fixup entry for this fixup (fixP = 0x%x, type = 0x%x)\n" msgstr "" -#: config/tc-hppa.c:4567 config/tc-hppa.c:4592 +#: config/tc-hppa.c:4636 config/tc-hppa.c:4661 #, c-format msgid "Undefined register: '%s'." msgstr "" -#: config/tc-hppa.c:4630 +#: config/tc-hppa.c:4699 #, c-format msgid "Non-absolute symbol: '%s'." msgstr "" -#: config/tc-hppa.c:4645 +#: config/tc-hppa.c:4714 #, c-format msgid "Undefined absolute constant: '%s'." msgstr "" -#: config/tc-hppa.c:4754 +#: config/tc-hppa.c:4823 #, c-format msgid "Invalid FP Compare Condition: %s" msgstr "" -#: config/tc-hppa.c:4810 +#: config/tc-hppa.c:4879 #, c-format msgid "Invalid FTEST completer: %s" msgstr "" -#: config/tc-hppa.c:4877 config/tc-hppa.c:4915 +#: config/tc-hppa.c:4946 config/tc-hppa.c:4984 #, c-format msgid "Invalid FP Operand Format: %3s" msgstr "" -#: config/tc-hppa.c:4994 +#: config/tc-hppa.c:5063 msgid "Bad segment in expression." msgstr "" -#: config/tc-hppa.c:5053 +#: config/tc-hppa.c:5122 msgid "Bad segment (should be absolute)." msgstr "" -#: config/tc-hppa.c:5152 +#: config/tc-hppa.c:5165 #, c-format msgid "Invalid argument location: %s\n" msgstr "" -#: config/tc-hppa.c:5183 +#: config/tc-hppa.c:5196 #, c-format msgid "Invalid argument description: %d" msgstr "" -#: config/tc-hppa.c:5206 +#: config/tc-hppa.c:5219 #, c-format msgid "Invalid Nullification: (%c)" msgstr "" -#: config/tc-hppa.c:5950 +#: config/tc-hppa.c:5961 #, c-format msgid "Invalid .CALL argument: %s" msgstr "" -#: config/tc-hppa.c:6082 +#: config/tc-hppa.c:6093 msgid ".callinfo is not within a procedure definition" msgstr "" -#: config/tc-hppa.c:6102 +#: config/tc-hppa.c:6113 #, c-format msgid "FRAME parameter must be a multiple of 8: %d\n" msgstr "" -#: config/tc-hppa.c:6121 +#: config/tc-hppa.c:6132 msgid "Value for ENTRY_GR must be in the range 3..18\n" msgstr "" -#: config/tc-hppa.c:6133 +#: config/tc-hppa.c:6144 msgid "Value for ENTRY_FR must be in the range 12..21\n" msgstr "" -#: config/tc-hppa.c:6143 +#: config/tc-hppa.c:6154 msgid "Value for ENTRY_SR must be 3\n" msgstr "" -#: config/tc-hppa.c:6199 +#: config/tc-hppa.c:6210 #, c-format msgid "Invalid .CALLINFO argument: %s" msgstr "" -#: config/tc-hppa.c:6293 +#: config/tc-hppa.c:6304 msgid "The .ENTER pseudo-op is not supported" msgstr "" -#: config/tc-hppa.c:6309 +#: config/tc-hppa.c:6320 msgid "Misplaced .entry. Ignored." msgstr "" -#: config/tc-hppa.c:6313 +#: config/tc-hppa.c:6324 msgid "Missing .callinfo." msgstr "" -#: config/tc-hppa.c:6361 +#: config/tc-hppa.c:6372 msgid ".REG must use a label" msgstr "" -#: config/tc-hppa.c:6363 +#: config/tc-hppa.c:6374 msgid ".EQU must use a label" msgstr "" -#: config/tc-hppa.c:6416 +#: config/tc-hppa.c:6427 msgid ".EXIT must appear within a procedure" msgstr "" -#: config/tc-hppa.c:6420 +#: config/tc-hppa.c:6431 msgid "Missing .callinfo" msgstr "" -#: config/tc-hppa.c:6424 +#: config/tc-hppa.c:6435 msgid "No .ENTRY for this .EXIT" msgstr "" -#: config/tc-hppa.c:6451 +#: config/tc-hppa.c:6462 #, c-format msgid "Cannot define export symbol: %s\n" msgstr "" -#: config/tc-hppa.c:6504 +#: config/tc-hppa.c:6522 #, c-format msgid "Using ENTRY rather than CODE in export directive for %s" msgstr "" -#: config/tc-hppa.c:6613 +#: config/tc-hppa.c:6631 #, c-format msgid "Undefined .EXPORT/.IMPORT argument (ignored): %s" msgstr "" -#: config/tc-hppa.c:6695 +#: config/tc-hppa.c:6713 msgid "Missing label name on .LABEL" msgstr "" -#: config/tc-hppa.c:6700 +#: config/tc-hppa.c:6718 msgid "extra .LABEL arguments ignored." msgstr "" -#: config/tc-hppa.c:6717 +#: config/tc-hppa.c:6735 msgid "The .LEAVE pseudo-op is not supported" msgstr "" -#: config/tc-hppa.c:6756 +#: config/tc-hppa.c:6774 msgid "Unrecognized .LEVEL argument\n" msgstr "" -#: config/tc-hppa.c:6792 +#: config/tc-hppa.c:6810 #, c-format msgid "Cannot define static symbol: %s\n" msgstr "" -#: config/tc-hppa.c:6827 +#: config/tc-hppa.c:6845 msgid "Nested procedures" msgstr "" -#: config/tc-hppa.c:6837 +#: config/tc-hppa.c:6855 msgid "Cannot allocate unwind descriptor\n" msgstr "" -#: config/tc-hppa.c:6935 +#: config/tc-hppa.c:6953 msgid "misplaced .procend" msgstr "" -#: config/tc-hppa.c:6938 +#: config/tc-hppa.c:6956 msgid "Missing .callinfo for this procedure" msgstr "" -#: config/tc-hppa.c:6941 +#: config/tc-hppa.c:6959 msgid "Missing .EXIT for a .ENTRY" msgstr "" -#: config/tc-hppa.c:6980 +#: config/tc-hppa.c:6998 msgid "Not in a space.\n" msgstr "" -#: config/tc-hppa.c:6983 +#: config/tc-hppa.c:7001 msgid "Not in a subspace.\n" msgstr "" -#: config/tc-hppa.c:7073 +#: config/tc-hppa.c:7091 msgid "Invalid .SPACE argument" msgstr "" -#: config/tc-hppa.c:7121 +#: config/tc-hppa.c:7139 msgid "Can't change spaces within a procedure definition. Ignored" msgstr "" -#: config/tc-hppa.c:7248 +#: config/tc-hppa.c:7266 #, c-format msgid "Undefined space: '%s' Assuming space number = 0." msgstr "" -#: config/tc-hppa.c:7272 +#: config/tc-hppa.c:7290 msgid "Must be in a space before changing or declaring subspaces.\n" msgstr "" -#: config/tc-hppa.c:7276 +#: config/tc-hppa.c:7294 msgid "Can't change subspaces within a procedure definition. Ignored" msgstr "" -#: config/tc-hppa.c:7311 +#: config/tc-hppa.c:7329 msgid "Parameters of an existing subspace can't be modified" msgstr "" -#: config/tc-hppa.c:7362 +#: config/tc-hppa.c:7380 msgid "Alignment must be a power of 2" msgstr "" -#: config/tc-hppa.c:7404 +#: config/tc-hppa.c:7422 msgid "FIRST not supported as a .SUBSPACE argument" msgstr "" -#: config/tc-hppa.c:7406 +#: config/tc-hppa.c:7424 msgid "Invalid .SUBSPACE argument" msgstr "" -#: config/tc-hppa.c:7589 +#: config/tc-hppa.c:7607 #, c-format msgid "Internal error: Unable to find containing space for %s." msgstr "" -#: config/tc-hppa.c:7630 +#: config/tc-hppa.c:7648 #, c-format msgid "Out of memory: could not allocate new space chain entry: %s\n" msgstr "" -#: config/tc-hppa.c:7716 +#: config/tc-hppa.c:7734 #, c-format msgid "Out of memory: could not allocate new subspace chain entry: %s\n" msgstr "" -#: config/tc-hppa.c:8383 +#: config/tc-hppa.c:8401 #, c-format msgid "Symbol '%s' could not be created." msgstr "" -#: config/tc-hppa.c:8387 +#: config/tc-hppa.c:8405 msgid "No memory for symbol name." msgstr "" -#: config/tc-i386.c:509 +#: config/tc-i386.c:510 +#, c-format +msgid "%s shortened to %s" +msgstr "" + +#: config/tc-i386.c:562 msgid "same type of prefix used twice" msgstr "" -#: config/tc-i386.c:552 +#: config/tc-i386.c:605 msgid "bad argument to syntax directive." msgstr "" -#: config/tc-i386.c:636 config/tc-m68k.c:3750 +#: config/tc-i386.c:647 +#, c-format +msgid "no such architecture: `%s'" +msgstr "" + +#: config/tc-i386.c:652 +msgid "missing cpu architecture" +msgstr "" + +#: config/tc-i386.c:722 config/tc-m68k.c:3748 #, c-format msgid "Internal Error: Can't hash %s: %s" msgstr "" -#: config/tc-i386.c:866 +#: config/tc-i386.c:952 msgid "Unknown" msgstr "" -#: config/tc-i386.c:914 config/tc-i386.c:4407 +#: config/tc-i386.c:1000 config/tc-i386.c:4471 #, c-format msgid "can not do %d byte pc-relative relocation" msgstr "" -#: config/tc-i386.c:924 config/tc-i386.c:4421 +#: config/tc-i386.c:1010 config/tc-i386.c:4485 #, c-format msgid "can not do %d byte relocation" msgstr "" -#: config/tc-i386.c:1030 config/tc-i386.c:1113 +#: config/tc-i386.c:1115 config/tc-i386.c:1198 #, c-format -msgid "no such 386 instruction: `%s'" +msgid "no such instruction: `%s'" msgstr "" -#: config/tc-i386.c:1039 +#: config/tc-i386.c:1124 #, c-format msgid "invalid character %s in mnemonic" msgstr "" -#: config/tc-i386.c:1046 +#: config/tc-i386.c:1131 msgid "expecting prefix; got nothing" msgstr "" -#: config/tc-i386.c:1048 +#: config/tc-i386.c:1133 msgid "expecting mnemonic; got nothing" msgstr "" -#: config/tc-i386.c:1066 +#: config/tc-i386.c:1151 #, c-format msgid "redundant %s prefix" msgstr "" -#: config/tc-i386.c:1122 +#: config/tc-i386.c:1208 +#, c-format +msgid "`%s' is not supported on `%s'" +msgstr "" + +#: config/tc-i386.c:1213 +msgid "use .code16 to ensure correct addressing mode" +msgstr "" + +#: config/tc-i386.c:1221 #, c-format msgid "expecting string instruction after `%s'" msgstr "" -#: config/tc-i386.c:1145 +#: config/tc-i386.c:1244 #, c-format msgid "invalid character %s before operand %d" msgstr "" -#: config/tc-i386.c:1159 +#: config/tc-i386.c:1258 #, c-format msgid "unbalanced parenthesis in operand %d." msgstr "" -#: config/tc-i386.c:1162 +#: config/tc-i386.c:1261 #, c-format msgid "unbalanced brackets in operand %d." msgstr "" -#: config/tc-i386.c:1171 +#: config/tc-i386.c:1270 #, c-format msgid "invalid character %s in operand %d" msgstr "" -#: config/tc-i386.c:1198 +#: config/tc-i386.c:1297 #, c-format msgid "spurious operands; (%d operands/instruction max)" msgstr "" -#: config/tc-i386.c:1219 +#: config/tc-i386.c:1318 msgid "expecting operand after ','; got nothing" msgstr "" -#: config/tc-i386.c:1224 +#: config/tc-i386.c:1323 msgid "expecting operand before ','; got nothing" msgstr "" #. we found no match -#: config/tc-i386.c:1464 +#: config/tc-i386.c:1563 #, c-format msgid "suffix or operands invalid for `%s'" msgstr "" -#: config/tc-i386.c:1472 +#: config/tc-i386.c:1574 #, c-format msgid "indirect %s without `*'" msgstr "" -#. Warn them that a data or address size prefix doesn't affect -#. assembly of the next line of code. -#: config/tc-i386.c:1479 +#. Warn them that a data or address size prefix doesn't +#. affect assembly of the next line of code. +#: config/tc-i386.c:1582 #, c-format msgid "stand-alone `%s' prefix" msgstr "" -#: config/tc-i386.c:1514 config/tc-i386.c:1529 +#: config/tc-i386.c:1618 config/tc-i386.c:1633 msgid "`%s' operand %d must use `%%es' segment" msgstr "" -#: config/tc-i386.c:1596 config/tc-i386.c:1637 config/tc-i386.c:1664 +#: config/tc-i386.c:1701 config/tc-i386.c:1743 config/tc-i386.c:1771 msgid "using `%%%s' instead of `%%%s' due to `%c' suffix" msgstr "" -#: config/tc-i386.c:1609 config/tc-i386.c:1626 config/tc-i386.c:1653 +#: config/tc-i386.c:1714 config/tc-i386.c:1731 config/tc-i386.c:1759 msgid "`%%%s' not allowed with `%s%c'" msgstr "" -#: config/tc-i386.c:1697 config/tc-i386.c:1717 +#: config/tc-i386.c:1804 config/tc-i386.c:1824 msgid "no instruction mnemonic suffix given; can't determine immediate size" msgstr "" -#: config/tc-i386.c:1742 +#: config/tc-i386.c:1849 msgid "" "no instruction mnemonic suffix given and no register operands; can't size " "instruction" msgstr "" #. reversed arguments on faddp, fsubp, etc. -#: config/tc-i386.c:1844 +#: config/tc-i386.c:1951 msgid "translating to `%s %%%s,%%%s'" msgstr "" #. extraneous `l' suffix on fp insn -#: config/tc-i386.c:1851 +#: config/tc-i386.c:1958 msgid "translating to `%s %%%s'" msgstr "" -#: config/tc-i386.c:2066 +#: config/tc-i386.c:2173 msgid "you can't `pop %%cs'" msgstr "" #. UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. -#: config/tc-i386.c:2097 +#: config/tc-i386.c:2204 #, c-format msgid "translating to `%sp'" msgstr "" -#: config/tc-i386.c:2146 config/tc-i386.c:2208 config/tc-i386.c:2250 +#: config/tc-i386.c:2253 config/tc-i386.c:2316 config/tc-i386.c:2358 msgid "skipping prefixes on this instruction" msgstr "" -#: config/tc-i386.c:2265 +#: config/tc-i386.c:2373 msgid "16-bit jump out of range" msgstr "" -#: config/tc-i386.c:2274 +#: config/tc-i386.c:2382 #, c-format msgid "can't handle non absolute segment in `%s'" msgstr "" -#: config/tc-i386.c:2382 config/tc-i386.c:2432 -#, c-format -msgid "%ld shortened to %ld" -msgstr "" - -#: config/tc-i386.c:2502 +#: config/tc-i386.c:2597 msgid "only 1 or 2 immediate operands are allowed" msgstr "" -#: config/tc-i386.c:2534 config/tc-i386.c:2755 +#: config/tc-i386.c:2629 config/tc-i386.c:2850 msgid "GOT relocations not supported in 16 bit mode" msgstr "" -#: config/tc-i386.c:2555 config/tc-i386.c:2776 +#: config/tc-i386.c:2650 config/tc-i386.c:2871 msgid "bad reloc specifier in expression" msgstr "" -#: config/tc-i386.c:2573 config/tc-i386.c:2810 +#: config/tc-i386.c:2668 config/tc-i386.c:2905 #, c-format msgid "ignoring junk `%s' after expression" msgstr "" #. missing or bad expr becomes absolute 0 -#: config/tc-i386.c:2580 +#: config/tc-i386.c:2675 #, c-format msgid "missing or invalid immediate expression `%s' taken as 0" msgstr "" -#: config/tc-i386.c:2607 config/tc-i386.c:2853 +#: config/tc-i386.c:2702 config/tc-i386.c:2948 #, c-format msgid "unimplemented segment %s in operand" msgstr "" -#: config/tc-i386.c:2609 config/tc-i386.c:2855 +#: config/tc-i386.c:2704 config/tc-i386.c:2950 #, c-format msgid "unimplemented segment type %d in operand" msgstr "" -#: config/tc-i386.c:2653 +#: config/tc-i386.c:2748 #, c-format msgid "expecting scale factor of 1, 2, 4, or 8: got `%s'" msgstr "" -#: config/tc-i386.c:2659 +#: config/tc-i386.c:2754 #, c-format msgid "scale factor of %d without an index register" msgstr "" #. missing or bad expr becomes absolute 0 -#: config/tc-i386.c:2821 +#: config/tc-i386.c:2916 #, c-format msgid "missing or invalid displacement expression `%s' taken as 0" msgstr "" -#: config/tc-i386.c:3035 config/tc-i386.c:3041 config/tc-i386.c:3050 +#: config/tc-i386.c:3130 config/tc-i386.c:3136 config/tc-i386.c:3145 #, c-format msgid "bad segment name `%s'" msgstr "" -#: config/tc-i386.c:3108 +#: config/tc-i386.c:3203 #, c-format msgid "`%s' is not a valid base/index expression" msgstr "" -#: config/tc-i386.c:3112 +#: config/tc-i386.c:3207 #, c-format msgid "`%s' is not a valid %s bit base/index expression" msgstr "" -#: config/tc-i386.c:3133 config/tc-i386.c:3487 +#: config/tc-i386.c:3228 config/tc-i386.c:3582 #, c-format msgid "too many memory references for `%s'" msgstr "" -#: config/tc-i386.c:3219 config/tc-i386.c:3354 config/tc-i386.c:3457 -#: config/tc-i386.c:3572 config/tc-i386.c:3608 +#: config/tc-i386.c:3314 config/tc-i386.c:3449 config/tc-i386.c:3552 +#: config/tc-i386.c:3667 config/tc-i386.c:3703 #, c-format msgid "bad register name `%s'" msgstr "" -#: config/tc-i386.c:3433 +#: config/tc-i386.c:3528 #, c-format msgid "bad memory operand `%s'" msgstr "" -#: config/tc-i386.c:3448 +#: config/tc-i386.c:3543 #, c-format msgid "junk `%s' after register" msgstr "" -#: config/tc-i386.c:3465 +#: config/tc-i386.c:3560 msgid "immediate operand illegal with absolute jump" msgstr "" -#: config/tc-i386.c:3565 +#: config/tc-i386.c:3660 #, c-format msgid "expecting `,' or `)' after index register in `%s'" msgstr "" -#: config/tc-i386.c:3587 +#: config/tc-i386.c:3682 #, c-format msgid "expecting `)' after scale factor in `%s'" msgstr "" -#: config/tc-i386.c:3594 +#: config/tc-i386.c:3689 #, c-format msgid "expecting index register or scale factor after `,'; got '%c'" msgstr "" -#: config/tc-i386.c:3601 +#: config/tc-i386.c:3696 #, c-format msgid "expecting `,' or `)' after base register in `%s'" msgstr "" #. it's not a memory operand; argh! -#: config/tc-i386.c:3641 +#: config/tc-i386.c:3736 #, c-format msgid "invalid char %s beginning operand %d `%s'" msgstr "" -#: config/tc-i386.c:4099 +#: config/tc-i386.c:4169 msgid "Bad call to md_atof ()" msgstr "" -#: config/tc-i386.c:4250 -msgid " -m\t\t\t do long jump\n" +#: config/tc-i386.c:4314 +msgid "" +" -Q ignored\n" +" -V print assembler version number\n" +" -k ignored\n" +" -q quieten some warnings\n" +" -s ignored\n" msgstr "" -#: config/tc-i386.c:4253 -msgid "" -" -V\t\t\t print assembler version number\n" -" -k\t\t\t ignored\n" -" -Qy, -Qn\t\t ignored\n" -" -q\t\t\t ignored\n" -" -s\t\t\t ignored\n" +#: config/tc-i386.c:4321 +msgid " -q quieten some warnings\n" msgstr "" -#: config/tc-i386.c:4307 +#: config/tc-i386.c:4371 msgid "GOT already in symbol table" msgstr "" -#: config/tc-i386.c:4456 +#: config/tc-i386.c:4520 #, c-format msgid "cannot represent relocation type %s" msgstr "" @@ -3185,7 +3362,7 @@ msgstr "" msgid "Illegal operands" msgstr "" -#: config/tc-i860.c:749 config/tc-sparc.c:2644 +#: config/tc-i860.c:749 config/tc-sparc.c:2660 msgid "bad segment" msgstr "" @@ -3409,6 +3586,112 @@ msgstr "" msgid "callj to difference of two symbols" msgstr "" +#: config/tc-ia64.c:3959 +msgid "Register name expected" +msgstr "" + +#: config/tc-ia64.c:3964 config/tc-ia64.c:4246 +msgid "Comma expected" +msgstr "" + +#: config/tc-ia64.c:3972 +msgid "Register value annotation ignored" +msgstr "" + +#: config/tc-ia64.c:3995 +msgid "Directive invalid within a bundle" +msgstr "" + +#: config/tc-ia64.c:4061 +msgid "Missing predicate relation type" +msgstr "" + +#: config/tc-ia64.c:4077 +msgid "Unrecognized predicate relation type" +msgstr "" + +#: config/tc-ia64.c:4097 config/tc-ia64.c:4121 +msgid "Predicate register expected" +msgstr "" + +#: config/tc-ia64.c:4109 +msgid "Duplicate predicate register ignored" +msgstr "" + +#: config/tc-ia64.c:4130 +msgid "Bad register range" +msgstr "" + +#: config/tc-ia64.c:4157 +msgid "Predicate source and target required" +msgstr "" + +#: config/tc-ia64.c:4159 config/tc-ia64.c:4171 +msgid "Use of p0 is not valid in this context" +msgstr "" + +#: config/tc-ia64.c:4166 +msgid "At least two PR arguments expected" +msgstr "" + +#: config/tc-ia64.c:4180 +msgid "At least one PR argument expected" +msgstr "" + +#: config/tc-ia64.c:4216 +#, c-format +msgid "Inserting \"%s\" into entry hint table failed: %s" +msgstr "" + +#. FIXME -- need 62-bit relocation type +#: config/tc-ia64.c:4635 +msgid "62-bit relocation not yet implemented" +msgstr "" + +#: config/tc-ia64.c:4697 +msgid "lower 16 bits of mask ignored" +msgstr "" + +#: config/tc-ia64.c:5104 +msgid "Value truncated to 62 bits" +msgstr "" + +#: config/tc-ia64.c:5610 +#, c-format +msgid "Unrecognized option '-x%s'" +msgstr "" + +#: config/tc-ia64.c:5629 +msgid "" +"IA-64 options:\n" +" -Milp32|-Milp64|-Mlp64|-Mp64\tselect data model (default -Mlp64)\n" +" -Mle | -Mbe\t\t select little- or big-endian byte order (default -Mle)\n" +" -x | -xexplicit\t turn on dependency violation checking (default)\n" +" -xauto\t\t automagically remove dependency violations\n" +" -xdebug\t\t debug dependency violation checker\n" +msgstr "" + +#: config/tc-ia64.c:5905 +msgid "Explicit stops are ignored in auto mode" +msgstr "" + +#: config/tc-ia64.c:5951 +msgid "Found '{' after explicit switch to automatic mode" +msgstr "" + +#: config/tc-ia64.c:7454 +#, c-format +msgid "Unrecognized dependency specifier %d\n" +msgstr "" + +#: config/tc-ia64.c:8196 +msgid "Only the first path encountering the conflict is reported" +msgstr "" + +#: config/tc-ia64.c:8199 +msgid "This is the location of the conflicting usage" +msgstr "" + #. Pretend that we do not recognise this option. #: config/tc-m32r.c:223 msgid "Unrecognised option: -hidden" @@ -3540,7 +3823,7 @@ msgid "" "is this intentional ?" msgstr "" -#: config/tc-m32r.c:1235 config/tc-ppc.c:1337 config/tc-ppc.c:3547 read.c:1378 +#: config/tc-m32r.c:1235 config/tc-ppc.c:1455 config/tc-ppc.c:3673 read.c:1376 msgid "Expected comma after symbol-name: rest of line ignored." msgstr "" @@ -3549,13 +3832,13 @@ msgstr "" msgid ".SCOMMon length (%ld.) <0! Ignored." msgstr "" -#: config/tc-m32r.c:1258 config/tc-ppc.c:1359 config/tc-ppc.c:2266 -#: config/tc-ppc.c:3571 +#: config/tc-m32r.c:1258 config/tc-ppc.c:1477 config/tc-ppc.c:2384 +#: config/tc-ppc.c:3697 msgid "ignoring bad alignment" msgstr "" -#: config/tc-m32r.c:1284 config/tc-ppc.c:1370 config/tc-ppc.c:3583 read.c:1398 -#: read.c:2111 +#: config/tc-m32r.c:1284 config/tc-ppc.c:1488 config/tc-ppc.c:3709 read.c:1396 +#: read.c:2109 #, c-format msgid "Ignoring attempt to re-define symbol `%s'." msgstr "" @@ -3569,6 +3852,322 @@ msgstr "" msgid "Unmatched high/shigh reloc" msgstr "" +#: config/tc-m68hc11.c:312 +#, c-format +msgid "" +"Motorola 68HC11/68HC12 options:\n" +" -m68hc11 | -m68hc12 specify the processor [default %s]\n" +" --force-long-branchs always turn relative branchs into absolute ones\n" +" -S,--short-branchs do not turn relative branchs into absolute ones\n" +" when the offset is out of range\n" +" --strict-direct-mode do not turn the direct mode into extended mode\n" +" when the instruction does not support direct mode\n" +" --print-insn-syntax print the syntax of instruction in case of error\n" +" --print-opcodes print the list of instructions with syntax\n" +" --generate-example generate an example of each instruction\n" +" (used for testing)\n" +msgstr "" + +#: config/tc-m68hc11.c:353 +#, c-format +msgid "Default target `%s' is not supported." +msgstr "" + +#. Dump the opcode statistics table. +#: config/tc-m68hc11.c:372 +msgid "Name # Modes Min ops Max ops Modes mask # Used\n" +msgstr "" + +#: config/tc-m68hc11.c:422 +#, c-format +msgid "Option `%s' is not recognized." +msgstr "" + +#: config/tc-m68hc11.c:646 +msgid "#<imm8>" +msgstr "" + +#: config/tc-m68hc11.c:655 +msgid "#<imm16>" +msgstr "" + +#: config/tc-m68hc11.c:664 config/tc-m68hc11.c:673 +msgid "<imm8>,X" +msgstr "" + +#: config/tc-m68hc11.c:691 +msgid "*<abs8>" +msgstr "" + +#: config/tc-m68hc11.c:703 +msgid "#<mask>" +msgstr "" + +#: config/tc-m68hc11.c:713 +#, c-format +msgid "symbol%d" +msgstr "" + +#: config/tc-m68hc11.c:715 +msgid "<abs>" +msgstr "" + +#: config/tc-m68hc11.c:734 +msgid "<label>" +msgstr "" + +#: config/tc-m68hc11.c:751 +#, c-format +msgid "" +"# Example of `%s' instructions\n" +"\t.sect .text\n" +"_start:\n" +msgstr "" + +#: config/tc-m68hc11.c:801 +#, c-format +msgid "Instruction `%s' is not recognized." +msgstr "" + +#: config/tc-m68hc11.c:806 +#, c-format +msgid "Instruction formats for `%s':" +msgstr "" + +#: config/tc-m68hc11.c:944 +#, c-format +msgid "Immediate operand is not allowed for operand %d." +msgstr "" + +#: config/tc-m68hc11.c:970 +msgid "Indirect indexed addressing is not valid for 68HC11." +msgstr "" + +#: config/tc-m68hc11.c:990 +msgid "Spurious `,' or bad indirect register addressing mode." +msgstr "" + +#: config/tc-m68hc11.c:1006 +msgid "Missing second register or offset for indexed-indirect mode." +msgstr "" + +#: config/tc-m68hc11.c:1016 +msgid "Missing second register for indexed-indirect mode." +msgstr "" + +#: config/tc-m68hc11.c:1032 +msgid "Missing `]' to close indexed-indirect mode." +msgstr "" + +#: config/tc-m68hc11.c:1076 +msgid "Illegal operand." +msgstr "" + +#: config/tc-m68hc11.c:1081 +msgid "Missing operand." +msgstr "" + +#: config/tc-m68hc11.c:1104 +msgid "Pre-decrement mode is not valid for 68HC11" +msgstr "" + +#: config/tc-m68hc11.c:1111 +msgid "Pre-increment mode is not valid for 68HC11" +msgstr "" + +#: config/tc-m68hc11.c:1130 +msgid "Wrong register in register indirect mode." +msgstr "" + +#: config/tc-m68hc11.c:1138 +msgid "Missing `]' to close register indirect operand." +msgstr "" + +#: config/tc-m68hc11.c:1155 +msgid "Post-decrement mode is not valid for 68HC11." +msgstr "" + +#: config/tc-m68hc11.c:1163 +msgid "Post-increment mode is not valid for 68HC11." +msgstr "" + +#: config/tc-m68hc11.c:1180 +msgid "Invalid indexed indirect mode." +msgstr "" + +#: config/tc-m68hc11.c:1281 +#, c-format +msgid "Trap id `%ld' is out of range." +msgstr "" + +#: config/tc-m68hc11.c:1285 +msgid "Trap id must be within [0x30..0x39] or [0x40..0xff]." +msgstr "" + +#: config/tc-m68hc11.c:1292 +#, c-format +msgid "Operand out of 8-bit range: `%ld'." +msgstr "" + +#: config/tc-m68hc11.c:1299 +msgid "The trap id must be a constant." +msgstr "" + +#: config/tc-m68hc11.c:1324 +#, c-format +msgid "Operand `%x' not recognized in fixup8." +msgstr "" + +#: config/tc-m68hc11.c:1344 +#, c-format +msgid "Operand out of 16-bit range: `%ld'." +msgstr "" + +#: config/tc-m68hc11.c:1365 +#, c-format +msgid "Operand `%x' not recognized in fixup16." +msgstr "" + +#: config/tc-m68hc11.c:1384 +#, c-format +msgid "Unexpected branch conversion with `%x'" +msgstr "" + +#: config/tc-m68hc11.c:1480 config/tc-m68hc11.c:1609 +#, c-format +msgid "Operand out of range for a relative branch: `%ld'" +msgstr "" + +#: config/tc-m68hc11.c:1577 +msgid "Invalid register for dbcc/tbcc instruction." +msgstr "" + +#: config/tc-m68hc11.c:1668 +#, c-format +msgid "Increment/decrement value is out of range: `%ld'." +msgstr "" + +#: config/tc-m68hc11.c:1679 +msgid "Expecting a register." +msgstr "" + +#: config/tc-m68hc11.c:1694 +msgid "Invalid register for post/pre increment." +msgstr "" + +#: config/tc-m68hc11.c:1724 +msgid "Invalid register." +msgstr "" + +#: config/tc-m68hc11.c:1731 +#, c-format +msgid "Offset out of 16-bit range: %ld." +msgstr "" + +#: config/tc-m68hc11.c:1736 +msgid "Offset out of 5-bit range for movw/movb insn." +msgstr "" + +#: config/tc-m68hc11.c:1789 +msgid "Expecting register D for indexed indirect mode." +msgstr "" + +#: config/tc-m68hc11.c:1791 +msgid "Indexed indirect mode is not allowed for movb/movw." +msgstr "" + +#: config/tc-m68hc11.c:1808 +msgid "Invalid accumulator register." +msgstr "" + +#: config/tc-m68hc11.c:1833 +msgid "Invalid indexed register." +msgstr "" + +#: config/tc-m68hc11.c:1841 +msgid "Addressing mode not implemented yet." +msgstr "" + +#: config/tc-m68hc11.c:1856 +msgid "Invalid source register for this instruction, use 'tfr'." +msgstr "" + +#: config/tc-m68hc11.c:1858 +msgid "Invalid source register." +msgstr "" + +#: config/tc-m68hc11.c:1863 +msgid "Invalid destination register for this instruction, use 'tfr'." +msgstr "" + +#: config/tc-m68hc11.c:1865 +msgid "Invalid destination register." +msgstr "" + +#: config/tc-m68hc11.c:1954 +msgid "Invalid indexed register, expecting register X." +msgstr "" + +#: config/tc-m68hc11.c:1956 +msgid "Invalid indexed register, expecting register Y." +msgstr "" + +#: config/tc-m68hc11.c:2251 +msgid "No instruction or missing opcode." +msgstr "" + +#: config/tc-m68hc11.c:2316 +#, c-format +msgid "Opcode `%s' is not recognized." +msgstr "" + +#: config/tc-m68hc11.c:2338 +#, c-format +msgid "Garbage at end of instruction: `%s'." +msgstr "" + +#: config/tc-m68hc11.c:2361 +#, c-format +msgid "Invalid operand for `%s'" +msgstr "" + +#: config/tc-m68hc11.c:2420 +#, c-format +msgid "Relocation %d is not supported by object file format." +msgstr "" + +#: config/tc-m68hc11.c:2575 +msgid "bra or bsr with undefined symbol." +msgstr "" + +#: config/tc-m68hc11.c:2683 +#, c-format +msgid "Subtype %d is not recognized." +msgstr "" + +#: config/tc-m68hc11.c:2720 +msgid "Expression too complex." +msgstr "" + +#: config/tc-m68hc11.c:2749 +msgid "Value out of 16-bit range." +msgstr "" + +#: config/tc-m68hc11.c:2768 +#, c-format +msgid "Value %ld too large for 8-bit PC-relative branch." +msgstr "" + +#: config/tc-m68hc11.c:2775 +#, c-format +msgid "Auto increment/decrement offset '%ld' is out of range." +msgstr "" + +#: config/tc-m68hc11.c:2786 +#, c-format +msgid "Line %d: unknown relocation type: 0x%x." +msgstr "" + #: config/tc-m68k.c:646 msgid "Unknown PC relative instruction" msgstr "" @@ -3593,7 +4192,7 @@ msgstr "" msgid "Can not do %d byte pic relocation" msgstr "" -#: config/tc-m68k.c:885 config/tc-mips.c:11262 +#: config/tc-m68k.c:885 config/tc-mips.c:11283 #, c-format msgid "Cannot make %s relocation PC relative" msgstr "" @@ -3630,119 +4229,119 @@ msgstr "" msgid "68010 or higher" msgstr "" -#: config/tc-m68k.c:1848 +#: config/tc-m68k.c:1849 msgid "operands mismatch" msgstr "" -#: config/tc-m68k.c:1905 config/tc-m68k.c:1911 config/tc-m68k.c:1917 +#: config/tc-m68k.c:1906 config/tc-m68k.c:1912 config/tc-m68k.c:1918 msgid "operand out of range" msgstr "" -#: config/tc-m68k.c:1974 +#: config/tc-m68k.c:1975 #, c-format msgid "Bignum too big for %c format; truncated" msgstr "" -#: config/tc-m68k.c:2042 +#: config/tc-m68k.c:2043 msgid "displacement too large for this architecture; needs 68020 or higher" msgstr "" -#: config/tc-m68k.c:2152 +#: config/tc-m68k.c:2153 msgid "" "scale factor invalid on this architecture; needs cpu32 or 68020 or higher" msgstr "" -#: config/tc-m68k.c:2157 +#: config/tc-m68k.c:2158 msgid "invalid index size for coldfire" msgstr "" -#: config/tc-m68k.c:2210 +#: config/tc-m68k.c:2211 msgid "Forcing byte displacement" msgstr "" -#: config/tc-m68k.c:2212 +#: config/tc-m68k.c:2213 msgid "byte displacement out of range" msgstr "" -#: config/tc-m68k.c:2259 config/tc-m68k.c:2297 +#: config/tc-m68k.c:2260 config/tc-m68k.c:2298 msgid "invalid operand mode for this architecture; needs 68020 or higher" msgstr "" -#: config/tc-m68k.c:2283 config/tc-m68k.c:2317 +#: config/tc-m68k.c:2284 config/tc-m68k.c:2318 msgid ":b not permitted; defaulting to :w" msgstr "" -#: config/tc-m68k.c:2399 +#: config/tc-m68k.c:2397 msgid "unsupported byte value; use a different suffix" msgstr "" -#: config/tc-m68k.c:2413 +#: config/tc-m68k.c:2411 msgid "unknown/incorrect operand" msgstr "" -#: config/tc-m68k.c:2446 config/tc-m68k.c:2454 config/tc-m68k.c:2461 -#: config/tc-m68k.c:2468 +#: config/tc-m68k.c:2444 config/tc-m68k.c:2452 config/tc-m68k.c:2459 +#: config/tc-m68k.c:2466 msgid "out of range" msgstr "" -#: config/tc-m68k.c:2518 +#: config/tc-m68k.c:2516 msgid "Can't use long branches on 68000/68010/5200" msgstr "" -#: config/tc-m68k.c:2606 +#: config/tc-m68k.c:2604 msgid "Expression out of range, using 0" msgstr "" -#: config/tc-m68k.c:2718 config/tc-m68k.c:2734 +#: config/tc-m68k.c:2716 config/tc-m68k.c:2732 msgid "Floating point register in register list" msgstr "" -#: config/tc-m68k.c:2724 +#: config/tc-m68k.c:2722 msgid "Wrong register in floating-point reglist" msgstr "" -#: config/tc-m68k.c:2740 +#: config/tc-m68k.c:2738 msgid "incorrect register in reglist" msgstr "" -#: config/tc-m68k.c:2746 +#: config/tc-m68k.c:2744 msgid "wrong register in floating-point reglist" msgstr "" -#: config/tc-m68k.c:2822 +#: config/tc-m68k.c:2820 msgid "failed sanity check" msgstr "" #. ERROR -#: config/tc-m68k.c:3187 +#: config/tc-m68k.c:3185 msgid "Extra )" msgstr "" #. ERROR -#: config/tc-m68k.c:3198 +#: config/tc-m68k.c:3196 msgid "Missing )" msgstr "" -#: config/tc-m68k.c:3215 +#: config/tc-m68k.c:3213 msgid "Missing operand" msgstr "" -#: config/tc-m68k.c:3547 +#: config/tc-m68k.c:3545 #, c-format msgid "%s -- statement `%s' ignored" msgstr "" -#: config/tc-m68k.c:3591 +#: config/tc-m68k.c:3589 #, c-format msgid "Don't know how to figure width of %c in md_assemble()" msgstr "" -#: config/tc-m68k.c:3759 config/tc-m68k.c:3795 +#: config/tc-m68k.c:3757 config/tc-m68k.c:3795 #, c-format msgid "Internal Error: Can't find %s in hash table" msgstr "" -#: config/tc-m68k.c:3762 config/tc-m68k.c:3798 +#: config/tc-m68k.c:3760 config/tc-m68k.c:3798 #, c-format msgid "Internal Error: Can't hash %s: %s" msgstr "" @@ -3777,151 +4376,143 @@ msgstr "" msgid "short branch with zero offset: use :w" msgstr "" -#: config/tc-m68k.c:4351 -msgid "Long branch offset not supported." -msgstr "" - -#: config/tc-m68k.c:4412 +#: config/tc-m68k.c:4415 #, c-format msgid "Internal error (long PC-relative operand) for insn 0x%04x at 0x%lx" msgstr "" -#: config/tc-m68k.c:4443 +#: config/tc-m68k.c:4446 msgid "displacement doesn't fit in one byte" msgstr "" -#: config/tc-m68k.c:4556 -msgid "Long branch offset to extern symbol not supported." -msgstr "" - -#: config/tc-m68k.c:4905 config/tc-m68k.c:4916 +#: config/tc-m68k.c:4909 config/tc-m68k.c:4920 msgid "expression out of range: defaulting to 1" msgstr "" -#: config/tc-m68k.c:4948 +#: config/tc-m68k.c:4952 msgid "expression out of range: defaulting to 0" msgstr "" -#: config/tc-m68k.c:4981 config/tc-m68k.c:4993 +#: config/tc-m68k.c:4985 config/tc-m68k.c:4997 #, c-format msgid "Can't deal with expression; defaulting to %ld" msgstr "" -#: config/tc-m68k.c:5007 +#: config/tc-m68k.c:5011 msgid "expression doesn't fit in BYTE" msgstr "" -#: config/tc-m68k.c:5011 +#: config/tc-m68k.c:5015 msgid "expression doesn't fit in WORD" msgstr "" -#: config/tc-m68k.c:5104 +#: config/tc-m68k.c:5108 #, c-format msgid "%s: unrecognized processor name" msgstr "" -#: config/tc-m68k.c:5169 +#: config/tc-m68k.c:5173 msgid "bad coprocessor id" msgstr "" -#: config/tc-m68k.c:5175 +#: config/tc-m68k.c:5179 msgid "unrecognized fopt option" msgstr "" -#: config/tc-m68k.c:5309 +#: config/tc-m68k.c:5313 #, c-format msgid "option `%s' may not be negated" msgstr "" -#: config/tc-m68k.c:5320 +#: config/tc-m68k.c:5324 #, c-format msgid "option `%s' not recognized" msgstr "" -#: config/tc-m68k.c:5353 +#: config/tc-m68k.c:5357 msgid "bad format of OPT NEST=depth" msgstr "" -#: config/tc-m68k.c:5416 +#: config/tc-m68k.c:5420 msgid "missing label" msgstr "" -#: config/tc-m68k.c:5440 config/tc-m68k.c:5469 +#: config/tc-m68k.c:5444 config/tc-m68k.c:5473 msgid "bad register list" msgstr "" -#: config/tc-m68k.c:5442 +#: config/tc-m68k.c:5446 #, c-format msgid "bad register list: %s" msgstr "" -#: config/tc-m68k.c:5540 +#: config/tc-m68k.c:5544 msgid "restore without save" msgstr "" -#: config/tc-m68k.c:5717 config/tc-m68k.c:6066 +#: config/tc-m68k.c:5721 config/tc-m68k.c:6070 msgid "syntax error in structured control directive" msgstr "" -#: config/tc-m68k.c:5768 +#: config/tc-m68k.c:5772 msgid "missing condition code in structured control directive" msgstr "" -#: config/tc-m68k.c:6100 +#: config/tc-m68k.c:6104 msgid "missing then" msgstr "" -#: config/tc-m68k.c:6182 +#: config/tc-m68k.c:6186 msgid "else without matching if" msgstr "" -#: config/tc-m68k.c:6216 +#: config/tc-m68k.c:6220 msgid "endi without matching if" msgstr "" -#: config/tc-m68k.c:6257 +#: config/tc-m68k.c:6261 msgid "break outside of structured loop" msgstr "" -#: config/tc-m68k.c:6296 +#: config/tc-m68k.c:6300 msgid "next outside of structured loop" msgstr "" -#: config/tc-m68k.c:6348 +#: config/tc-m68k.c:6352 msgid "missing =" msgstr "" -#: config/tc-m68k.c:6386 +#: config/tc-m68k.c:6390 msgid "missing to or downto" msgstr "" -#: config/tc-m68k.c:6422 config/tc-m68k.c:6456 config/tc-m68k.c:6666 +#: config/tc-m68k.c:6426 config/tc-m68k.c:6460 config/tc-m68k.c:6670 msgid "missing do" msgstr "" -#: config/tc-m68k.c:6559 +#: config/tc-m68k.c:6563 msgid "endf without for" msgstr "" -#: config/tc-m68k.c:6615 +#: config/tc-m68k.c:6619 msgid "until without repeat" msgstr "" -#: config/tc-m68k.c:6702 +#: config/tc-m68k.c:6706 msgid "endw without while" msgstr "" -#: config/tc-m68k.c:6818 +#: config/tc-m68k.c:6822 #, c-format msgid "unrecognized option `%s'" msgstr "" -#: config/tc-m68k.c:6863 +#: config/tc-m68k.c:6867 #, c-format msgid "unrecognized architecture specification `%s'" msgstr "" -#: config/tc-m68k.c:6933 +#: config/tc-m68k.c:6937 msgid "" "680X0 options:\n" "-l\t\t\tuse 1 word for refs to undefined symbols [default 2]\n" @@ -3934,7 +4525,7 @@ msgid "" "\t\t\t[default yes for 68020, 68030, and cpu32]\n" msgstr "" -#: config/tc-m68k.c:6943 +#: config/tc-m68k.c:6947 msgid "" "-m68851 | -mno-68851\n" "\t\t\ttarget has/lacks memory-management unit coprocessor\n" @@ -3946,7 +4537,7 @@ msgid "" "--bitwise-or\t\tdo not treat `|' as a comment character\n" msgstr "" -#: config/tc-m68k.c:6952 +#: config/tc-m68k.c:6956 msgid "" "--base-size-default-16\tbase reg without size is 16 bits\n" "--base-size-default-32\tbase reg without size is 32 bits (default)\n" @@ -3954,12 +4545,12 @@ msgid "" "--disp-size-default-32\tdisplacement with unknown size is 32 bits (default)\n" msgstr "" -#: config/tc-m68k.c:6987 +#: config/tc-m68k.c:6991 #, c-format msgid "Error %s in %s\n" msgstr "" -#: config/tc-m68k.c:6991 +#: config/tc-m68k.c:6995 #, c-format msgid "Opcode(%d.%s): " msgstr "" @@ -4020,7 +4611,7 @@ msgstr "" msgid "Relaxation should never occur" msgstr "" -#: config/tc-m88k.c:1267 config/tc-sparc.c:3363 read.c:1973 +#: config/tc-m88k.c:1267 config/tc-sparc.c:3463 read.c:1971 #, c-format msgid "BSS length (%d.) <0! Ignored." msgstr "" @@ -4243,7 +4834,7 @@ msgstr "" msgid "pc-relative" msgstr "" -#: config/tc-mcore.c:2421 config/tc-pj.c:586 config/tc-sh.c:3005 +#: config/tc-mcore.c:2421 config/tc-pj.c:586 config/tc-sh.c:3100 #, c-format msgid "Cannot represent relocation type %s" msgstr "" @@ -4275,7 +4866,7 @@ msgstr "" msgid "returned from mips_ip(%s) insn_opcode = 0x%x\n" msgstr "" -#: config/tc-mips.c:1816 config/tc-mips.c:11394 +#: config/tc-mips.c:1816 config/tc-mips.c:11415 msgid "extended instruction in delay slot" msgstr "" @@ -4521,45 +5112,45 @@ msgstr "" msgid "operand value out of range for instruction" msgstr "" -#: config/tc-mips.c:9052 +#: config/tc-mips.c:9068 #, c-format msgid "ignoring invalid leading 'v' in -mcpu=%s switch" msgstr "" -#: config/tc-mips.c:9058 +#: config/tc-mips.c:9074 #, c-format msgid "invalid architecture -mcpu=%s" msgstr "" -#: config/tc-mips.c:9108 +#: config/tc-mips.c:9124 msgid "-G may not be used with embedded PIC code" msgstr "" -#: config/tc-mips.c:9120 +#: config/tc-mips.c:9136 msgid "-call_shared is supported only for ELF format" msgstr "" -#: config/tc-mips.c:9126 config/tc-mips.c:10205 config/tc-mips.c:10373 +#: config/tc-mips.c:9142 config/tc-mips.c:10221 config/tc-mips.c:10389 msgid "-G may not be used with SVR4 PIC code" msgstr "" -#: config/tc-mips.c:9135 +#: config/tc-mips.c:9151 msgid "-non_shared is supported only for ELF format" msgstr "" -#: config/tc-mips.c:9151 +#: config/tc-mips.c:9167 msgid "-G is not supported for this configuration" msgstr "" -#: config/tc-mips.c:9156 +#: config/tc-mips.c:9172 msgid "-G may not be used with SVR4 or embedded PIC code" msgstr "" -#: config/tc-mips.c:9180 +#: config/tc-mips.c:9196 msgid "No compiled in support for 64 bit object file format" msgstr "" -#: config/tc-mips.c:9270 +#: config/tc-mips.c:9286 msgid "" "MIPS options:\n" "-membedded-pic\t\tgenerate embedded position independent code\n" @@ -4570,7 +5161,7 @@ msgid "" "\t\t\timplicitly with the gp register [default 8]\n" msgstr "" -#: config/tc-mips.c:9278 +#: config/tc-mips.c:9294 msgid "" "-mips1\t\t\tgenerate MIPS ISA I instructions\n" "-mips2\t\t\tgenerate MIPS ISA II instructions\n" @@ -4579,20 +5170,20 @@ msgid "" "-mcpu=CPU\t\tgenerate code for CPU, where CPU is one of:\n" msgstr "" -#: config/tc-mips.c:9304 +#: config/tc-mips.c:9320 msgid "" "-mCPU\t\t\tequivalent to -mcpu=CPU.\n" "-no-mCPU\t\tdon't generate code specific to CPU.\n" "\t\t\tFor -mCPU and -no-mCPU, CPU must be one of:\n" msgstr "" -#: config/tc-mips.c:9317 +#: config/tc-mips.c:9333 msgid "" "-mips16\t\t\tgenerate mips16 instructions\n" "-no-mips16\t\tdo not generate mips16 instructions\n" msgstr "" -#: config/tc-mips.c:9320 +#: config/tc-mips.c:9336 msgid "" "-O0\t\t\tremove unneeded NOPs, do not swap branches\n" "-O\t\t\tremove unneeded NOPs and swap branches\n" @@ -4600,7 +5191,7 @@ msgid "" "--break, --no-trap\tbreak exception on div by 0 and mult overflow\n" msgstr "" -#: config/tc-mips.c:9326 +#: config/tc-mips.c:9342 msgid "" "-KPIC, -call_shared\tgenerate SVR4 position independent code\n" "-non_shared\t\tdo not generate position independent code\n" @@ -4609,170 +5200,170 @@ msgid "" "-64\t\t\tcreate 64 bit object file\n" msgstr "" -#: config/tc-mips.c:9383 +#: config/tc-mips.c:9399 #, c-format msgid "Unsupported reloc size %d" msgstr "" -#: config/tc-mips.c:9486 +#: config/tc-mips.c:9502 msgid "Unmatched %%hi reloc" msgstr "" -#: config/tc-mips.c:9610 +#: config/tc-mips.c:9626 msgid "Invalid PC relative reloc" msgstr "" -#: config/tc-mips.c:9720 config/tc-sparc.c:2925 config/tc-sparc.c:2932 -#: config/tc-sparc.c:2939 config/tc-sparc.c:2946 config/tc-sparc.c:2953 -#: config/tc-sparc.c:2962 config/tc-sparc.c:2973 config/tc-sparc.c:2999 -#: config/tc-sparc.c:3027 write.c:971 write.c:1035 +#: config/tc-mips.c:9736 config/tc-sparc.c:3025 config/tc-sparc.c:3032 +#: config/tc-sparc.c:3039 config/tc-sparc.c:3046 config/tc-sparc.c:3053 +#: config/tc-sparc.c:3062 config/tc-sparc.c:3073 config/tc-sparc.c:3099 +#: config/tc-sparc.c:3127 write.c:971 write.c:1035 msgid "relocation overflow" msgstr "" -#: config/tc-mips.c:9736 +#: config/tc-mips.c:9752 #, c-format msgid "Branch to odd address (%lx)" msgstr "" -#: config/tc-mips.c:9900 +#: config/tc-mips.c:9916 #, c-format msgid "%08lx UNDEFINED\n" msgstr "" -#: config/tc-mips.c:9966 +#: config/tc-mips.c:9982 msgid "Alignment negative: 0 assumed." msgstr "" -#: config/tc-mips.c:10054 +#: config/tc-mips.c:10070 msgid "No read only data section in this object file format" msgstr "" -#: config/tc-mips.c:10077 +#: config/tc-mips.c:10093 msgid "Global pointers not supported; recompile -G 0" msgstr "" -#: config/tc-mips.c:10163 +#: config/tc-mips.c:10179 #, c-format msgid "%s: no such section" msgstr "" -#: config/tc-mips.c:10200 +#: config/tc-mips.c:10216 #, c-format msgid ".option pic%d not supported" msgstr "" -#: config/tc-mips.c:10211 +#: config/tc-mips.c:10227 #, c-format msgid "Unrecognized option \"%s\"" msgstr "" -#: config/tc-mips.c:10274 +#: config/tc-mips.c:10290 msgid "`noreorder' must be set before `nomacro'" msgstr "" -#: config/tc-mips.c:10309 +#: config/tc-mips.c:10325 msgid "unknown ISA level" msgstr "" -#: config/tc-mips.c:10332 +#: config/tc-mips.c:10348 msgid ".set pop with no .set push" msgstr "" -#: config/tc-mips.c:10356 +#: config/tc-mips.c:10372 #, c-format msgid "Tried to set unrecognized symbol: %s\n" msgstr "" -#: config/tc-mips.c:10406 +#: config/tc-mips.c:10422 msgid ".cpload not in noreorder section" msgstr "" -#: config/tc-mips.c:10488 +#: config/tc-mips.c:10504 msgid "Unsupported use of .gpword" msgstr "" -#: config/tc-mips.c:10625 +#: config/tc-mips.c:10641 msgid "expected `$'" msgstr "" -#: config/tc-mips.c:10633 +#: config/tc-mips.c:10649 msgid "Bad register number" msgstr "" -#: config/tc-mips.c:10649 +#: config/tc-mips.c:10665 msgid "Unrecognized register name" msgstr "" -#: config/tc-mips.c:10848 +#: config/tc-mips.c:10864 msgid "unsupported PC relative reference to different section" msgstr "" -#: config/tc-mips.c:10957 +#: config/tc-mips.c:10973 msgid "unsupported relocation" msgstr "" -#: config/tc-mips.c:11040 +#: config/tc-mips.c:11061 msgid "AT used after \".set noat\" or macro used after \".set nomacro\"" msgstr "" -#: config/tc-mips.c:11103 +#: config/tc-mips.c:11124 msgid "Double check fx_r_type in tc-mips.c:tc_gen_reloc" msgstr "" -#: config/tc-mips.c:11615 +#: config/tc-mips.c:11636 msgid "missing `.end' at end of assembly" msgstr "" -#: config/tc-mips.c:11630 +#: config/tc-mips.c:11651 msgid "Expected simple number." msgstr "" -#: config/tc-mips.c:11656 +#: config/tc-mips.c:11677 #, c-format msgid " *input_line_pointer == '%c' 0x%02x\n" msgstr "" -#: config/tc-mips.c:11658 +#: config/tc-mips.c:11679 msgid "Invalid number" msgstr "" -#: config/tc-mips.c:11713 +#: config/tc-mips.c:11734 msgid ".end not in text section" msgstr "" -#: config/tc-mips.c:11717 +#: config/tc-mips.c:11738 msgid ".end directive without a preceding .ent directive." msgstr "" -#: config/tc-mips.c:11726 +#: config/tc-mips.c:11747 msgid ".end symbol does not match .ent symbol." msgstr "" -#: config/tc-mips.c:11729 +#: config/tc-mips.c:11750 msgid ".end directive missing or unknown symbol" msgstr "" -#: config/tc-mips.c:11804 +#: config/tc-mips.c:11825 msgid ".ent or .aent not in text section." msgstr "" -#: config/tc-mips.c:11807 +#: config/tc-mips.c:11828 msgid "missing `.end'" msgstr "" -#: config/tc-mips.c:11840 ecoff.c:3227 +#: config/tc-mips.c:11861 ecoff.c:3227 msgid ".frame outside of .ent" msgstr "" -#: config/tc-mips.c:11851 ecoff.c:3238 +#: config/tc-mips.c:11872 ecoff.c:3238 msgid "Bad .frame directive" msgstr "" -#: config/tc-mips.c:11881 +#: config/tc-mips.c:11902 msgid ".mask/.fmask outside of .ent" msgstr "" -#: config/tc-mips.c:11888 +#: config/tc-mips.c:11909 msgid "Bad .mask/.fmask directive" msgstr "" @@ -4782,23 +5373,23 @@ msgid "" "none yet\n" msgstr "" -#: config/tc-mn10200.c:788 config/tc-mn10300.c:914 config/tc-ppc.c:1614 -#: config/tc-v850.c:1691 +#: config/tc-mn10200.c:788 config/tc-mn10300.c:920 config/tc-ppc.c:1732 +#: config/tc-v850.c:1692 #, c-format msgid "Unrecognized opcode: `%s'" msgstr "" -#: config/tc-mn10300.c:497 +#: config/tc-mn10300.c:503 msgid "" "MN10300 options:\n" "none yet\n" msgstr "" -#: config/tc-mn10300.c:932 +#: config/tc-mn10300.c:938 msgid "Invalid opcode/operands" msgstr "" -#: config/tc-mn10300.c:1409 +#: config/tc-mn10300.c:1416 msgid "Invalid register specification." msgstr "" @@ -4989,21 +5580,21 @@ msgid "" "-big\t\t\tgenerate big endian code\n" msgstr "" -#: config/tc-pj.c:472 config/tc-sh.c:2577 config/tc-sh.c:2584 -#: config/tc-sh.c:2591 config/tc-sh.c:2598 +#: config/tc-pj.c:472 config/tc-sh.c:2661 config/tc-sh.c:2668 +#: config/tc-sh.c:2675 config/tc-sh.c:2682 msgid "pcrel too far" msgstr "" -#: config/tc-pj.c:541 config/tc-sh.c:2670 +#: config/tc-pj.c:541 config/tc-sh.c:2757 msgid "offset out of range" msgstr "" -#: config/tc-ppc.c:835 +#: config/tc-ppc.c:922 #, c-format msgid "invalid switch -m%s" msgstr "" -#: config/tc-ppc.c:872 +#: config/tc-ppc.c:959 msgid "" "PowerPC options:\n" "-u\t\t\tignored\n" @@ -5020,7 +5611,7 @@ msgid "" "-mno-regnames\t\tDo not allow symbolic names for registers\n" msgstr "" -#: config/tc-ppc.c:887 +#: config/tc-ppc.c:974 msgid "" "-mrelocatable\t\tsupport for GCC's -mrelocatble option\n" "-mrelocatable-lib\tsupport for GCC's -mrelocatble-lib option\n" @@ -5034,305 +5625,305 @@ msgid "" "-Qy, -Qn\t\tignored\n" msgstr "" -#: config/tc-ppc.c:922 +#: config/tc-ppc.c:1009 #, c-format msgid "Unknown default cpu = %s, os = %s" msgstr "" -#: config/tc-ppc.c:947 +#: config/tc-ppc.c:1034 msgid "Neither Power nor PowerPC opcodes were selected." msgstr "" -#: config/tc-ppc.c:995 +#: config/tc-ppc.c:1113 #, c-format msgid "Internal assembler error for instruction %s" msgstr "" -#: config/tc-ppc.c:1014 +#: config/tc-ppc.c:1132 #, c-format msgid "Internal assembler error for macro %s" msgstr "" -#: config/tc-ppc.c:1224 +#: config/tc-ppc.c:1342 msgid "identifier+constant@got means identifier@got+constant" msgstr "" -#: config/tc-ppc.c:1278 +#: config/tc-ppc.c:1396 #, c-format msgid "%s relocations do not fit in %d bytes\n" msgstr "" -#: config/tc-ppc.c:1378 +#: config/tc-ppc.c:1496 #, c-format msgid "Length of .lcomm \"%s\" is already %ld. Not changed to %ld." msgstr "" -#: config/tc-ppc.c:1460 +#: config/tc-ppc.c:1578 msgid "Relocation cannot be done when using -mrelocatable" msgstr "" -#: config/tc-ppc.c:1541 +#: config/tc-ppc.c:1659 #, c-format msgid "syntax error: invalid toc specifier `%s'" msgstr "" -#: config/tc-ppc.c:1555 +#: config/tc-ppc.c:1673 #, c-format msgid "syntax error: expected `]', found `%c'" msgstr "" -#: config/tc-ppc.c:1790 +#: config/tc-ppc.c:1908 msgid "[tocv] symbol is not a toc symbol" msgstr "" -#: config/tc-ppc.c:1801 +#: config/tc-ppc.c:1919 msgid "Unimplemented toc32 expression modifier" msgstr "" -#: config/tc-ppc.c:1806 +#: config/tc-ppc.c:1924 msgid "Unimplemented toc64 expression modifier" msgstr "" -#: config/tc-ppc.c:1810 +#: config/tc-ppc.c:1928 #, c-format msgid "Unexpected return value [%d] from parse_toc_entry!\n" msgstr "" -#: config/tc-ppc.c:1963 +#: config/tc-ppc.c:2081 #, c-format msgid "syntax error; found `%c' but expected `%c'" msgstr "" -#: config/tc-ppc.c:2071 +#: config/tc-ppc.c:2189 msgid "wrong number of operands" msgstr "" -#: config/tc-ppc.c:2127 +#: config/tc-ppc.c:2245 msgid "Bad .section directive: want a,w,x,e in string" msgstr "" -#: config/tc-ppc.c:2241 +#: config/tc-ppc.c:2359 msgid "missing size" msgstr "" -#: config/tc-ppc.c:2250 +#: config/tc-ppc.c:2368 msgid "negative size" msgstr "" -#: config/tc-ppc.c:2291 +#: config/tc-ppc.c:2409 msgid "missing real symbol name" msgstr "" -#: config/tc-ppc.c:2312 +#: config/tc-ppc.c:2430 msgid "attempt to redefine symbol" msgstr "" -#: config/tc-ppc.c:2546 +#: config/tc-ppc.c:2664 msgid "The XCOFF file format does not support arbitrary sections" msgstr "" -#: config/tc-ppc.c:2654 config/tc-ppc.c:3171 read.c:2985 +#: config/tc-ppc.c:2772 config/tc-ppc.c:3297 read.c:2983 msgid "missing value" msgstr "" -#: config/tc-ppc.c:2672 +#: config/tc-ppc.c:2790 msgid "illegal .stabx expression; zero assumed" msgstr "" -#: config/tc-ppc.c:2704 +#: config/tc-ppc.c:2822 msgid "missing class" msgstr "" -#: config/tc-ppc.c:2713 +#: config/tc-ppc.c:2831 msgid "missing type" msgstr "" -#: config/tc-ppc.c:2774 +#: config/tc-ppc.c:2892 msgid "missing symbol name" msgstr "" -#: config/tc-ppc.c:2950 +#: config/tc-ppc.c:3068 msgid "nested .bs blocks" msgstr "" -#: config/tc-ppc.c:2983 +#: config/tc-ppc.c:3101 msgid ".es without preceding .bs" msgstr "" -#: config/tc-ppc.c:3163 +#: config/tc-ppc.c:3289 msgid "non-constant byte count" msgstr "" -#: config/tc-ppc.c:3208 +#: config/tc-ppc.c:3334 msgid ".tc not in .toc section" msgstr "" -#: config/tc-ppc.c:3227 +#: config/tc-ppc.c:3353 msgid ".tc with no label" msgstr "" -#: config/tc-ppc.c:3302 +#: config/tc-ppc.c:3428 msgid "No previous section to return to. Directive ignored." msgstr "" #. Section Contents #. unknown -#: config/tc-ppc.c:3721 +#: config/tc-ppc.c:3847 msgid "Unsupported section attribute -- 'a'" msgstr "" -#: config/tc-ppc.c:3911 +#: config/tc-ppc.c:4037 msgid "bad symbol suffix" msgstr "" -#: config/tc-ppc.c:4004 +#: config/tc-ppc.c:4130 msgid "Unrecognized symbol suffix" msgstr "" -#: config/tc-ppc.c:4086 +#: config/tc-ppc.c:4212 msgid "two .function pseudo-ops with no intervening .ef" msgstr "" -#: config/tc-ppc.c:4099 +#: config/tc-ppc.c:4225 msgid ".ef with no preceding .function" msgstr "" -#: config/tc-ppc.c:4227 +#: config/tc-ppc.c:4353 #, c-format msgid "warning: symbol %s has no csect" msgstr "" -#: config/tc-ppc.c:4528 +#: config/tc-ppc.c:4654 msgid "symbol in .toc does not match any .tc" msgstr "" -#: config/tc-ppc.c:4826 +#: config/tc-ppc.c:4951 msgid "unsupported relocation type" msgstr "" -#: config/tc-ppc.c:4880 +#: config/tc-ppc.c:5013 #, c-format msgid "cannot emit PC relative %s relocation against %s" msgstr "" -#: config/tc-ppc.c:4885 +#: config/tc-ppc.c:5018 #, c-format msgid "cannot emit PC relative %s relocation" msgstr "" -#: config/tc-ppc.c:4947 +#: config/tc-ppc.c:5080 msgid "must branch to an address a multiple of 4" msgstr "" -#: config/tc-ppc.c:4951 +#: config/tc-ppc.c:5084 #, c-format msgid "@local or @plt branch destination is too far away, %ld bytes" msgstr "" -#: config/tc-ppc.c:4975 +#: config/tc-ppc.c:5108 #, c-format msgid "Gas failure, reloc value %d\n" msgstr "" -#: config/tc-sh.c:675 +#: config/tc-sh.c:681 msgid "illegal register after @-" msgstr "" -#: config/tc-sh.c:691 +#: config/tc-sh.c:697 msgid "must be @(r0,...)" msgstr "" -#: config/tc-sh.c:707 +#: config/tc-sh.c:713 msgid "syntax error in @(r0,...)" msgstr "" -#: config/tc-sh.c:739 config/tc-sh.c:744 +#: config/tc-sh.c:745 config/tc-sh.c:750 msgid "syntax error in @(disp,[Rn, gbr, pc])" msgstr "" -#: config/tc-sh.c:749 +#: config/tc-sh.c:755 msgid "expecting )" msgstr "" -#: config/tc-sh.c:758 +#: config/tc-sh.c:764 msgid "illegal register after @" msgstr "" -#: config/tc-sh.c:1262 +#: config/tc-sh.c:1324 #, c-format msgid "Invalid register: 'r%d'" msgstr "" -#: config/tc-sh.c:1398 +#: config/tc-sh.c:1480 msgid "insn can't be combined with parallel processing insn" msgstr "" -#: config/tc-sh.c:1405 config/tc-sh.c:1416 +#: config/tc-sh.c:1487 config/tc-sh.c:1498 msgid "multiple movx specifications" msgstr "" -#: config/tc-sh.c:1410 config/tc-sh.c:1437 +#: config/tc-sh.c:1492 config/tc-sh.c:1519 msgid "multiple movy specifications" msgstr "" -#: config/tc-sh.c:1418 +#: config/tc-sh.c:1500 msgid "invalid movx address register" msgstr "" -#: config/tc-sh.c:1424 config/tc-sh.c:1429 +#: config/tc-sh.c:1506 config/tc-sh.c:1511 msgid "invalid movx dsp register" msgstr "" -#: config/tc-sh.c:1446 config/tc-sh.c:1451 +#: config/tc-sh.c:1528 config/tc-sh.c:1533 msgid "invalid movy dsp register" msgstr "" -#: config/tc-sh.c:1455 +#: config/tc-sh.c:1537 msgid "invalid movy address register" msgstr "" -#: config/tc-sh.c:1461 +#: config/tc-sh.c:1543 msgid "dsp immediate shift value not constant" msgstr "" -#: config/tc-sh.c:1468 config/tc-sh.c:1481 +#: config/tc-sh.c:1550 config/tc-sh.c:1563 msgid "multiple parallel processing specifications" msgstr "" -#: config/tc-sh.c:1474 +#: config/tc-sh.c:1556 msgid "multiple condition specifications" msgstr "" -#: config/tc-sh.c:1490 +#: config/tc-sh.c:1572 msgid "insn cannot be combined with pmuls" msgstr "" -#: config/tc-sh.c:1507 +#: config/tc-sh.c:1589 msgid "bad padd / psub pmuls output operand" msgstr "" -#: config/tc-sh.c:1517 +#: config/tc-sh.c:1599 msgid "condition not followed by conditionalizable insn" msgstr "" -#: config/tc-sh.c:1527 +#: config/tc-sh.c:1609 msgid "unrecognized characters at end of parallel processing insn" msgstr "" -#: config/tc-sh.c:1637 +#: config/tc-sh.c:1719 #, c-format msgid "excess operands: '%s'" msgstr "" -#: config/tc-sh.c:1783 +#: config/tc-sh.c:1865 msgid ".uses pseudo-op seen when not relaxing" msgstr "" -#: config/tc-sh.c:1789 +#: config/tc-sh.c:1871 msgid "bad .uses format" msgstr "" -#: config/tc-sh.c:1850 +#: config/tc-sh.c:1932 msgid "" "SH options:\n" "-little\t\t\tgenerate little endian code\n" @@ -5341,139 +5932,141 @@ msgid "" "-dsp\t\t\tenable sh-dsp insns, and disable sh3e / sh4 insns.\n" msgstr "" -#: config/tc-sh.c:1861 config/tc-w65.c:883 +#: config/tc-sh.c:1943 config/tc-w65.c:883 msgid "call to tc_Nout_fix_to_chars \n" msgstr "" -#: config/tc-sh.c:1947 +#: config/tc-sh.c:2029 msgid ".uses does not refer to a local symbol in the same section" msgstr "" -#: config/tc-sh.c:1966 +#: config/tc-sh.c:2048 msgid "can't find fixup pointed to by .uses" msgstr "" -#: config/tc-sh.c:1989 +#: config/tc-sh.c:2071 msgid ".uses target does not refer to a local symbol in the same section" msgstr "" -#: config/tc-sh.c:2086 +#: config/tc-sh.c:2168 #, c-format msgid "at 0x%lx, displacement overflows 12-bit field" msgstr "" -#: config/tc-sh.c:2089 +#: config/tc-sh.c:2171 #, c-format msgid "at 0x%lx, displacement to defined symbol %s overflows 12-bit field" msgstr "" -#: config/tc-sh.c:2093 +#: config/tc-sh.c:2175 #, c-format msgid "at 0x%lx, displacement to undefined symbol %s overflows 12-bit field" msgstr "" -#: config/tc-sh.c:2209 +#: config/tc-sh.c:2291 #, c-format msgid "at 0x%lx, displacement overflows 8-bit field" msgstr "" -#: config/tc-sh.c:2212 +#: config/tc-sh.c:2294 #, c-format msgid "at 0x%lx, displacement to defined symbol %s overflows 8-bit field " msgstr "" -#: config/tc-sh.c:2216 +#: config/tc-sh.c:2298 #, c-format msgid "at 0x%lx, displacement to undefined symbol %s overflows 8-bit field " msgstr "" -#: config/tc-sh.c:2269 +#: config/tc-sh.c:2351 #, c-format msgid "overflow in branch to %s; converted into longer instruction sequence" msgstr "" -#: config/tc-sh.c:2344 config/tc-sh.c:2372 config/tc-sparc.c:3902 -#: config/tc-sparc.c:3921 +#: config/tc-sh.c:2426 config/tc-sh.c:2454 config/tc-sparc.c:4002 +#: config/tc-sparc.c:4021 msgid "misaligned data" msgstr "" -#: config/tc-sh.c:2662 +#: config/tc-sh.c:2749 msgid "misaligned offset" msgstr "" -#: config/tc-sparc.c:268 +#: config/tc-sparc.c:271 msgid "Invalid default architecture, broken assembler." msgstr "" -#: config/tc-sparc.c:272 config/tc-sparc.c:465 +#: config/tc-sparc.c:275 config/tc-sparc.c:472 msgid "Bad opcode table, broken assembler." msgstr "" -#: config/tc-sparc.c:444 +#: config/tc-sparc.c:451 #, c-format msgid "invalid architecture -xarch=%s" msgstr "" -#: config/tc-sparc.c:459 +#: config/tc-sparc.c:466 #, c-format msgid "invalid architecture -A%s" msgstr "" -#: config/tc-sparc.c:526 +#: config/tc-sparc.c:533 #, c-format msgid "No compiled in support for %d bit object file format" msgstr "" -#: config/tc-sparc.c:563 +#: config/tc-sparc.c:570 msgid "Unrecognized option following -K" msgstr "" -#: config/tc-sparc.c:595 +#: config/tc-sparc.c:610 msgid "SPARC options:\n" msgstr "" -#: config/tc-sparc.c:603 +#: config/tc-sparc.c:618 msgid "" "\n" "-xarch=v8plus | -xarch=v8plusa\n" msgstr "" -#: config/tc-sparc.c:604 +#: config/tc-sparc.c:619 msgid "" "\t\t\tspecify variant of SPARC architecture\n" "-bump\t\t\twarn when assembler switches architectures\n" "-sparc\t\t\tignored\n" "--enforce-aligned-data\tforce .long, etc., to be aligned correctly\n" +"-relax\t\t\trelax jumps and branches (default)\n" +"-no-relax\t\tavoid changing any jumps and branches\n" msgstr "" -#: config/tc-sparc.c:610 +#: config/tc-sparc.c:627 msgid "-k\t\t\tgenerate PIC\n" msgstr "" -#: config/tc-sparc.c:614 +#: config/tc-sparc.c:631 msgid "" "-32\t\t\tcreate 32 bit object file\n" "-64\t\t\tcreate 64 bit object file\n" msgstr "" -#: config/tc-sparc.c:617 +#: config/tc-sparc.c:634 #, c-format msgid "\t\t\t[default is %d]\n" msgstr "" -#: config/tc-sparc.c:619 +#: config/tc-sparc.c:636 msgid "" "-TSO\t\t\tuse Total Store Ordering\n" "-PSO\t\t\tuse Partial Store Ordering\n" "-RMO\t\t\tuse Relaxed Memory Ordering\n" msgstr "" -#: config/tc-sparc.c:623 +#: config/tc-sparc.c:640 #, c-format msgid "\t\t\t[default is %s]\n" msgstr "" -#: config/tc-sparc.c:625 +#: config/tc-sparc.c:642 msgid "" "-KPIC\t\t\tgenerate PIC\n" "-V\t\t\tprint assembler version number\n" @@ -5486,7 +6079,7 @@ msgid "" "-s\t\t\tignored\n" msgstr "" -#: config/tc-sparc.c:637 +#: config/tc-sparc.c:654 msgid "" "-EL\t\t\tgenerate code for a little endian machine\n" "-EB\t\t\tgenerate code for a big endian machine\n" @@ -5494,218 +6087,218 @@ msgid "" " instructions and little endian data.\n" msgstr "" -#: config/tc-sparc.c:754 +#: config/tc-sparc.c:771 #, c-format msgid "Internal error: losing opcode: `%s' \"%s\"\n" msgstr "" -#: config/tc-sparc.c:772 +#: config/tc-sparc.c:789 #, c-format msgid "Internal error: can't find opcode `%s' for `%s'\n" msgstr "" -#: config/tc-sparc.c:921 +#: config/tc-sparc.c:938 msgid "Support for 64-bit arithmetic not compiled in." msgstr "" -#: config/tc-sparc.c:967 +#: config/tc-sparc.c:984 msgid "set: number not in 0..4294967295 range" msgstr "" -#: config/tc-sparc.c:974 +#: config/tc-sparc.c:991 msgid "set: number not in -2147483648..4294967295 range" msgstr "" -#: config/tc-sparc.c:1034 +#: config/tc-sparc.c:1051 msgid "setsw: number not in -2147483648..4294967295 range" msgstr "" -#: config/tc-sparc.c:1082 +#: config/tc-sparc.c:1099 msgid "setx: temporary register same as destination register" msgstr "" -#: config/tc-sparc.c:1152 +#: config/tc-sparc.c:1169 msgid "setx: illegal temporary register g0" msgstr "" -#: config/tc-sparc.c:1249 +#: config/tc-sparc.c:1266 msgid "FP branch in delay slot" msgstr "" -#: config/tc-sparc.c:1265 +#: config/tc-sparc.c:1282 msgid "FP branch preceded by FP instruction; NOP inserted" msgstr "" -#: config/tc-sparc.c:1305 +#: config/tc-sparc.c:1322 msgid "failed special case insn sanity check" msgstr "" -#: config/tc-sparc.c:1396 +#: config/tc-sparc.c:1413 msgid ": invalid membar mask name" msgstr "" -#: config/tc-sparc.c:1410 +#: config/tc-sparc.c:1427 msgid ": invalid membar mask expression" msgstr "" -#: config/tc-sparc.c:1415 +#: config/tc-sparc.c:1432 msgid ": invalid membar mask number" msgstr "" -#: config/tc-sparc.c:1433 +#: config/tc-sparc.c:1450 msgid ": invalid prefetch function name" msgstr "" -#: config/tc-sparc.c:1441 +#: config/tc-sparc.c:1458 msgid ": invalid prefetch function expression" msgstr "" -#: config/tc-sparc.c:1446 +#: config/tc-sparc.c:1463 msgid ": invalid prefetch function number" msgstr "" -#: config/tc-sparc.c:1474 config/tc-sparc.c:1486 +#: config/tc-sparc.c:1491 config/tc-sparc.c:1503 msgid ": unrecognizable privileged register" msgstr "" -#: config/tc-sparc.c:1510 config/tc-sparc.c:1527 +#: config/tc-sparc.c:1527 config/tc-sparc.c:1544 msgid ": unrecognizable v9a ancillary state register" msgstr "" -#: config/tc-sparc.c:1515 +#: config/tc-sparc.c:1532 msgid ": rd on write only ancillary state register" msgstr "" -#: config/tc-sparc.c:1551 +#: config/tc-sparc.c:1568 msgid ": asr number must be between 16 and 31" msgstr "" -#: config/tc-sparc.c:1559 +#: config/tc-sparc.c:1576 msgid ": asr number must be between 0 and 31" msgstr "" -#: config/tc-sparc.c:1569 +#: config/tc-sparc.c:1586 msgid ": expecting %asrN" msgstr "" -#: config/tc-sparc.c:1897 +#: config/tc-sparc.c:1914 msgid "detected global register use not covered by .register pseudo-op" msgstr "" -#: config/tc-sparc.c:1969 +#: config/tc-sparc.c:1985 msgid ": There are only 64 f registers; [0-63]" msgstr "" -#: config/tc-sparc.c:1971 config/tc-sparc.c:1983 +#: config/tc-sparc.c:1987 config/tc-sparc.c:1999 msgid ": There are only 32 f registers; [0-31]" msgstr "" -#: config/tc-sparc.c:2102 config/tc-sparc.c:2138 +#: config/tc-sparc.c:2118 config/tc-sparc.c:2154 msgid "Illegal operands: %%%s requires arguments in ()" msgstr "" -#: config/tc-sparc.c:2150 +#: config/tc-sparc.c:2166 msgid "" "Illegal operands: Can't do arithmetics other than + and - involving %%%s()" msgstr "" -#: config/tc-sparc.c:2259 +#: config/tc-sparc.c:2275 msgid "Illegal operands: Can't add non-constant expression to %%%s()" msgstr "" -#: config/tc-sparc.c:2269 +#: config/tc-sparc.c:2285 msgid "" "Illegal operands: Can't do arithmetics involving %%%s() of a relocatable " "symbol" msgstr "" -#: config/tc-sparc.c:2287 +#: config/tc-sparc.c:2303 msgid ": PC-relative operand can't be a constant" msgstr "" -#: config/tc-sparc.c:2320 +#: config/tc-sparc.c:2336 msgid ": invalid ASI name" msgstr "" -#: config/tc-sparc.c:2328 +#: config/tc-sparc.c:2344 msgid ": invalid ASI expression" msgstr "" -#: config/tc-sparc.c:2333 +#: config/tc-sparc.c:2349 msgid ": invalid ASI number" msgstr "" -#: config/tc-sparc.c:2430 +#: config/tc-sparc.c:2446 msgid "OPF immediate operand out of range (0-0x1ff)" msgstr "" -#: config/tc-sparc.c:2435 +#: config/tc-sparc.c:2451 msgid "non-immediate OPF operand, ignored" msgstr "" -#: config/tc-sparc.c:2454 +#: config/tc-sparc.c:2470 msgid ": invalid cpreg name" msgstr "" -#: config/tc-sparc.c:2483 +#: config/tc-sparc.c:2499 #, c-format msgid "Illegal operands%s" msgstr "" -#: config/tc-sparc.c:2512 +#: config/tc-sparc.c:2528 #, c-format msgid "architecture bumped from \"%s\" to \"%s\" on \"%s\"" msgstr "" -#: config/tc-sparc.c:2548 +#: config/tc-sparc.c:2564 #, c-format msgid "Architecture mismatch on \"%s\"." msgstr "" -#: config/tc-sparc.c:2549 +#: config/tc-sparc.c:2565 #, c-format msgid " (Requires %s; requested architecture is %s.)" msgstr "" -#: config/tc-sparc.c:3073 +#: config/tc-sparc.c:3173 #, c-format msgid "bad or unhandled relocation type: 0x%02x" msgstr "" -#: config/tc-sparc.c:3375 +#: config/tc-sparc.c:3475 msgid "bad .reserve segment -- expected BSS segment" msgstr "" -#: config/tc-sparc.c:3392 +#: config/tc-sparc.c:3492 msgid "missing alignment" msgstr "" -#: config/tc-sparc.c:3403 config/tc-sparc.c:3548 +#: config/tc-sparc.c:3503 config/tc-sparc.c:3648 #, c-format msgid "alignment too large; assuming %d" msgstr "" -#: config/tc-sparc.c:3409 config/tc-sparc.c:3554 +#: config/tc-sparc.c:3509 config/tc-sparc.c:3654 msgid "negative alignment" msgstr "" -#: config/tc-sparc.c:3419 config/tc-sparc.c:3577 +#: config/tc-sparc.c:3519 config/tc-sparc.c:3677 msgid "alignment not a power of 2" msgstr "" -#: config/tc-sparc.c:3534 +#: config/tc-sparc.c:3634 msgid "Expected comma after common length" msgstr "" -#: config/tc-sparc.c:3769 config/tc-sparc.c:3779 +#: config/tc-sparc.c:3869 config/tc-sparc.c:3879 msgid "register syntax is .register %%g[2367],{#scratch|symbolname|#ignore}" msgstr "" -#: config/tc-sparc.c:3797 +#: config/tc-sparc.c:3897 msgid "redefinition of global register" msgstr "" -#: config/tc-sparc.c:3808 +#: config/tc-sparc.c:3908 #, c-format msgid "Register symbol %s already defined." msgstr "" @@ -6000,153 +6593,153 @@ msgstr "" msgid ".COMMon length (%d.) < 0! Ignored." msgstr "" -#: config/tc-v850.c:1000 +#: config/tc-v850.c:1002 #, c-format msgid "unknown operand shift: %x\n" msgstr "" -#: config/tc-v850.c:1001 +#: config/tc-v850.c:1003 msgid "internal failure in parse_register_list" msgstr "" -#: config/tc-v850.c:1019 +#: config/tc-v850.c:1020 msgid "constant expression or register list expected" msgstr "" -#: config/tc-v850.c:1024 config/tc-v850.c:1037 config/tc-v850.c:1056 +#: config/tc-v850.c:1025 config/tc-v850.c:1038 config/tc-v850.c:1057 msgid "high bits set in register list expression" msgstr "" -#: config/tc-v850.c:1096 config/tc-v850.c:1160 +#: config/tc-v850.c:1097 config/tc-v850.c:1161 msgid "illegal register included in list" msgstr "" -#: config/tc-v850.c:1103 +#: config/tc-v850.c:1104 msgid "system registers cannot be included in list" msgstr "" -#: config/tc-v850.c:1108 +#: config/tc-v850.c:1109 msgid "PSW cannot be included in list" msgstr "" -#: config/tc-v850.c:1115 +#: config/tc-v850.c:1116 msgid "High value system registers cannot be included in list" msgstr "" -#: config/tc-v850.c:1139 +#: config/tc-v850.c:1140 msgid "second register should follow dash in register list" msgstr "" -#: config/tc-v850.c:1187 +#: config/tc-v850.c:1188 msgid " V850 options:\n" msgstr "" -#: config/tc-v850.c:1188 +#: config/tc-v850.c:1189 msgid " -mwarn-signed-overflow Warn if signed immediate values overflow\n" msgstr "" -#: config/tc-v850.c:1189 +#: config/tc-v850.c:1190 msgid "" " -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n" msgstr "" -#: config/tc-v850.c:1190 +#: config/tc-v850.c:1191 msgid " -mv850 The code is targeted at the v850\n" msgstr "" -#: config/tc-v850.c:1191 +#: config/tc-v850.c:1192 msgid " -mv850e The code is targeted at the v850e\n" msgstr "" -#: config/tc-v850.c:1192 +#: config/tc-v850.c:1193 msgid " -mv850ea The code is targeted at the v850ea\n" msgstr "" -#: config/tc-v850.c:1193 +#: config/tc-v850.c:1194 msgid "" " -mv850any The code is generic, despite any processor " "specific instructions\n" msgstr "" -#: config/tc-v850.c:1204 config/tc-v850.c:1239 +#: config/tc-v850.c:1206 config/tc-v850.c:1241 #, c-format msgid "unknown command line option: -%c%s\n" msgstr "" -#: config/tc-v850.c:1393 +#: config/tc-v850.c:1395 #, c-format msgid "Unable to determine default target processor from string: %s" msgstr "" -#: config/tc-v850.c:1442 +#: config/tc-v850.c:1444 msgid "ctoff() relocation used on an instruction which does not support it" msgstr "" -#: config/tc-v850.c:1459 +#: config/tc-v850.c:1461 msgid "sdaoff() relocation used on an instruction which does not support it" msgstr "" -#: config/tc-v850.c:1476 +#: config/tc-v850.c:1478 msgid "zdaoff() relocation used on an instruction which does not support it" msgstr "" -#: config/tc-v850.c:1494 +#: config/tc-v850.c:1496 msgid "tdaoff() relocation used on an instruction which does not support it" msgstr "" -#: config/tc-v850.c:1712 +#: config/tc-v850.c:1713 msgid "Target processor does not support this instruction." msgstr "" -#: config/tc-v850.c:1802 config/tc-v850.c:1832 config/tc-v850.c:2018 +#: config/tc-v850.c:1803 config/tc-v850.c:1833 config/tc-v850.c:2019 msgid "immediate operand is too large" msgstr "" -#: config/tc-v850.c:1814 +#: config/tc-v850.c:1815 msgid "AAARG -> unhandled constant reloc" msgstr "" -#: config/tc-v850.c:1858 +#: config/tc-v850.c:1859 msgid "invalid register name" msgstr "" -#: config/tc-v850.c:1863 +#: config/tc-v850.c:1864 msgid "register r0 cannot be used here" msgstr "" -#: config/tc-v850.c:1875 +#: config/tc-v850.c:1876 msgid "invalid system register name" msgstr "" -#: config/tc-v850.c:1888 +#: config/tc-v850.c:1889 msgid "expected EP register" msgstr "" -#: config/tc-v850.c:1904 +#: config/tc-v850.c:1905 msgid "invalid condition code name" msgstr "" -#: config/tc-v850.c:1925 config/tc-v850.c:1929 +#: config/tc-v850.c:1926 config/tc-v850.c:1930 msgid "constant too big to fit into instruction" msgstr "" -#: config/tc-v850.c:1981 +#: config/tc-v850.c:1982 msgid "syntax error: value is missing before the register name" msgstr "" -#: config/tc-v850.c:1983 +#: config/tc-v850.c:1984 msgid "syntax error: register not expected" msgstr "" -#: config/tc-v850.c:1997 +#: config/tc-v850.c:1998 msgid "syntax error: system register not expected" msgstr "" -#: config/tc-v850.c:2002 +#: config/tc-v850.c:2003 msgid "syntax error: condition code not expected" msgstr "" -#: config/tc-v850.c:2038 +#: config/tc-v850.c:2039 msgid "invalid operand" msgstr "" @@ -6353,84 +6946,84 @@ msgstr "" msgid "syntax error after <exp" msgstr "" -#: config/tc-z8k.c:290 +#: config/tc-z8k.c:287 #, c-format msgid "register rr%d, out of range." msgstr "" -#: config/tc-z8k.c:298 +#: config/tc-z8k.c:295 #, c-format msgid "register rh%d, out of range." msgstr "" -#: config/tc-z8k.c:306 +#: config/tc-z8k.c:303 #, c-format msgid "register rl%d, out of range." msgstr "" -#: config/tc-z8k.c:315 +#: config/tc-z8k.c:312 #, c-format msgid "register rq%d, out of range." msgstr "" -#: config/tc-z8k.c:323 +#: config/tc-z8k.c:320 #, c-format msgid "register r%d, out of range." msgstr "" -#: config/tc-z8k.c:374 +#: config/tc-z8k.c:371 #, c-format msgid "expected %c" msgstr "" -#: config/tc-z8k.c:390 +#: config/tc-z8k.c:387 #, c-format msgid "register is wrong size for a word %s" msgstr "" -#: config/tc-z8k.c:405 +#: config/tc-z8k.c:402 #, c-format msgid "register is wrong size for address %s" msgstr "" -#: config/tc-z8k.c:680 +#: config/tc-z8k.c:677 msgid "Missing ) in ra(rb)" msgstr "" -#: config/tc-z8k.c:947 +#: config/tc-z8k.c:944 #, c-format msgid "operand %s0x%x out of range." msgstr "" -#: config/tc-z8k.c:1086 +#: config/tc-z8k.c:1083 msgid "immediate must be 1 or 2" msgstr "" -#: config/tc-z8k.c:1091 +#: config/tc-z8k.c:1088 msgid "immediate 1 or 2 expected" msgstr "" -#: config/tc-z8k.c:1119 +#: config/tc-z8k.c:1116 msgid "can't use R0 here" msgstr "" -#: config/tc-z8k.c:1278 +#: config/tc-z8k.c:1275 msgid "Can't find opcode to match operands" msgstr "" -#: config/tc-z8k.c:1390 +#: config/tc-z8k.c:1387 #, c-format msgid "invalid architecture -z%s" msgstr "" -#: config/tc-z8k.c:1406 +#: config/tc-z8k.c:1403 msgid "" "Z8K options:\n" "-z8001\t\t\tgenerate segmented code\n" "-z8002\t\t\tgenerate unsegmented code\n" msgstr "" -#: config/tc-z8k.c:1543 +#: config/tc-z8k.c:1540 #, c-format msgid "Can't subtract symbols in different sections %s %s" msgstr "" @@ -6683,25 +7276,25 @@ msgstr "" msgid "Character constant too large" msgstr "" -#: expr.c:947 +#: expr.c:950 #, c-format msgid "expr.c(operand): bad atof_generic return val %d" msgstr "" -#: expr.c:1007 +#: expr.c:1010 msgid "Missing ')' assumed" msgstr "" -#: expr.c:1018 read.c:3866 +#: expr.c:1021 read.c:3864 msgid "EBCDIC constants are not supported" msgstr "" -#: expr.c:1088 +#: expr.c:1091 #, c-format msgid "Unary operator %c ignored because bad operand follows" msgstr "" -#: expr.c:1134 expr.c:1159 +#: expr.c:1137 expr.c:1162 msgid "syntax error in .startof. or .sizeof." msgstr "" @@ -6709,44 +7302,44 @@ msgstr "" msgid "Bad expression" msgstr "" -#: expr.c:1677 +#: expr.c:1680 msgid "missing operand; zero assumed" msgstr "" -#: expr.c:1710 +#: expr.c:1713 msgid "operation combines symbols in different segments" msgstr "" -#: expr.c:1726 +#: expr.c:1729 msgid "left operand is a bignum; integer 0 assumed" msgstr "" -#: expr.c:1728 +#: expr.c:1731 msgid "left operand is a float; integer 0 assumed" msgstr "" -#: expr.c:1737 +#: expr.c:1740 msgid "right operand is a bignum; integer 0 assumed" msgstr "" -#: expr.c:1739 +#: expr.c:1742 msgid "right operand is a float; integer 0 assumed" msgstr "" -#: expr.c:1787 symbols.c:1109 +#: expr.c:1797 symbols.c:1109 msgid "division by zero" msgstr "" -#: frags.c:85 +#: frags.c:87 #, c-format msgid "Can't extend frag %d. chars" msgstr "" -#: frags.c:170 +#: frags.c:175 msgid "attempt to allocate data in absolute section" msgstr "" -#: frags.c:176 +#: frags.c:181 msgid "attempt to allocate data in common section" msgstr "" @@ -6835,7 +7428,7 @@ msgid "form COL= needs absolute expresssion.\n" msgstr "" #. Turns the next expression into a string -#: gasp.c:1563 macro.c:366 +#: gasp.c:1563 macro.c:377 #, c-format msgid "% operator needs absolute expression" msgstr "" @@ -7107,14 +7700,14 @@ msgid "Can't close %s" msgstr "" #: input-scrub.c:270 -msgid "buffers nested too deeply" +msgid "macros nested too deeply" msgstr "" -#: input-scrub.c:371 +#: input-scrub.c:372 msgid "partial line at end of file ignored" msgstr "" -#: input-scrub.c:393 +#: input-scrub.c:394 msgid "Partial line at end of file ignored" msgstr "" @@ -7148,39 +7741,39 @@ msgstr "" msgid "New line in title" msgstr "" -#: macro.c:529 +#: macro.c:540 msgid "unexpected end of file in macro definition" msgstr "" -#: macro.c:538 +#: macro.c:549 msgid "missing ) after formals" msgstr "" -#: macro.c:695 +#: macro.c:706 msgid "missplaced )" msgstr "" -#: macro.c:957 +#: macro.c:968 msgid "confusion in formal parameters" msgstr "" -#: macro.c:962 +#: macro.c:973 msgid "macro formal argument does not exist" msgstr "" -#: macro.c:977 +#: macro.c:988 msgid "can't mix positional and keyword arguments" msgstr "" -#: macro.c:985 +#: macro.c:996 msgid "too many positional arguments" msgstr "" -#: macro.c:1165 +#: macro.c:1176 msgid "unexpected end of file in irp or irpc" msgstr "" -#: macro.c:1173 +#: macro.c:1184 msgid "missing model parameter" msgstr "" @@ -7251,319 +7844,319 @@ msgstr "" msgid "Can't continue" msgstr "" -#: read.c:454 +#: read.c:452 #, c-format msgid "error constructing %s pseudo-op table: %s" msgstr "" -#: read.c:819 +#: read.c:817 #, c-format msgid "Unknown pseudo-op: `%s'" msgstr "" -#: read.c:952 +#: read.c:950 #, c-format msgid "label \"%d$\" redefined" msgstr "" -#: read.c:1169 +#: read.c:1167 msgid ".abort detected. Abandoning ship." msgstr "" -#: read.c:1260 read.c:2033 +#: read.c:1258 read.c:2031 msgid "Alignment not a power of 2" msgstr "" -#: read.c:1268 +#: read.c:1266 #, c-format msgid "Alignment too large: %u assumed" msgstr "" -#: read.c:1300 +#: read.c:1298 msgid "expected fill pattern missing" msgstr "" -#: read.c:1497 +#: read.c:1495 #, c-format msgid "attempt to re-define symbol `%s'" msgstr "" #. Some of the back ends can't deal with non-positive line numbers. #. Besides, it's silly. -#: read.c:1621 +#: read.c:1619 #, c-format msgid "Line numbers must be positive; line number %d rejected." msgstr "" -#: read.c:1648 +#: read.c:1646 msgid "start address not supported" msgstr "" -#: read.c:1658 +#: read.c:1656 msgid ".err encountered" msgstr "" -#: read.c:1677 read.c:1679 +#: read.c:1675 read.c:1677 #, c-format msgid ".fail %ld encountered" msgstr "" -#: read.c:1716 +#: read.c:1714 #, c-format msgid ".fill size clamped to %d." msgstr "" -#: read.c:1721 +#: read.c:1719 msgid "Size negative: .fill ignored." msgstr "" -#: read.c:1727 +#: read.c:1725 msgid "Repeat < 0, .fill ignored" msgstr "" -#: read.c:1885 +#: read.c:1883 #, c-format msgid "unrecognized .linkonce type `%s'" msgstr "" -#: read.c:1898 read.c:1924 +#: read.c:1896 read.c:1922 msgid ".linkonce is not supported for this object file format" msgstr "" -#: read.c:1920 +#: read.c:1918 #, c-format msgid "bfd_set_section_flags: %s" msgstr "" -#: read.c:1989 +#: read.c:1987 #, c-format msgid "error setting flags for \".sbss\": %s" msgstr "" -#: read.c:2011 +#: read.c:2009 msgid "Expected comma after size" msgstr "" -#: read.c:2019 +#: read.c:2017 msgid "Missing alignment" msgstr "" -#: read.c:2161 +#: read.c:2159 msgid "bad expression" msgstr "" -#: read.c:2292 +#: read.c:2290 #, c-format msgid "attempt to redefine pseudo-op `%s' ignored" msgstr "" -#: read.c:2358 +#: read.c:2356 #, c-format msgid "invalid segment \"%s\"; segment \"%s\" assumed" msgstr "" -#: read.c:2364 +#: read.c:2362 msgid "ignoring fill value in absolute section" msgstr "" -#: read.c:2367 +#: read.c:2365 msgid "only constant offsets supported in absolute section" msgstr "" -#: read.c:2399 +#: read.c:2397 msgid "MRI style ORG pseudo-op not supported" msgstr "" -#: read.c:2487 +#: read.c:2485 msgid "unrecognized section type" msgstr "" -#: read.c:2555 +#: read.c:2553 #, c-format msgid "unrecognized section type `%s'" msgstr "" -#: read.c:2569 +#: read.c:2567 msgid "absolute sections are not supported" msgstr "" -#: read.c:2584 +#: read.c:2582 #, c-format msgid "unrecognized section command `%s'" msgstr "" -#: read.c:2672 +#: read.c:2670 #, c-format msgid "%s without %s" msgstr "" -#: read.c:2876 +#: read.c:2874 msgid "Unsupported variable size or fill value" msgstr "" -#: read.c:2901 +#: read.c:2899 msgid ".space repeat count is zero, ignored" msgstr "" -#: read.c:2903 +#: read.c:2901 msgid ".space repeat count is negative, ignored" msgstr "" -#: read.c:2932 +#: read.c:2930 msgid "space allocation too complex in absolute section" msgstr "" -#: read.c:2937 +#: read.c:2935 msgid "space allocation too complex in common section" msgstr "" -#: read.c:3024 read.c:4113 +#: read.c:3022 read.c:4111 #, c-format msgid "Bad floating literal: %s" msgstr "" -#: read.c:3100 +#: read.c:3098 #, c-format msgid "Rest of line ignored. First ignored character is `%c'." msgstr "" -#: read.c:3103 +#: read.c:3101 #, c-format msgid "Rest of line ignored. First ignored character valued 0x%x." msgstr "" -#: read.c:3154 +#: read.c:3152 msgid "illegal expression; zero assumed" msgstr "" -#: read.c:3156 +#: read.c:3154 msgid "missing expression; zero assumed" msgstr "" -#: read.c:3329 +#: read.c:3327 msgid "rva without symbol" msgstr "" -#: read.c:3454 +#: read.c:3452 msgid "attempt to store value in absolute section" msgstr "" -#: read.c:3492 read.c:4390 +#: read.c:3490 read.c:4388 msgid "zero assumed for missing expression" msgstr "" -#: read.c:3504 read.c:4402 +#: read.c:3502 read.c:4400 msgid "register value used as expression" msgstr "" #. Leading bits contain both 0s & 1s. -#: read.c:3594 +#: read.c:3592 #, c-format msgid "Value 0x%lx truncated to 0x%lx." msgstr "" -#: read.c:3610 +#: read.c:3608 #, c-format msgid "Bignum truncated to %d bytes" msgstr "" -#: read.c:3687 +#: read.c:3685 #, c-format msgid "unsupported BFD relocation size %u" msgstr "" -#: read.c:3776 +#: read.c:3774 msgid "using a bit field width of zero" msgstr "" -#: read.c:3784 +#: read.c:3782 #, c-format msgid "field width \"%s\" too complex for a bitfield" msgstr "" -#: read.c:3792 +#: read.c:3790 #, c-format msgid "field width %lu too big to fit in %d bytes: truncated to %d bits" msgstr "" -#: read.c:3813 +#: read.c:3811 #, c-format msgid "field value \"%s\" too complex for a bitfield" msgstr "" -#: read.c:3937 +#: read.c:3935 msgid "Unresolvable or nonpositive repeat count; using 1" msgstr "" -#: read.c:3988 +#: read.c:3986 #, c-format msgid "Unknown floating type type '%c'" msgstr "" -#: read.c:4010 +#: read.c:4008 msgid "Floating point constant too large" msgstr "" -#: read.c:4135 +#: read.c:4133 msgid "unresolvable or nonpositive repeat count; using 1" msgstr "" -#: read.c:4539 +#: read.c:4537 msgid "Expected <nn>" msgstr "" #. To be compatible with BSD 4.2 as: give the luser a linefeed!! -#: read.c:4572 read.c:4655 +#: read.c:4570 read.c:4653 msgid "Unterminated string: Newline inserted." msgstr "" -#: read.c:4663 +#: read.c:4661 msgid "Bad escaped character in string, '?' assumed" msgstr "" -#: read.c:4689 +#: read.c:4687 msgid "expected address expression; zero assumed" msgstr "" -#: read.c:4709 +#: read.c:4707 #, c-format msgid "symbol \"%s\" undefined; zero assumed" msgstr "" -#: read.c:4712 +#: read.c:4710 msgid "some symbol undefined; zero assumed" msgstr "" -#: read.c:4730 +#: read.c:4728 msgid "bad or irreducible absolute expression; zero assumed" msgstr "" -#: read.c:4768 +#: read.c:4766 msgid "This string may not contain '\\0'" msgstr "" -#: read.c:4807 +#: read.c:4805 msgid "Missing string" msgstr "" -#: read.c:5036 +#: read.c:5034 msgid "missing .func" msgstr "" -#: read.c:5053 +#: read.c:5051 msgid ".endfunc missing for previous .func" msgstr "" -#: stabs.c:209 +#: stabs.c:208 msgid ".stabs: Missing comma" msgstr "" -#: stabs.c:217 stabs.c:225 stabs.c:236 +#: stabs.c:216 stabs.c:224 stabs.c:235 #, c-format msgid ".stab%c: Missing comma" msgstr "" -#: stabs.c:415 +#: stabs.c:414 msgid "comma missing in .xstabs" msgstr "" diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 3a7af64..19b7f99 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2000-06-18 Stephane Carrez <stcarrez@worldnet.fr> + + * gas/m68k/all.exp: Don't execute tests if the target is m68hc11&12. + * gas/m68hc11/all.exp: Specific tests for m68hc11. + * gas/m68hc11/all_insns.[ds]: Check m68hc11 instructions. + * gas/m68hc11/insns[ds]: Another test. + * gas/m68hc11/lbranch.[ds]: Check branch optimization (gas relax). + * gas/m68hc11/opers12.[ds]: New files, check m68hc12 operands. + 2000-06-17 Alan Modra <alan@linuxcare.com.au> * gas/macros/strings.s: Don't start directives in first column diff --git a/gas/testsuite/gas/m68hc11/all.exp b/gas/testsuite/gas/m68hc11/all.exp new file mode 100644 index 0000000..15be4e3 --- /dev/null +++ b/gas/testsuite/gas/m68hc11/all.exp @@ -0,0 +1,18 @@ +# +# Some generic m68HC11 tests +# +if ![istarget "m68hc11-*-*"] then { + if ![istarget "m6811-*-*"] then { + if ![istarget "m68hc12-*-*"] then { + if ![istarget "m6812-*-*"] then { + return + } + } + } +} +run_dump_test insns +run_dump_test lbranch +run_dump_test all_insns + +# Some 68HC12 tests +run_dump_test opers12 diff --git a/gas/testsuite/gas/m68hc11/all_insns.d b/gas/testsuite/gas/m68hc11/all_insns.d new file mode 100644 index 0000000..adb516c --- /dev/null +++ b/gas/testsuite/gas/m68hc11/all_insns.d @@ -0,0 +1,352 @@ +#objdump: -d --prefix-addresses +#as: -m68hc11 +#name: all_insns + +# Test handling of basic instructions. + +.*: +file format elf32\-m68hc11 + +Disassembly of section .text: +0+000 <L0> aba +0+001 <L1> abx +0+002 <L2> aby +0+004 <L3> adca #103 +0+006 <L4> adca \*0+000 <L0> +0+008 <L5> adca 105,x +0+00a <L6> adca 0+000 <L0> +0+00d <L7> adca 81,x +0+00f <L8> adcb #255 +0+011 <L9> adcb \*0+000 <L0> +0+013 <L10> adcb 236,x +0+015 <L11> adcb 0+000 <L0> +0+018 <L12> adcb 205,x +0+01a <L13> adda #186 +0+01c <L14> adda \*0+000 <L0> +0+01e <L15> adda 242,x +0+020 <L16> adda 0+000 <L0> +0+023 <L17> adda 227,x +0+025 <L18> addb #70 +0+027 <L19> addb \*0+000 <L0> +0+029 <L20> addb 194,x +0+02b <L21> addb 0+000 <L0> +0+02e <L22> addb 248,x +0+030 <L23> addd #0000231b <L330\+0x2034> +0+033 <L24> addd \*0+000 <L0> +0+035 <L25> addd 231,x +0+037 <L26> addd 0+000 <L0> +0+03a <L27> addd 118,x +0+03c <L28> anda #90 +0+03e <L29> anda \*0+000 <L0> +0+040 <L30> anda 99,x +0+042 <L31> anda 0+000 <L0> +0+045 <L32> anda 159,x +0+047 <L33> andb #201 +0+049 <L34> andb \*0+000 <L0> +0+04b <L35> andb 102,x +0+04d <L36> andb 0+000 <L0> +0+050 <L37> andb 13,x +0+052 <L38> asl 183,x +0+054 <L39> asl 0+000 <L0> +0+057 <L40> asl 88,x +0+059 <L41> asla +0+05a <L42> aslb +0+05b <L43> asld +0+05c <L44> asr 163,x +0+05e <L45> asr 0+000 <L0> +0+061 <L46> asr 37,x +0+063 <L47> asra +0+064 <L48> asrb +0+065 <L49> bcs 0+06a <L50> +0+067 <L49\+0x2> jmp 0+0f3 <L93> +0+06a <L50> bclr \*0+000 <L0> #\$00 +0+06d <L51> bclr 88,x #\$00 +0+070 <L52> bclr 94,x #\$00 +0+073 <L53> bcc 0+078 <L54> +0+075 <L53\+0x2> jmp 0+1a8 <L171> +0+078 <L54> bne 0+07d <L55> +0+07a <L54\+0x2> jmp 0+1b6 <L178> +0+07d <L55> blt 0+082 <L56> +0+07f <L55\+0x2> jmp 0+1f5 <L205> +0+082 <L56> ble 0+087 <L57> +0+084 <L56\+0x2> jmp 0+1e4 <L198> +0+087 <L57> bls 0+08c <L58> +0+089 <L57\+0x2> jmp 0+18a <L155> +0+08c <L58> bcs 0+091 <L59> +0+08e <L58\+0x2> jmp 0+1bb <L180> +0+091 <L59> bita #84 +0+093 <L60> bita \*0+000 <L0> +0+095 <L61> bita 14,x +0+097 <L62> bita 0+000 <L0> +0+09a <L63> bita 116,x +0+09c <L64> bitb #65 +0+09e <L65> bitb \*0+000 <L0> +0+0a0 <L66> bitb 61,x +0+0a2 <L67> bitb 0+000 <L0> +0+0a5 <L68> bitb 135,x +0+0a7 <L69> ble 0+11d <L112> +0+0a9 <L70> bcc 0+0ae <L71> +0+0ab <L70\+0x2> jmp 0+22e <L233> +0+0ae <L71> bls 0+097 <L62> +0+0b0 <L72> bge 0+0b5 <L73> +0+0b2 <L72\+0x2> jmp 0+197 <L161> +0+0b5 <L73> bmi 0+09e <L65> +0+0b7 <L74> beq 0+0bc <L75> +0+0b9 <L74\+0x2> jmp 0+220 <L225> +0+0bc <L75> bmi 0+0c1 <L76> +0+0be <L75\+0x2> jmp 0+24e <L252> +0+0c1 <L76> bra 0+106 <L103> +0+0c3 <L77> brclr \*0+000 <L0> #\$00 0+145 <L125\+0x2> +0+0c7 <L78> brclr 151,x #\$00 0+127 <L115> +0+0cb <L79> brclr 107,x #\$00 0+0de <L84\+0x1> +0+0cf <L80> brn 0+082 <L56> +0+0d1 <L81> brset \*0+000 <L0> #\$00 0+141 <L124> +0+0d5 <L82> brset 176,x #\$00 0+154 <L132> +0+0d9 <L83> brset 50,x #\$00 0+119 <L110\+0x2> +0+0dd <L84> bset \*0+000 <L0> #\$00 +0+0e0 <L85> bset 24,x #\$00 +0+0e3 <L86> bset 92,x #\$00 +0+0e6 <L87> jsr 0+037 <L26> +0+0e9 <L88> bvs 0+0ee <L89> +0+0eb <L88\+0x2> jmp 0+253 <L254> +0+0ee <L89> bvs 0+0a2 <L67> +0+0f0 <L90> cba +0+0f1 <L91> clc +0+0f2 <L92> cli +0+0f3 <L93> clr 251,x +0+0f5 <L94> clr 0+000 <L0> +0+0f8 <L95> clr 170,x +0+0fa <L96> clra +0+0fb <L97> clrb +0+0fc <L98> clv +0+0fd <L99> cmpa #58 +0+0ff <L100> cmpa \*0+000 <L0> +0+101 <L101> cmpa 41,x +0+103 <L102> cmpa 0+000 <L0> +0+106 <L103> cmpa 230,x +0+108 <L104> cmpb #5 +0+10a <L105> cmpb \*0+000 <L0> +0+10c <L106> cmpb 124,x +0+10e <L107> cmpb 0+000 <L0> +0+111 <L108> cmpb 117,x +0+113 <L109> cpd #0+fd8 <L330\+0xcf1> +0+117 <L110> cpd \*0+000 <L0> +0+11a <L111> cpd 97,x +0+11d <L112> cpd 0+000 <L0> +0+121 <L113> cpd 249,x +0+124 <L114> cpx #0000af5c <L330\+0xac75> +0+127 <L115> cpx \*0+000 <L0> +0+129 <L116> cpx 168,x +0+12b <L117> cpx 0+000 <L0> +0+12e <L118> cpx 15,x +0+130 <L119> cpy #00004095 <L330\+0x3dae> +0+134 <L120> cpy \*0+000 <L0> +0+137 <L121> cpy 235,x +0+13a <L122> cpy 0+000 <L0> +0+13e <L123> cpy 179,x +0+141 <L124> com 5,x +0+143 <L125> com 0+000 <L0> +0+146 <L126> com 247,x +0+148 <L127> coma +0+149 <L128> comb +0+14a <L129> cpd #0000bf00 <L330\+0xbc19> +0+14e <L130> cpd \*0+000 <L0> +0+151 <L131> cpd 161,x +0+154 <L132> cpd 0+000 <L0> +0+158 <L133> cpd 229,x +0+15b <L134> cpx #00008fca <L330\+0x8ce3> +0+15e <L135> cpx \*0+000 <L0> +0+160 <L136> cpx 203,x +0+162 <L137> cpx 0+000 <L0> +0+165 <L138> cpx 72,x +0+167 <L139> cpy #0+247 <L248> +0+16b <L140> cpy \*0+000 <L0> +0+16e <L141> cpy 189,x +0+171 <L142> cpy 0+000 <L0> +0+175 <L143> cpy 35,x +0+178 <L144> daa +0+179 <L145> dec 30,x +0+17b <L146> dec 0+000 <L0> +0+17e <L147> dec 28,x +0+180 <L148> deca +0+181 <L149> decb +0+182 <L150> des +0+183 <L151> dex +0+184 <L152> dey +0+186 <L153> eora #123 +0+188 <L154> eora \*0+000 <L0> +0+18a <L155> eora 197,x +0+18c <L156> eora 0+000 <L0> +0+18f <L157> eora 115,x +0+191 <L158> eorb #90 +0+193 <L159> eorb \*0+000 <L0> +0+195 <L160> eorb 94,x +0+197 <L161> eorb 0+000 <L0> +0+19a <L162> eorb 121,x +0+19c <L163> fdiv +0+19d <L164> idiv +0+19e <L165> inc 99,x +0+1a0 <L166> inc 0+000 <L0> +0+1a3 <L167> inc 112,x +0+1a5 <L168> inca +0+1a6 <L169> incb +0+1a7 <L170> ins +0+1a8 <L171> inx +0+1a9 <L172> iny +0+1ab <L173> jmp 100,x +0+1ad <L174> jmp 0+000 <L0> +0+1b0 <L175> jmp 17,x +0+1b2 <L176> jsr \*0+000 <L0> +0+1b4 <L177> jsr 9,x +0+1b6 <L178> jsr 0+000 <L0> +0+1b9 <L179> jsr 170,x +0+1bb <L180> ldaa #212 +0+1bd <L181> ldaa \*0+000 <L0> +0+1bf <L182> ldaa 242,x +0+1c1 <L183> ldaa 0+000 <L0> +0+1c4 <L184> ldaa 16,x +0+1c6 <L185> ldab #175 +0+1c8 <L186> ldab \*0+000 <L0> +0+1ca <L187> ldab 51,x +0+1cc <L188> ldab 0+000 <L0> +0+1cf <L189> ldab 227,x +0+1d1 <L190> ldd #0000c550 <L330\+0xc269> +0+1d4 <L191> ldd \*0+000 <L0> +0+1d6 <L192> ldd 71,x +0+1d8 <L193> ldd 0+000 <L0> +0+1db <L194> ldd 92,x +0+1dd <L195> lds #00004fbb <L330\+0x4cd4> +0+1e0 <L196> lds \*0+000 <L0> +0+1e2 <L197> lds 34,x +0+1e4 <L198> lds 0+000 <L0> +0+1e7 <L199> lds 186,x +0+1e9 <L200> ldx #0000579b <L330\+0x54b4> +0+1ec <L201> ldx \*0+000 <L0> +0+1ee <L202> ldx 245,x +0+1f0 <L203> ldx 0+000 <L0> +0+1f3 <L204> ldx 225,x +0+1f5 <L205> ldy #0000ac1a <L330\+0xa933> +0+1f9 <L206> ldy \*0+000 <L0> +0+1fc <L207> ldy 127,x +0+1ff <L208> ldy 0+000 <L0> +0+203 <L209> ldy 248,x +0+206 <L210> asl 41,x +0+208 <L211> asl 0+000 <L0> +0+20b <L212> asl 164,x +0+20d <L213> asla +0+20e <L214> aslb +0+20f <L215> asld +0+210 <L216> lsr 27,x +0+212 <L217> lsr 0+000 <L0> +0+215 <L218> lsr 181,x +0+217 <L219> lsra +0+218 <L220> lsrb +0+219 <L221> lsrd +0+21a <L222> mul +0+21b <L223> neg 202,x +0+21d <L224> neg 0+000 <L0> +0+220 <L225> neg 232,x +0+222 <L226> nega +0+223 <L227> negb +0+224 <L228> nop +0+225 <L229> oraa #152 +0+227 <L230> oraa \*0+000 <L0> +0+229 <L231> oraa 56,x +0+22b <L232> oraa 0+000 <L0> +0+22e <L233> oraa 121,x +0+230 <L234> orab #77 +0+232 <L235> orab \*0+000 <L0> +0+234 <L236> orab 52,x +0+236 <L237> orab 0+000 <L0> +0+239 <L238> orab 95,x +0+23b <L239> psha +0+23c <L240> pshb +0+23d <L241> pshx +0+23e <L242> pshy +0+240 <L243> pula +0+241 <L244> pulb +0+242 <L245> pulx +0+243 <L246> puly +0+245 <L247> rol 78,x +0+247 <L248> rol 0+000 <L0> +0+24a <L249> rol 250,x +0+24c <L250> rola +0+24d <L251> rolb +0+24e <L252> ror 203,x +0+250 <L253> ror 0+000 <L0> +0+253 <L254> ror 5,x +0+255 <L255> rora +0+256 <L256> rorb +0+257 <L257> rti +0+258 <L258> rts +0+259 <L259> sba +0+25a <L260> sbca #172 +0+25c <L261> sbca \*0+000 <L0> +0+25e <L262> sbca 33,x +0+260 <L263> sbca 0+000 <L0> +0+263 <L264> sbca 170,x +0+265 <L265> sbcb #26 +0+267 <L266> sbcb \*0+000 <L0> +0+269 <L267> sbcb 162,x +0+26b <L268> sbcb 0+000 <L0> +0+26e <L269> sbcb 112,x +0+270 <L270> sec +0+271 <L271> sei +0+272 <L272> sev +0+273 <L273> staa \*0+000 <L0> +0+275 <L274> staa 115,x +0+277 <L275> staa 0+000 <L0> +0+27a <L276> staa 4,x +0+27c <L277> stab \*0+000 <L0> +0+27e <L278> stab 211,x +0+280 <L279> stab 0+000 <L0> +0+283 <L280> stab 148,x +0+285 <L281> std \*0+000 <L0> +0+287 <L282> std 175,x +0+289 <L283> std 0+000 <L0> +0+28c <L284> std 240,x +0+28e <L285> stop +0+28f <L286> sts \*0+000 <L0> +0+291 <L287> sts 158,x +0+293 <L288> sts 0+000 <L0> +0+296 <L289> sts 50,x +0+298 <L290> stx \*0+000 <L0> +0+29a <L291> stx 73,x +0+29c <L292> stx 0+000 <L0> +0+29f <L293> stx 130,x +0+2a1 <L294> sty \*0+000 <L0> +0+2a4 <L295> sty 169,x +0+2a7 <L296> sty 0+000 <L0> +0+2ab <L297> sty 112,x +0+2ae <L298> suba #212 +0+2b0 <L299> suba \*0+000 <L0> +0+2b2 <L300> suba 138,x +0+2b4 <L301> suba 0+000 <L0> +0+2b7 <L302> suba 84,x +0+2b9 <L303> subb #72 +0+2bb <L304> subb \*0+000 <L0> +0+2bd <L305> subb 10,x +0+2bf <L306> subb 0+000 <L0> +0+2c2 <L307> subb 213,x +0+2c4 <L308> subd #0000f10e <L330\+0xee27> +0+2c7 <L309> subd \*0+000 <L0> +0+2c9 <L310> subd 168,x +0+2cb <L311> subd 0+000 <L0> +0+2ce <L312> subd 172,x +0+2d0 <L313> swi +0+2d1 <L314> tab +0+2d2 <L315> tap +0+2d3 <L316> tba + ... +0+2d5 <L318> tpa +0+2d6 <L319> tst 91,x +0+2d8 <L320> tst 0+000 <L0> +0+2db <L321> tst 142,x +0+2dd <L322> tsta +0+2de <L323> tstb +0+2df <L324> tsx +0+2e0 <L325> tsy +0+2e2 <L326> txs +0+2e3 <L327> tys +0+2e5 <L328> wai +0+2e6 <L329> xgdx +0+2e7 <L330> xgdy diff --git a/gas/testsuite/gas/m68hc11/all_insns.s b/gas/testsuite/gas/m68hc11/all_insns.s new file mode 100644 index 0000000..f20b5b9 --- /dev/null +++ b/gas/testsuite/gas/m68hc11/all_insns.s @@ -0,0 +1,335 @@ +# Example of M68hc11 instructions + .sect .text +_start: +L0: aba +L1: abx +L2: aby +L3: adca #103 +L4: adca *Z198 +L5: adca 105,X +L6: adca symbol115 +L7: adca 81,X +L8: adcb #255 +L9: adcb *Z74 +L10: adcb 236,X +L11: adcb symbol41 +L12: adcb 205,X +L13: adda #186 +L14: adda *Z171 +L15: adda 242,X +L16: adda symbol251 +L17: adda 227,X +L18: addb #70 +L19: addb *Z124 +L20: addb 194,X +L21: addb symbol84 +L22: addb 248,X +L23: addd #8987 +L24: addd *Z232 +L25: addd 231,X +L26: addd symbol141 +L27: addd 118,X +L28: anda #90 +L29: anda *Z46 +L30: anda 99,X +L31: anda symbol51 +L32: anda 159,X +L33: andb #201 +L34: andb *Z154 +L35: andb 102,X +L36: andb symbol50 +L37: andb 13,X +L38: asl 183,X +L39: asl symbol49 +L40: asl 88,X +L41: asla +L42: aslb +L43: asld +L44: asr 163,X +L45: asr symbol90 +L46: asr 37,X +L47: asra +L48: asrb +L49: bcc L93 +L50: bclr *Z5 #$17 +L51: bclr 88,X #$e9 +L52: bclr 94,X #$d4 +L53: bcs L171 +L54: beq L178 +L55: bge L205 +L56: bgt L198 +L57: bhi L155 +L58: bhs L180 +L59: bita #84 +L60: bita *Z17 +L61: bita 14,X +L62: bita symbol130 +L63: bita 116,X +L64: bitb #65 +L65: bitb *Z33 +L66: bitb 61,X +L67: bitb symbol220 +L68: bitb 135,X +L69: ble L112 +L70: blo L233 +L71: bls L62 +L72: blt L161 +L73: bmi L65 +L74: bne L225 +L75: bpl L252 +L76: bra L103 +L77: brclr *Z62 #$01 .+126 +L78: brclr 151,X #$ea .+92 +L79: brclr 107,X #$96 .+15 +L80: brn L56 +L81: brset *Z92 #$2a .+108 +L82: brset 176,X #$3b .+123 +L83: brset 50,X #$af .+60 +L84: bset *Z84 #$ec +L85: bset 24,X #$db +L86: bset 92,X #$02 +L87: bsr L26 +L88: bvc L254 +L89: bvs L67 +L90: cba +L91: clc +L92: cli +L93: clr 251,X +L94: clr symbol250 +L95: clr 170,X +L96: clra +L97: clrb +L98: clv +L99: cmpa #58 +L100: cmpa *Z251 +L101: cmpa 41,X +L102: cmpa symbol209 +L103: cmpa 230,X +L104: cmpb #5 +L105: cmpb *Z60 +L106: cmpb 124,X +L107: cmpb symbol148 +L108: cmpb 117,X +L109: cmpd #4056 +L110: cmpd *Z190 +L111: cmpd 97,X +L112: cmpd symbol137 +L113: cmpd 249,X +L114: cmpx #44892 +L115: cmpx *Z187 +L116: cmpx 168,X +L117: cmpx symbol153 +L118: cmpx 15,X +L119: cmpy #16533 +L120: cmpy *Z177 +L121: cmpy 235,X +L122: cmpy symbol241 +L123: cmpy 179,X +L124: com 5,X +L125: com symbol239 +L126: com 247,X +L127: coma +L128: comb +L129: cpd #48896 +L130: cpd *Z233 +L131: cpd 161,X +L132: cpd symbol58 +L133: cpd 229,X +L134: cpx #36810 +L135: cpx *Z11 +L136: cpx 203,X +L137: cpx symbol208 +L138: cpx 72,X +L139: cpy #583 +L140: cpy *Z100 +L141: cpy 189,X +L142: cpy symbol31 +L143: cpy 35,X +L144: daa +L145: dec 30,X +L146: dec symbol168 +L147: dec 28,X +L148: deca +L149: decb +L150: des +L151: dex +L152: dey +L153: eora #123 +L154: eora *Z100 +L155: eora 197,X +L156: eora symbol20 +L157: eora 115,X +L158: eorb #90 +L159: eorb *Z197 +L160: eorb 94,X +L161: eorb symbol75 +L162: eorb 121,X +L163: fdiv +L164: idiv +L165: inc 99,X +L166: inc symbol59 +L167: inc 112,X +L168: inca +L169: incb +L170: ins +L171: inx +L172: iny +L173: jmp 100,X +L174: jmp symbol36 +L175: jmp 17,X +L176: jsr *Z158 +L177: jsr 9,X +L178: jsr symbol220 +L179: jsr 170,X +L180: ldaa #212 +L181: ldaa *Z172 +L182: ldaa 242,X +L183: ldaa symbol27 +L184: ldaa 16,X +L185: ldab #175 +L186: ldab *Z59 +L187: ldab 51,X +L188: ldab symbol205 +L189: ldab 227,X +L190: ldd #50512 +L191: ldd *Z72 +L192: ldd 71,X +L193: ldd symbol21 +L194: ldd 92,X +L195: lds #20411 +L196: lds *Z111 +L197: lds 34,X +L198: lds symbol25 +L199: lds 186,X +L200: ldx #22427 +L201: ldx *Z125 +L202: ldx 245,X +L203: ldx symbol11 +L204: ldx 225,X +L205: ldy #44058 +L206: ldy *Z28 +L207: ldy 127,X +L208: ldy symbol35 +L209: ldy 248,X +L210: lsl 41,X +L211: lsl symbol248 +L212: lsl 164,X +L213: lsla +L214: lslb +L215: lsld +L216: lsr 27,X +L217: lsr symbol19 +L218: lsr 181,X +L219: lsra +L220: lsrb +L221: lsrd +L222: mul +L223: neg 202,X +L224: neg symbol78 +L225: neg 232,X +L226: nega +L227: negb +L228: nop +L229: oraa #152 +L230: oraa *Z50 +L231: oraa 56,X +L232: oraa symbol224 +L233: oraa 121,X +L234: orab #77 +L235: orab *Z61 +L236: orab 52,X +L237: orab symbol188 +L238: orab 95,X +L239: psha +L240: pshb +L241: pshx +L242: pshy +L243: pula +L244: pulb +L245: pulx +L246: puly +L247: rol 78,X +L248: rol symbol119 +L249: rol 250,X +L250: rola +L251: rolb +L252: ror 203,X +L253: ror symbol108 +L254: ror 5,X +L255: rora +L256: rorb +L257: rti +L258: rts +L259: sba +L260: sbca #172 +L261: sbca *Z134 +L262: sbca 33,X +L263: sbca symbol43 +L264: sbca 170,X +L265: sbcb #26 +L266: sbcb *Z85 +L267: sbcb 162,X +L268: sbcb symbol190 +L269: sbcb 112,X +L270: sec +L271: sei +L272: sev +L273: staa *Z181 +L274: staa 115,X +L275: staa symbol59 +L276: staa 4,X +L277: stab *Z92 +L278: stab 211,X +L279: stab symbol54 +L280: stab 148,X +L281: std *Z179 +L282: std 175,X +L283: std symbol226 +L284: std 240,X +L285: stop +L286: sts *Z228 +L287: sts 158,X +L288: sts symbol79 +L289: sts 50,X +L290: stx *Z21 +L291: stx 73,X +L292: stx symbol253 +L293: stx 130,X +L294: sty *Z78 +L295: sty 169,X +L296: sty symbol8 +L297: sty 112,X +L298: suba #212 +L299: suba *Z178 +L300: suba 138,X +L301: suba symbol41 +L302: suba 84,X +L303: subb #72 +L304: subb *Z154 +L305: subb 10,X +L306: subb symbol188 +L307: subb 213,X +L308: subd #61710 +L309: subd *Z24 +L310: subd 168,X +L311: subd symbol68 +L312: subd 172,X +L313: swi +L314: tab +L315: tap +L316: tba +L317: test +L318: tpa +L319: tst 91,X +L320: tst symbol243 +L321: tst 142,X +L322: tsta +L323: tstb +L324: tsx +L325: tsy +L326: txs +L327: tys +L328: wai +L329: xgdx +L330: xgdy + diff --git a/gas/testsuite/gas/m68hc11/insns.d b/gas/testsuite/gas/m68hc11/insns.d new file mode 100644 index 0000000..fe09680 --- /dev/null +++ b/gas/testsuite/gas/m68hc11/insns.d @@ -0,0 +1,44 @@ +#objdump: -d --prefix-addresses +#as: -m68hc11 +#name: insns + +# Test handling of basic instructions. + +.*: +file format elf32\-m68hc11 + +Disassembly of section .text: +0+000 <_start> lds #0+0400 <L1\+0x3a9> +0+003 <_start\+0x3> ldx #0+0001 <_start\+0x1> +0+006 <Loop> jsr 0+0010 <test> +0+009 <Loop\+0x3> dex +0+00a <Loop\+0x4> bne 0+0006 <Loop> +0+00c <Stop> .byte 0xcd, 0x03 +0+00e <Stop\+0x2> bra 0+0000 <_start> +0+010 <test> ldd #0+0002 <_start\+0x2> +0+013 <test\+0x3> jsr 0+0017 <test2> +0+016 <test\+0x6> rts +0+017 <test2> ldx 23,y +0+01a <test2\+0x3> std 23,x +0+01c <test2\+0x5> ldd 0,x +0+01e <test2\+0x7> sty 0,y +0+021 <test2\+0xa> stx 0,y +0+024 <test2\+0xd> brclr 6,x #\$04 00000017 <test2> +0+028 <test2\+0x11> brclr 12,x #\$08 00000017 <test2> +0+02c <test2\+0x15> ldd \*0+0 <_start> +0+02e <test2\+0x17> ldx \*0+2 <_start\+0x2> +0+030 <test2\+0x19> clr 0+0 <_start> +0+033 <test2\+0x1c> clr 0+1 <_start\+0x1> +0+036 <test2\+0x1f> bne 0+34 <test2\+0x1d> +0+038 <test2\+0x21> beq 0+3c <test2\+0x25> +0+03a <test2\+0x23> bclr \*0+1 <_start\+0x1> #\$20 +0+03d <test2\+0x26> brclr \*0+2 <_start\+0x2> #\$28 0+017 <test2> +0+041 <test2\+0x2a> ldy #0+ffec <L1\+0xff95> +0+045 <test2\+0x2e> ldd 12,y +0+048 <test2\+0x31> addd 44,y +0+04b <test2\+0x34> addd 50,y +0+04e <test2\+0x37> subd 0+02c <test2\+0x15> +0+051 <test2\+0x3a> subd #0+02c <test2\+0x15> +0+054 <test2\+0x3d> jmp 0000000c <Stop> +0+057 <L1> anda #23 +0+059 <L1\+0x2> andb #0 +0+05b <L1\+0x4> rts
\ No newline at end of file diff --git a/gas/testsuite/gas/m68hc11/insns.s b/gas/testsuite/gas/m68hc11/insns.s new file mode 100644 index 0000000..2b2f971 --- /dev/null +++ b/gas/testsuite/gas/m68hc11/insns.s @@ -0,0 +1,60 @@ +# Test for correct generation of 68HC11 insns. + + .globl _start + .sect .text + +_start: + lds #stack+1024 + ldx #1 +Loop: + jsr test + dex + bne Loop +Stop: + + .byte 0xcd + .byte 3 + bra _start + +test: + ldd #2 + jsr test2 + rts + +B_low = 12 +A_low = 44 +D_low = 50 +value = 23 + + .globl test2 +test2: + ldx value,y + std value,x + ldd ,x + sty ,y + stx ,y + brclr 6,x,#4,test2 + brclr 12,x #8 test2 + ldd *ZD1 + ldx *ZD1+2 + clr *ZD2 + clr *ZD2+1 + bne .-4 + beq .+2 + bclr *ZD1+1, #32 + brclr *ZD2+2, #40, test2 + ldy #24+_start-44 + ldd B_low,y + addd A_low,y + addd D_low,y + subd A_low + subd #A_low + jmp Stop +L1: + anda #%lo(test2) + andb #%hi(test2) + rts + + .sect .data + +.comm stack, 1024 diff --git a/gas/testsuite/gas/m68hc11/lbranch.d b/gas/testsuite/gas/m68hc11/lbranch.d new file mode 100644 index 0000000..74cda03 --- /dev/null +++ b/gas/testsuite/gas/m68hc11/lbranch.d @@ -0,0 +1,47 @@ +#objdump: -d --prefix-addresses +#as: -m68hc11 +#name: lbranch + +# Test handling of basic instructions. + +.*: +file format elf32\-m68hc11 + +Disassembly of section .text: +0+0000 <_rcall> ldaa #16 +0+0002 <_rcall\+0x2> jmp 0+010b <Lend> +0+0005 <_rcall\+0x5> jsr 0+011b <toto> +0+0008 <_rcall\+0x8> beq 0+000d <_rcall\+0xd> +0+000a <_rcall\+0xa> jmp 0+011b <toto> +0+000d <_rcall\+0xd> bne 0+0012 <_rcall\+0x12> +0+000f <_rcall\+0xf> jmp 0+011b <toto> +0+0012 <_rcall\+0x12> bcc 0+0017 <_rcall\+0x17> +0+0014 <_rcall\+0x14> jmp 0+011b <toto> +0+0017 <_rcall\+0x17> bcs 0+001c <_rcall\+0x1c> +0+0019 <_rcall\+0x19> jmp 0+011b <toto> +0+001c <_rcall\+0x1c> xgdx +0+001d <_rcall\+0x1d> xgdx +0+001e <_rcall\+0x1e> bne 0+0023 <_rcall\+0x23> +0+0020 <_rcall\+0x20> jmp 0+0180 <bidule> +0+0023 <_rcall\+0x23> bcc 0+0028 <_rcall\+0x28> +0+0025 <_rcall\+0x25> jmp 0+0180 <bidule> +0+0028 <_rcall\+0x28> bcs 0+002d <_rcall\+0x2d> +0+002a <_rcall\+0x2a> jmp 0+0180 <bidule> +0+002d <_rcall\+0x2d> xgdx +0+002e <_rcall\+0x2e> jmp 0+00c8 <_rcall\+0xc8> +0+0031 <_rcall\+0x31> jsr 0+0783 <bidule\+0x603> +0+0034 <_rcall\+0x34> beq 0+0039 <_rcall\+0x39> +0+0036 <_rcall\+0x36> jmp 0+010b <Lend> +0+0039 <_rcall\+0x39> jsr 0+011b <toto> +0+003c <_rcall\+0x3c> bne 0+0041 <_rcall\+0x41> +0+003e <_rcall\+0x3e> jmp 0+011b <toto> +[ ]*\.\.\. +0+0109 <_rcall\+0x109> ldaa \*0+0000 <_rcall> +0+010b <Lend> bls 0+0110 <Lend\+0x5> +0+010d <Lend\+0x2> jmp 0+0000 <_rcall> +0+0110 <Lend\+0x5> bhi 0+0115 <Lend\+0xa> +0+0112 <Lend\+0x7> jmp 0+0000 <_rcall> +0+0115 <Lend\+0xa> jsr 0+0000 <_rcall> +0+0118 <Lend\+0xd> ldx #0+000c <_rcall\+0xc> +0+011b <toto> rts +[ ]*\.\.\. +0+0180 <bidule> rts diff --git a/gas/testsuite/gas/m68hc11/lbranch.s b/gas/testsuite/gas/m68hc11/lbranch.s new file mode 100644 index 0000000..568d8a7 --- /dev/null +++ b/gas/testsuite/gas/m68hc11/lbranch.s @@ -0,0 +1,41 @@ +# Test for the 68HC11 long branch switch + .text + .globl _rcall + .globl _start +_start: +_rcall: + ldaa #0x10 ;86 10 + jbra Lend ; Must be switched to a jmp + jbsr toto ; -> to a jsr + jbne toto ; -> to a beq+jmp + jbeq toto ; -> to a bne+jmp + jbcs toto ; -> to a bcc+jmp + jbcc toto ; -> to a bcs+jmp + xgdx + xgdx + beq bidule ; -> to a bne+jmp + bcs bidule ; -> to a bcc+jmp + bcc bidule ; -> to a bcs+jmp + xgdx + jbra 200 + jbsr 1923 + bne Lend ; -> to a beq+jmp + jbsr toto + jbeq toto + .skip 200 + ldaa *dir ;96 33 +Lend: + bhi external_op + bls external_op + bsr out + ldx #12 +toto: + rts + .skip 100 +bidule: + rts + .sect ".page0" +dir: + .long 0 + + ; END diff --git a/gas/testsuite/gas/m68hc11/opers12.d b/gas/testsuite/gas/m68hc11/opers12.d new file mode 100644 index 0000000..fec02eb --- /dev/null +++ b/gas/testsuite/gas/m68hc11/opers12.d @@ -0,0 +1,70 @@ +#objdump: -d --prefix-addresses +#as: -m68hc12 +#name: opers + +.*: +file format elf32\-m68hc12 + +Disassembly of section .text: +0+000 <start> anda \[12,X\] +0+004 <start\+0x4> ldaa #10 +0+006 <start\+0x6> ldx 0+009 <L1> +0+009 <L1> ldy 0,X +0+00b <L1\+0x2> addd 1,Y +0+00d <L1\+0x4> subd -1,Y +0+00f <L1\+0x6> eora 15,Y +0+011 <L1\+0x8> eora -16,Y +0+013 <L1\+0xa> eorb 16,Y +0+016 <L1\+0xd> eorb -17,Y +0+019 <L1\+0x10> oraa 128,SP +0+01c <L1\+0x13> orab -128,SP +0+01f <L1\+0x16> orab 255,X +0+022 <L1\+0x19> orab -256,X +0+025 <L1\+0x1c> anda 256,X +0+029 <L1\+0x20> andb -257,X +0+02d <L1\+0x24> anda \[12,X\] +0+031 <L1\+0x28> ldaa \[257,Y\] +0+035 <L1\+0x2c> ldab \[32767,SP\] +0+039 <L1\+0x30> ldd \[32768,PC\] +0+03d <L1\+0x34> ldd 0,PC +0+040 <L1\+0x37> std A,X +0+042 <L1\+0x39> ldx B,X +0+044 <L1\+0x3b> stx D,Y +0+046 <L1\+0x3d> addd 1,\+X +0+048 <L1\+0x3f> addd 2,\+X +0+04a <L1\+0x41> addd 8,\+X +0+04c <L1\+0x43> addd 1,SP\+ +0+04e <L1\+0x45> addd 2,SP\+ +0+050 <L1\+0x47> addd 8,SP\+ +0+052 <L1\+0x49> subd 1,\-Y +0+054 <L1\+0x4b> subd 2,\-Y +0+056 <L1\+0x4d> subd 8,\-Y +0+058 <L1\+0x4f> addd 1,Y\- +0+05a <L1\+0x51> addd 2,Y\- +0+05c <L1\+0x53> addd 8,Y\- +0+05e <L1\+0x55> std \[D,X\] +0+060 <L1\+0x57> std \[D,Y\] +0+062 <L1\+0x59> std \[D,SP\] +0+064 <L1\+0x5b> std \[D,PC\] +0+066 <L1\+0x5d> beq 0+009 <L1> +0+068 <L1\+0x5f> lbeq 0+000 <start> +0+06c <L1\+0x63> lbcc 0+0bc <L2> +0+070 <L1\+0x67> movb 0+000 <start>, 1,X +0+075 <L1\+0x6c> movw 1,X, 0+000 <start> +0+07a <L1\+0x71> movb 0+000 <start>, 1,\+X +0+07f <L1\+0x76> movb 0+000 <start>, 1,\-X +0+084 <L1\+0x7b> movb #23, 1,\-SP +0+088 <L1\+0x7f> movb 0+009 <L1>, 0+0bc <L2> +0+08e <L1\+0x85> movb 0+009 <L1>, A,X +0+093 <L1\+0x8a> movw 0+009 <L1>, B,X +0+098 <L1\+0x8f> movw 0+009 <L1>, D,X +0+09d <L1\+0x94> movw D,X, A,X +0+0a1 <L1\+0x98> movw B,SP, D,PC +0+0a5 <L1\+0x9c> movw B,SP, 0+009 <L1> +0+0aa <L1\+0xa1> movw B,SP, 1,X +0+0ae <L1\+0xa5> movw D,X, A,Y +0+0b2 <L1\+0xa9> trap #48 +0+0b4 <L1\+0xab> trap #57 +0+0b6 <L1\+0xad> trap #64 +0+0b8 <L1\+0xaf> trap #128 +0+0ba <L1\+0xb1> trap #255 +0+0bc <L2> rts diff --git a/gas/testsuite/gas/m68hc11/opers12.s b/gas/testsuite/gas/m68hc11/opers12.s new file mode 100644 index 0000000..dcf53d1 --- /dev/null +++ b/gas/testsuite/gas/m68hc11/opers12.s @@ -0,0 +1,72 @@ + +# +# Try to verify all operand modes for 68HC12 +# + sect .text + globl start + +start: + anda [12,x] + ldaa #10 + ldx L1 +L1: ldy ,x + addd 1,y + subd -1,y + eora 15,y + eora -16,y + eorb 16,y + eorb -17,y + oraa 128,sp + orab -128,sp + orab 255,x + orab -256,x + anda 256,x + andb -257,x + anda [12,x] + ldaa [257,y] + ldab [32767,sp] + ldd [32768,pc] + ldd L1,pc + std a,x + ldx b,x + stx d,y + addd 1,+x + addd 2,+x + addd 8,+x + addd 1,sp+ + addd 2,sp+ + addd 8,sp+ + subd 1,-y + subd 2,-y + subd 8,-y + addd 1,y- + addd 2,y- + addd 8,y- + std [d,x] + std [d,y] + std [d,sp] + std [d,pc] + beq L1 + lbeq start + lbcc L2 + movb start, 1,x + movw 1,x, start + movb start, 1,+x + movb start, 1,-x + movb #23, 1,-sp + movb L1, L2 + movb L1, a,x + movw L1, b,x + movw L1, d,x + movw d,x, a,x + movw b,sp, d,pc + movw b,sp, L1 + movw b,sp, 1,x + movw d,x, a,y + trap #0x30 + trap #0x39 + trap #0x40 + trap #0x80 + trap #255 +L2: + rts diff --git a/gas/testsuite/gas/m68k/all.exp b/gas/testsuite/gas/m68k/all.exp index 88ab2a0..d526170 100644 --- a/gas/testsuite/gas/m68k/all.exp +++ b/gas/testsuite/gas/m68k/all.exp @@ -1,6 +1,18 @@ # # Some generic m68k tests # +if [istarget "m68hc11-*-*"] then { + return +} +if [istarget "m68hc12-*-*"] then { + return +} +if [istarget "m6811-*-*"] then { + return +} +if [istarget "m6812-*-*"] then { + return +} if [istarget m68*-*-*] then { gas_test "t2.s" "" "" "cross-section branch" if [istarget m68*-motorola-sysv] then { @@ -36,4 +48,4 @@ if [istarget m68*-*-*] then { } if [info exists errorInfo] then { unset errorInfo - } +} |