diff options
Diffstat (limited to 'gas/config/tc-mips.c')
| -rw-r--r-- | gas/config/tc-mips.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 54442f4..355a566 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -510,7 +510,8 @@ static int mips_32bitmode = 0; #define CPU_HAS_ROR(CPU) CPU_HAS_DROR (CPU) /* True if CPU is in the Octeon family */ -#define CPU_IS_OCTEON(CPU) ((CPU) == CPU_OCTEON || (CPU) == CPU_OCTEONP || (CPU) == CPU_OCTEON2) +#define CPU_IS_OCTEON(CPU) ((CPU) == CPU_OCTEON || (CPU) == CPU_OCTEONP \ + || (CPU) == CPU_OCTEON2 || (CPU) == CPU_OCTEON3) /* True if CPU has seq/sne and seqi/snei instructions. */ #define CPU_HAS_SEQ(CPU) (CPU_IS_OCTEON (CPU)) @@ -18663,6 +18664,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "octeon", 0, 0, ISA_MIPS64R2, CPU_OCTEON }, { "octeon+", 0, 0, ISA_MIPS64R2, CPU_OCTEONP }, { "octeon2", 0, 0, ISA_MIPS64R2, CPU_OCTEON2 }, + { "octeon3", 0, ASE_VIRT | ASE_VIRT64, ISA_MIPS64R5, CPU_OCTEON3 }, /* RMI Xlr */ { "xlr", 0, 0, ISA_MIPS64, CPU_XLR }, |