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Diffstat (limited to 'gas/config/tc-arm.c')
-rw-r--r--gas/config/tc-arm.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 7760d18..2f394ba 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -17282,6 +17282,7 @@ static void
do_mve_vstr_vldr_RQ (int size, int elsize, int load)
{
unsigned os = inst.operands[1].imm >> 5;
+ unsigned type = inst.vectype.el[0].type;
constraint (os != 0 && size == 8,
_("can not shift offsets when accessing less than half-word"));
constraint (os && os != neon_logbits (size),
@@ -17312,15 +17313,14 @@ do_mve_vstr_vldr_RQ (int size, int elsize, int load)
constraint (inst.operands[0].reg == (inst.operands[1].imm & 0x1f),
_("destination register and offset register may not be"
" the same"));
- constraint (size == elsize && inst.vectype.el[0].type != NT_unsigned,
+ constraint (size == elsize && type == NT_signed, BAD_EL_TYPE);
+ constraint (size != elsize && type != NT_unsigned && type != NT_signed,
BAD_EL_TYPE);
- constraint (inst.vectype.el[0].type != NT_unsigned
- && inst.vectype.el[0].type != NT_signed, BAD_EL_TYPE);
- inst.instruction |= (inst.vectype.el[0].type == NT_unsigned) << 28;
+ inst.instruction |= ((size == elsize) || (type == NT_unsigned)) << 28;
}
else
{
- constraint (inst.vectype.el[0].type != NT_untyped, BAD_EL_TYPE);
+ constraint (type != NT_untyped, BAD_EL_TYPE);
}
inst.instruction |= 1 << 23;