diff options
48 files changed, 590 insertions, 663 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 615e3a6..1cf803e 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,32 @@ +2015-02-25 Kaz Kojima <kkojima@rr.iij4u.or.jp> + Oleg Endo <olegendo@gcc.gnu.org> + + * gas/sh/arch/arch.exp: Replace dead code to generate expected .s files + with ... + * gas/sh/arch/sh-opc-gen-as.pl: ... this new script. + * gas/sh/arch/arch_expected.txt: Regenerate. + * gas/sh/arch/sh-dsp.s: Likewise. + * gas/sh/arch/sh-opc-gen-as.pl: Likewise. + * gas/sh/arch/sh.s: Likewise. + * gas/sh/arch/sh2.s: Likewise. + * gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Likewise. + * gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Likewise. + * gas/sh/arch/sh2a-nofpu.s: Likewise. + * gas/sh/arch/sh2a-or-sh3e.s: Likewise. + * gas/sh/arch/sh2a-or-sh4.s: Likewise. + * gas/sh/arch/sh2a.s: Likewise. + * gas/sh/arch/sh2e.s: Likewise. + * gas/sh/arch/sh3-dsp.s: Likewise. + * gas/sh/arch/sh3-nommu.s: Likewise. + * gas/sh/arch/sh3.s: Likewise. + * gas/sh/arch/sh3e.s: Likewise. + * gas/sh/arch/sh4-nofpu.s: Likewise. + * gas/sh/arch/sh4-nommu-nofpu.s: Likewise. + * gas/sh/arch/sh4.s: Likewise. + * gas/sh/arch/sh4a-nofpu.s: Likewise. + * gas/sh/arch/sh4a.s: Likewise. + * gas/sh/arch/sh4al-dsp.s: Likewise. + 2015-02-24 Nick Clifton <nickc@redhat.com> * gas/elf/elf.exp: Add special version of the section2 test for diff --git a/gas/testsuite/gas/sh/arch/arch.exp b/gas/testsuite/gas/sh/arch/arch.exp index 8841b4b..07177ec 100644 --- a/gas/testsuite/gas/sh/arch/arch.exp +++ b/gas/testsuite/gas/sh/arch/arch.exp @@ -204,318 +204,4 @@ if [istarget sh*-*-elf] then { close $outfile } -return - -######################################################################### -# Generate one sh*.s file for each architecture defined in sh-opc.h -# This will contain all the instructions valid on that platform -# -# This code produces pass or fail reports for each instruction -# in order to ensure that problems are visible to the developer, -# rather than just warnings hidden in the log file. - -# These variables will contains the architecture -# and instruction data extracted from sh-opc.h -array set arches {} -set archcount 0 -array set insns {} -set insncount 0 - -# Pull the architecture inheritance macros out of sh-opc.h -# Pull all the insns out of the sh-opc.h file. -send_log "Reading sh-opc.h\n" -send_log "========================================================\n" -spawn -noecho cat "$srcdir/../../opcodes/sh-opc.h" ;# -open doesn't seem to be reliable -expect { - -re {#define\s+arch_([^ ]*)_up\s*\(([^)]*)\)} { - set arches($archcount) [string map {_ -} $expect_out(1,string)] - set arches($archcount,descendents) [string map {_ -} $expect_out(2,string)] - incr archcount - pass "Architecture arch_$expect_out(1,string) read OK" - exp_continue - } - # Match all 32 bit opcodes - -re {(?x) # enable expanded regexp syntax - ^/\* # open C comment at start of input - (?:\s*\S+){2} # 2 binary words (for 32 bit opcodes) - \s+ ([^*]+?) # instruction mnemonics (must not leave comment) - \s* \*/ # close C comment - \s* \{ # open brace of data initialiser - (?:[^\}]+\}){2}# 2 brace pairs (operands and nibbles) - \s* , # comma - \s* arch_(\S+)_up # architecture name - \s* \| # literal or - \s* arch_op32 # 32 bit opcode indicator - \s* \} # close brace of data initialiser - } { - set insns(insn,$insncount) $expect_out(1,string) - set insns(arch,$insncount) [string map {_ -} $expect_out(2,string)] - set insns(context,$insncount) $expect_out(0,string) - incr insncount - pass "Instruction '$expect_out(1,string)' read OK" - exp_continue - } - # Special case: Match the repeat pseudo op - -re {(?x) # enable expanded regexp syntax - ^/\* # open C comment at start of input - \s* repeat # repeat does not have a bit pattern - \s+ start\s+end # don't read fake operands as such (replaced below) - \s+ ([^*]+?) # instruction operand - \s* \*/ # close C comment - \s* \{ # open brace of data initialiser - (?:[^\}]+\}){2}# 2 brace pairs (operands and nibbles) - \s* , # comma - \s* arch_(\S+)_up # architecture name - \s* \} # close brace of data initialiser - } { - set insns(insn,$insncount) "repeat 10 20 $expect_out(1,string)" - set insns(arch,$insncount) [string map {_ -} $expect_out(2,string)] - set insns(context,$insncount) $expect_out(0,string) - incr insncount - pass "Instruction '$expect_out(1,string)' read OK" - exp_continue - } - # Match all 16 bit opcodes - -re {(?x) # enable expanded regexp syntax - ^/\* # open C comment at start of input - \s* \S+ # 1 binary word (for 16 bit opcodes) - \s+ ([^*]+?) # instruction mnemonics (must not leave comment) - \s* \*/ # close C comment - \s* \{ # open brace of data initialiser - (?:[^\}]+\}){2}# 2 brace pairs (operands and nibbles) - \s* , # comma - \s* arch_(\S+)_up # architecture name - \s* \} # close brace of data initialiser - } { - set insns(insn,$insncount) $expect_out(1,string) - set insns(arch,$insncount) [string map {_ -} $expect_out(2,string)] - set insns(context,$insncount) $expect_out(0,string) - incr insncount - pass "Instruction '$expect_out(1,string)' read OK" - exp_continue - } - # Match all remaining possible instructions (error detection) - -re {(?x) # enable expanded regexp syntax - ^/\* # open C comment at start of input - (?:[^*]*(?:\*[^/])?)+ # match contents of comment allowing * - \*/ # close C comment - \s* \{ # open brace of data initialiser - (?:[^\}]+\}){2}# 2 brace pairs (operands and nibbles) - \s* , # comma - [^\}]* - arch # look for 'arch' anywhere before closing brace - [^\}]* - \} # close brace of data initialiser - } { - fail "Found something that looks like an instruction but cannot be decoded:\n\t$expect_out(0,string)" - exp_continue - } - # No match so move to next (possible) comment - -re {^.+?((?=/\*)|(?=\#\s*define))} exp_continue -} -send_log "--------------------------------------------------------\n" - -if {$archcount == 0} then { - fail "Unable to read any architectures from sh-opc.h" -} else { - pass "Read architecture data from sh-opc.h" -} -if {$insncount == 0} then { - fail "Unable to read any instructions from sh-opc.h" -} else { - pass "Read instruction data from sh-opc.h" -} - -# Munge the insns such that they will assemble -# Each instruction in sh-opc.h has an example format -# with placeholders for the parameters. These placeholders -# need to be replaced with real registers and constants -# as appropriate in order to assemble correctly. -for {set i 0} {$i < $insncount} {incr i} { - set out $insns(insn,$i) - if {[regexp {AY_.{3,4}_N} $insns(context,$i)] == 1} then { - regsub -nocase {<REG_N>} $out {r6} out - } else { - regsub -nocase {<REG_N>} $out {r4} out - } - regsub -nocase {<REG_M>} $out {r5} out - if {[regexp {IMM0_20BY8} $insns(context,$i)] == 1} then { - regsub -nocase {<imm>} $out {1024} out - } else { - regsub -nocase {<imm>} $out {4} out - } - regsub -nocase {<bdisp\d*>} $out {.+8} out - regsub -nocase {<disp12>} $out {2048} out - regsub -nocase {<disp\d*>} $out {8} out - regsub -nocase {Rn_BANK} $out {r1_bank} out - regsub -nocase {Rm_BANK} $out {r2_bank} out - regsub -nocase {<F_REG_N>} $out {fr1} out - regsub -nocase {<F_REG_M>} $out {fr2} out - regsub -nocase {<D_REG_N>} $out {dr2} out - regsub -nocase {<D_REG_M>} $out {dr4} out - regsub -nocase {<V_REG_N>} $out {fv0} out - regsub -nocase {<V_REG_M>} $out {fv4} out - regsub -nocase {<DX_REG_N>} $out {xd2} out - regsub -nocase {<DX_REG_M>} $out {xd4} out - regsub -nocase (XMTRX_M4) $out {xmtrx} out - regsub -nocase (<DSP_REG_X>) $out {x1} out - regsub -nocase (<DSP_REG_Y>) $out {y0} out - regsub -nocase (<DSP_REG_M>) $out {a1} out - regsub -nocase (<DSP_REG_N>) $out {m0} out - regsub -nocase (<REG_Axy>) $out {r1} out - regsub -nocase (<REG_Ayx>) $out {r3} out - regsub -nocase (<DSP_REG_XY>) $out {y1} out - regsub -nocase (<DSP_REG_YX>) $out {y1} out - regsub -nocase (<DSP_REG_AX>) $out {a0} out - regsub -nocase (<DSP_REG_AY>) $out {a0} out - regsub (Se) $out {x0} out - regsub (Sf) $out {y0} out - regsub (Dg) $out {m0} out - # Put in a dct in order to differentiate between - # conditional and non-conditional pabs and prnd - # i.e. between sh-dsp and sh4al-dsp - if {[regexp {PPIC} $insns(context,$i)] == 1} then { - set out "dct $out" - } - # Make sure the proper alignments are ok. - if [regexp {i8p4} $insns(context,$i)] { - set out ".align 2\n\t$out" - } - - # Write back the results. - set insns(insn,$i) $out - set insns(context,$i) [string map {\n " " \r " "} $insns(context,$i)] -} - -# Initialise the data structure for the inheritance -array set archtree {} -for {set a 0} {$a < $archcount} {incr a} { - set archtree($arches($a)) {} -} - -# For each architecture, extract its immediate parents -for {set a 0} {$a < $archcount} {incr a} { - set s $arches($a,descendents) - regsub -all {[\s|]+} $s { } s - foreach word [split $s { }] { - # Word should be one of arch-..., | (or), or arch-...-up - # We only want the -up information - # Note that the _ -> - translation was done above - if {[regexp {^arch-(.*)-up$} $word match arch] == 1} then { - # $arch is the descendent of $arches($a), - # so $arches($a) is the parent of $arch - lappend archtree($arch) $arches($a) - } - } -} - -# Propagate the inhertances through the list -# Iterate to ensure all inheritances are found (necessary?) -set changesmade 1 -while {$changesmade == 1} { - set changesmade 0 - foreach a [array names archtree] { - foreach b [array names archtree] { - # If arch 'a' is a parent of arch 'b' then b inherits from a - if {[lsearch -exact $archtree($b) $a] != -1} then { - # Only add each arch if it is not already present - foreach arch $archtree($a) { - if {[lsearch -exact $archtree($b) $arch] == -1} then { - lappend archtree($b) $arch - set changesmade 1 - } - } - } - } - } -} - -# Generate the assembler file for each architecture -# Also count up how many instructions should be valid for each architecture -array set insns_valid {} -for {set arch 0} {$arch < $archcount} {incr arch} { - set insns_valid($arches($arch)) 0 - set fd [open $arches($arch).s w 0666] - puts $fd "! Generated file. DO NOT EDIT.\n!" - puts $fd "! This file was generated by gas/testsuite/gas/sh/arch/arch.exp ." - puts $fd "! This file should contain every instruction valid on" - puts $fd "! architecture $arches($arch) but no more." - puts $fd "! If the tests are failing because the expected results" - puts $fd "! have changed then run 'make check' and copy the new file" - puts $fd "! from <objdir>/gas/testsuite/$arches($arch).s" - puts $fd "! to <srcdir>/gas/testsuite/gas/sh/arch/$arches($arch).s ." - puts $fd "! Make sure there are no unexpected or missing instructions." - puts $fd "\n\t.section .text" - puts $fd "[string map {- _} $arches($arch)]:" - puts $fd "! Instructions introduced into $arches($arch)" - for {set i 0} {$i < $insncount} {incr i} { - if [string equal $arches($arch) $insns(arch,$i)] then { - puts $fd [format "\t%-25s ;!%s" $insns(insn,$i) $insns(context,$i)] - incr insns_valid($arches($arch)) - } - } - puts $fd "\n! Instructions inherited from ancestors: [lsort -increasing $archtree($arches($arch))]" - for {set i 0} {$i < $insncount} {incr i} { - if {[string equal $arches($arch) $insns(arch,$i)] != 1 && [lsearch -exact $archtree($arches($arch)) $insns(arch,$i)] != -1} then { - puts $fd [format "\t%-25s ;!%s" $insns(insn,$i) $insns(context,$i)] - incr insns_valid($arches($arch)) - } - } - close $fd -} - - -################################################################### -# Compare the newly created sh*.s files with the existing -# ones in the testsuite - -for {set arch 0} {$arch < $archcount} {incr arch} { - send_log "diff $srcdir/$subdir/$arches($arch).s $arches($arch).s\n" - catch "exec diff $srcdir/$subdir/$arches($arch).s $arches($arch).s" diff_output - if {[string equal $diff_output ""] == 0} then { - send_log $diff_output - fail "Check $arches($arch) architecture has not changed" - } else { - pass "Check $arches($arch) architecture has not changed" - } -} - - -################################################################### -# Generate an assembler file with every instruction -# Then use it to test how many failures there are for -# each architecture. If this does not match the predicted value -# then the assembler accepts too many instructions for a given -# architecture. - - -set fd [open "all_insns.s" w 0666] -for {set i 0} {$i < $insncount} {incr i} { - puts $fd [format "\t%-25s ;!%s" $insns(insn,$i) $insns(context,$i)] -} -close $fd - -# Assemble the all_insns.s file for each isa and count how many failures there are -foreach arch [array names insns_valid] { - set errormessages 0 - set expected [expr $insncount - $insns_valid($arch)] - - # The -Z option ensures that all error messages are output, - # even those from later phases of assembly (such as offset range errors) - send_log "$AS -Z -isa=$arch all_insns.s -o /dev/null\n" - spawn $AS -Z -isa=$arch all_insns.s -o /dev/null - expect Error: {incr errormessages; exp_continue} - - if {$errormessages == $expected} then { - pass "$expected insns should not assemble on $arch" - } else { - if {([istarget sh*-*-coff] || [istarget sh*-hms]) && [string match {*dsp} $arch]} { - xfail "$expected insns should not assemble on $arch ($errormessages did not)" - } else { - fail "$expected insns should not assemble on $arch ($errormessages did not)" - } - } -} - - } ;# istarget sh*-*-* diff --git a/gas/testsuite/gas/sh/arch/arch_expected.txt b/gas/testsuite/gas/sh/arch/arch_expected.txt index c8f0ffb..8e901ab 100644 --- a/gas/testsuite/gas/sh/arch/arch_expected.txt +++ b/gas/testsuite/gas/sh/arch/arch_expected.txt @@ -190,39 +190,39 @@ sh2a-nofpu-or-sh3-nommu.s -isa=sh4a sh4a sh2a-nofpu-or-sh3-nommu.s -isa=sh4a-up sh4a sh2a-nofpu-or-sh3-nommu.s -isa=sh4al-dsp sh4al-dsp sh2a-nofpu-or-sh3-nommu.s -isa=sh4al-dsp-up sh4al-dsp -sh2a-nofpu-or-sh4-nommu-nofpu.s default-options sh2a-nofpu-or-sh4-nommu-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.s -dsp sh2a-nofpu-or-sh4-nommu-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=any sh2a-nofpu-or-sh4-nommu-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=dsp sh2a-nofpu-or-sh4-nommu-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=fp sh2a-nofpu-or-sh4-nommu-nofpu +sh2a-nofpu-or-sh4-nommu-nofpu.s default-options sh2a-nofpu-or-sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.s -dsp sh2a-nofpu-or-sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=any sh2a-nofpu-or-sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=dsp sh2a-nofpu-or-sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=fp sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh-dsp ERROR -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh-dsp-up sh4al-dsp +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh-dsp-up sh3-dsp sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh ERROR -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh-up sh2a-nofpu-or-sh4-nommu-nofpu +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh-up sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2 ERROR -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2-up sh2a-nofpu-or-sh4-nommu-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu ERROR -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-nofpu-or-sh4-nommu-nofpu +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2-up sh2a-nofpu-or-sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-nofpu-or-sh4-nommu-nofpu sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu sh2a-nofpu sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-up sh2a-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-or-sh3e ERROR -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-or-sh3e-up sh2a-or-sh4 +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-or-sh3e sh2a-or-sh3e +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-or-sh3e-up sh2a-or-sh3e sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-or-sh4 sh2a-or-sh4 sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-or-sh4-up sh2a-or-sh4 sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a sh2a sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-up sh2a sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2e ERROR -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2e-up sh2a-or-sh4 -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-dsp ERROR -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-dsp-up sh4al-dsp -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-nommu ERROR -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-nommu-up sh4-nommu-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3 ERROR -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-up sh4-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3e ERROR -sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3e-up sh4 +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2e-up sh2a-or-sh3e +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-dsp sh3-dsp +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-dsp-up sh3-dsp +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-nommu sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-nommu-up sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3 sh3 +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-up sh3 +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3e sh3e +sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3e-up sh3e sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4-nofpu sh4-nofpu sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4-nofpu-up sh4-nofpu sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu diff --git a/gas/testsuite/gas/sh/arch/sh-dsp.s b/gas/testsuite/gas/sh/arch/sh-dsp.s index cd87a22..b26e898 100644 --- a/gas/testsuite/gas/sh/arch/sh-dsp.s +++ b/gas/testsuite/gas/sh/arch/sh-dsp.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh-dsp but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh-dsp.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh-dsp.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -136,7 +135,6 @@ sh_dsp: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -225,7 +223,6 @@ sh_dsp: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up} shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up} diff --git a/gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl b/gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl new file mode 100644 index 0000000..cf8001f --- /dev/null +++ b/gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl @@ -0,0 +1,249 @@ +# Generate one sh*.s file for each architecture defined in sh-opc.h +# This will contain all the instructions valid on that platform + +# Pull the architecture inheritance macros out of sh-opc.h +# Pull all the insns out of the sh-opc.h file. +while (<>) +{ + chomp; + # Handle line continuation + if (s/\\$//) { + $_ .= <>; + redo unless eof(); + } + # Concat comment line and the next line + if (/^\s*\/\* + (?:\s*\S+){2} + \s+ ([^*]+?) + \s* \*\/ $ + /x) + { + $_ .= " "; + $_ .= <>; + redo unless eof(); + } + if (/#define\s+arch_([^ ]*)_up\s*\(([^)]*)\)/) + { + ($arches[$archcount] = $1) =~ tr/_/-/; + ($descendents[$archcount] = $2) =~ tr/_/-/; + $archcount += 1; + next; + } + # Special case: Match the repeat pseudo op + if (/^\s*\/\* + \s* repeat + \s+ start\s+end + \s+ ([^*]+?) # instruction operand + \s* \*\/ + \s* \{ + ((?:[^\}]+\}){2}) # 2 brace pairs (operands and nibbles) + \s* , + \s* arch_(\S+)_up # architecture name + \s* \} + /x) + { + $insns[$insncount] = "repeat 10 20 ".$1; + $insns_context[$insncount] = $_; + ($insns_arch[$insncount] = $3) =~ tr/_/-/; + $insncount += 1; + next; + } + # Match all 32 bit opcodes + if (/^\s*\/\* + (?:\s*\S+){2} + \s+ ([^*]+?) # instruction operand + \s* \*\/ + \s* \{ + ((?:[^\}]+\}){2}) # 2 brace pairs (operands and nibbles) + \s* , + \s* arch_(\S+)_up # architecture name + \s* \| + \s* arch_op32 + \s* \} + /x) + { + $insns[$insncount] = $1; + $insns_context[$insncount] = $_; + ($insns_arch[$insncount] = $3) =~ tr/_/-/; + $insncount += 1; + next; + } + # Match all 16 bit opcodes + if (/^\s*\/\* + \s* \S+ + \s+ ([^*]+?) # instruction operand + \s* \*\/ + \s* \{ + ((?:[^\}]+\}){2}) # 2 brace pairs (operands and nibbles) + \s* , + \s* arch_(\S+)_up # architecture name + \s* \} + /x) + { + $insns[$insncount] = $1; + $insns_context[$insncount] = $_; + ($insns_arch[$insncount] = $3) =~ tr/_/-/; + $insncount += 1; + next; + } + # Match all remaining possible instructions (error detection) + if (/^\s*\/\* + (?:[^*]*(?:\*[^\/])?)+ # match contents of comment allowing * + \*\/ + \s* \{ + (?:[^\}]+\}){2} # 2 brace pairs (operands and nibbles) + \s* , + [^\}]* + arch + [^\}]* + \} + /x) + { + print ("Found something that looks like an instruction", + " but cannot be decoded:\n", "\t", $_); + next; + } +} + +#print $insncount, "\n"; +print $archcount, "\n"; + +# Munge the insns such that they will assemble +# Each instruction in sh-opc.h has an example format +# with placeholders for the parameters. These placeholders +# need to be replaced with real registers and constants +# as appropriate in order to assemble correctly. + +foreach $i (0 .. $insncount) { + $out = $insns[$i]; + if ($insns_context[$i] =~ /AY_.{3,4}_N/) { + $out =~ s/<REG_N>/r6/; + } else { + $out =~ s/<REG_N>/r4/; + } + $out =~ s/<REG_M>/r5/; + if ($insns_context[$i] =~ /IMM0_20BY8/) { + $out =~ s/<imm>/1024/; + } else { + $out =~ s/<imm>/4/; + } + $out =~ s/<bdisp\d*>/.+8/; + $out =~ s/<disp12>/2048/; + $out =~ s/<DISP12>/2048/; + $out =~ s/<disp\d*>/8/; + $out =~ s/Rn_BANK/r1_bank/; + $out =~ s/Rm_BANK/r2_bank/; + $out =~ s/<F_REG_N>/fr1/; + $out =~ s/<F_REG_M>/fr2/; + $out =~ s/<D_REG_N>/dr2/; + $out =~ s/<D_REG_M>/dr4/; + $out =~ s/<V_REG_[Nn]>/fv0/; + $out =~ s/<V_REG_M>/fv4/; + $out =~ s/<DX_REG_N>/xd2/; + $out =~ s/<DX_REG_M>/xd4/; + $out =~ s/XMTRX_M4/xmtrx/; + $out =~ s/<DSP_REG_X>/x1/; + $out =~ s/<DSP_REG_Y>/y0/; + $out =~ s/<DSP_REG_M>/a1/; + $out =~ s/<DSP_REG_N>/m0/; + $out =~ s/<REG_Axy>/r1/; + $out =~ s/<REG_Ayx>/r3/; + $out =~ s/<DSP_REG_XY>/y1/; + $out =~ s/<DSP_REG_YX>/y1/; + $out =~ s/<DSP_REG_AX>/a0/; + $out =~ s/<DSP_REG_AY>/a0/; + $out =~ s/Se/x0/; + $out =~ s/Sf/y0/; + $out =~ s/Dg/m0/; + if ($insns_context[$i] =~ /PPIC/) { + $out = "dct $out"; + } + if ($insns_context[$i] =~ /i8p4/) { + $out = ".align 2\n\t$out"; + } + # Write back the results. + # print ($out, "\n"); + $insns[$i] = $out; +} + +# For each architecture, extract its immediate parents +foreach $a (0 .. $archcount) { + $s = $descendents[$a]; + $s =~ s/[\s|]+/ /g; + @list = split(' ', $s); + while ($word = shift (@list)) { + if ($word =~ /^arch-(.*)-up$/) { + push @{$archtree{$1}}, $arches[$a]; + } + } +} + +# Propagate the inhertances through the list +# Iterate to ensure all inheritances are found (necessary?) +$changesmade = 1; +while ($changesmade) { + $changesmade = 0; + foreach $a (@arches) { + foreach $b (@arches) { + # If arch 'a' is a parent of arch 'b' then b inherits from a + if (grep {$_ eq $a} @{$archtree{$b}}) { + # Only add each arch if it is not already present + foreach $c (@{$archtree{$a}}) { + if ((grep {$_ eq $c} @{$archtree{$b}}) == 0) { + push @{$archtree{$b}}, $c; + $changesmade = 1; + } + } + } + } + } +} + +# Generate the assembler file for each architecture +# Also count up how many instructions should be valid for each architecture + +foreach $arch (0 .. ($archcount - 1)) { + print $arches[$arch], "\n"; + $insns_valid{$arches[$arch]} = 0; + unless (open ($fd, ">$arches[$arch].s")) { + die "Can't open $arches[$arch].s\n"; + } + print $fd "! Generated file. DO NOT EDIT.\n"; + print $fd "!\n"; + print $fd "! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .\n"; + print $fd "! This file should contain every instruction valid on\n"; + print $fd "! architecture $arches[$arch] but no more.\n"; + print $fd "! If the tests are failing because the expected results have changed then run\n"; + print $fd "! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl'\n"; + print $fd "! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files.\n"; + print $fd "! Make sure there are no unexpected or missing instructions.\n"; + print $fd "\n\t.section .text\n"; + ($lab = $arches[$arch]) =~ tr/-/_/; + print $fd "$lab:\n"; + print $fd "! Instructions introduced into $arches[$arch]\n"; + foreach $i (0 .. $insncount) { + if ($arches[$arch] eq $insns_arch[$i]) { + $context = $insns_context[$i]; + $context =~ s/,$//; + $context =~ s/^\s*\//\//; + printf $fd "\t%-25s ;!%s\n", $insns[$i], $context; + $insns_valid{$arches[$arch]} += 1; + } + } + print $fd "\n! Instructions inherited from ancestors:"; + foreach $anc (sort @{$archtree{$arches[$arch]}}) { + print $fd " $anc"; + } + print $fd "\n"; + foreach $i (0 .. $insncount) { + if (($arches[$arch] ne $insns_arch[$i]) + && (grep {$_ eq $insns_arch[$i]} @{$archtree{$arches[$arch]}})) { + $context = $insns_context[$i]; + $context =~ s/,$//; + $context =~ s/^\s*\//\//; + printf $fd "\t%-25s ;!%s\n", $insns[$i], $context; + $insns_valid{$arches[$arch]} += 1; + } + } + close $fd; +} diff --git a/gas/testsuite/gas/sh/arch/sh.s b/gas/testsuite/gas/sh/arch/sh.s index 86de648..ce9a2a2 100644 --- a/gas/testsuite/gas/sh/arch/sh.s +++ b/gas/testsuite/gas/sh/arch/sh.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -24,7 +23,6 @@ sh: bt .+8 ;!/* 10001001i8p1.... bt <bdisp8> */{"bt",{A_BDISP8},{HEX_8,HEX_9,BRANCH_8}, arch_sh_up} bf .+8 ;!/* 10001011i8p1.... bf <bdisp8> */{"bf",{A_BDISP8},{HEX_8,HEX_B,BRANCH_8}, arch_sh_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -112,7 +110,6 @@ sh: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up} shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up} @@ -152,4 +149,4 @@ sh: xor.b #4,@(R0,GBR) ;!/* 11001110i8*1.... xor.b #<imm>,@(R0,GBR)*/{"xor.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_E,IMM0_8}, arch_sh_up} xtrct r5,r4 ;!/* 0010nnnnmmmm1101 xtrct <REG_M>,<REG_N>*/{"xtrct",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_D}, arch_sh_up} -! Instructions inherited from ancestors: +! Instructions inherited from ancestors: diff --git a/gas/testsuite/gas/sh/arch/sh2.s b/gas/testsuite/gas/sh/arch/sh2.s index 3659942..7f2e02a 100644 --- a/gas/testsuite/gas/sh/arch/sh2.s +++ b/gas/testsuite/gas/sh/arch/sh2.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2 but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -37,7 +36,6 @@ sh2: bt .+8 ;!/* 10001001i8p1.... bt <bdisp8> */{"bt",{A_BDISP8},{HEX_8,HEX_9,BRANCH_8}, arch_sh_up} bf .+8 ;!/* 10001011i8p1.... bf <bdisp8> */{"bf",{A_BDISP8},{HEX_8,HEX_B,BRANCH_8}, arch_sh_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -125,7 +123,6 @@ sh2: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up} shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up} diff --git a/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s b/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s index ce93bc9..cc29889 100644 --- a/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s +++ b/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s @@ -1,17 +1,17 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a-nofpu-or-sh3-nommu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a-nofpu-or-sh3-nommu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text sh2a_nofpu_or_sh3_nommu: ! Instructions introduced into sh2a-nofpu-or-sh3-nommu + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} @@ -32,7 +32,6 @@ sh2a_nofpu_or_sh3_nommu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -121,7 +120,6 @@ sh2a_nofpu_or_sh3_nommu: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up} shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up} diff --git a/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s b/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s index cc350c0..c702845 100644 --- a/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s +++ b/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s @@ -1,18 +1,16 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a-nofpu-or-sh4-nommu-nofpu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a-nofpu-or-sh4-nommu-nofpu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text sh2a_nofpu_or_sh4_nommu_nofpu: ! Instructions introduced into sh2a-nofpu-or-sh4-nommu-nofpu - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} ! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up} @@ -31,7 +29,6 @@ sh2a_nofpu_or_sh4_nommu_nofpu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -114,13 +111,13 @@ sh2a_nofpu_or_sh4_nommu_nofpu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh2a-nofpu.s b/gas/testsuite/gas/sh/arch/sh2a-nofpu.s index 878a5a3..6f4a17e 100644 --- a/gas/testsuite/gas/sh/arch/sh2a-nofpu.s +++ b/gas/testsuite/gas/sh/arch/sh2a-nofpu.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a-nofpu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a-nofpu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a-nofpu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -82,7 +81,6 @@ sh2a_nofpu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -165,14 +163,13 @@ sh2a_nofpu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s b/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s index b7be336..25c8ae1 100644 --- a/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s +++ b/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a-or-sh3e but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a-or-sh3e.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -31,7 +30,6 @@ sh2a_or_sh3e: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -118,13 +116,13 @@ sh2a_or_sh3e: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s b/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s index 0200796..d3300ca 100644 --- a/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s +++ b/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a-or-sh4 but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a-or-sh4.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -57,7 +56,6 @@ sh2a_or_sh4: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -144,14 +142,13 @@ sh2a_or_sh4: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh2a.s b/gas/testsuite/gas/sh/arch/sh2a.s index 04e10f0..370dbd4 100644 --- a/gas/testsuite/gas/sh/arch/sh2a.s +++ b/gas/testsuite/gas/sh/arch/sh2a.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -34,7 +33,6 @@ sh2a: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -134,14 +132,13 @@ sh2a: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh2e.s b/gas/testsuite/gas/sh/arch/sh2e.s index a62e3ab..e12732a 100644 --- a/gas/testsuite/gas/sh/arch/sh2e.s +++ b/gas/testsuite/gas/sh/arch/sh2e.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2e but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2e.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2e.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -66,7 +65,6 @@ sh2e: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -155,7 +153,6 @@ sh2e: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up} shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up} diff --git a/gas/testsuite/gas/sh/arch/sh3-dsp.s b/gas/testsuite/gas/sh/arch/sh3-dsp.s index 7000596..acc26be 100644 --- a/gas/testsuite/gas/sh/arch/sh3-dsp.s +++ b/gas/testsuite/gas/sh/arch/sh3-dsp.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh3-dsp but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh3-dsp.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh3-dsp.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -30,7 +29,7 @@ sh3_dsp: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -140,13 +139,14 @@ sh3_dsp: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} setrc r4 ;!/* 0100nnnn00010100 setrc <REG_N> */{"setrc",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up} setrc #4 ;!/* 10000010i8*1.... setrc #<imm> */{"setrc",{A_IMM},{HEX_8,HEX_2,IMM0_8}, arch_sh_dsp_up} diff --git a/gas/testsuite/gas/sh/arch/sh3-nommu.s b/gas/testsuite/gas/sh/arch/sh3-nommu.s index bc6096e..3e8ff02 100644 --- a/gas/testsuite/gas/sh/arch/sh3-nommu.s +++ b/gas/testsuite/gas/sh/arch/sh3-nommu.s @@ -1,23 +1,24 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh3-nommu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh3-nommu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh3-nommu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text sh3_nommu: ! Instructions introduced into sh3-nommu + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} ldc r4,SSR ;!/* 0100nnnn00111110 ldc <REG_N>,SSR */{"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}, arch_sh3_nommu_up} ldc r4,SPC ;!/* 0100nnnn01001110 ldc <REG_N>,SPC */{"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}, arch_sh3_nommu_up} ldc r4,r1_bank ;!/* 0100nnnn1xxx1110 ldc <REG_N>,Rn_BANK */{"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}, arch_sh3_nommu_up} ldc.l @r4+,SSR ;!/* 0100nnnn00110111 ldc.l @<REG_N>+,SSR */{"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}, arch_sh3_nommu_up} ldc.l @r4+,SPC ;!/* 0100nnnn01000111 ldc.l @<REG_N>+,SPC */{"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}, arch_sh3_nommu_up} ldc.l @r4+,r1_bank ;!/* 0100nnnn1xxx0111 ldc.l @<REG_N>+,Rn_BANK */{"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}, arch_sh3_nommu_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} stc SSR,r4 ;!/* 0000nnnn00110010 stc SSR,<REG_N> */{"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}, arch_sh3_nommu_up} stc SPC,r4 ;!/* 0000nnnn01000010 stc SPC,<REG_N> */{"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}, arch_sh3_nommu_up} stc r1_bank,r4 ;!/* 0000nnnn1xxx0010 stc Rn_BANK,<REG_N> */{"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}, arch_sh3_nommu_up} @@ -42,7 +43,6 @@ sh3_nommu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -125,13 +125,13 @@ sh3_nommu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh3.s b/gas/testsuite/gas/sh/arch/sh3.s index 5e031c0..97ab939 100644 --- a/gas/testsuite/gas/sh/arch/sh3.s +++ b/gas/testsuite/gas/sh/arch/sh3.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh3 but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh3.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh3.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -31,7 +30,7 @@ sh3: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -120,13 +119,14 @@ sh3: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh3e.s b/gas/testsuite/gas/sh/arch/sh3e.s index 7076dfc..f5c8ab9 100644 --- a/gas/testsuite/gas/sh/arch/sh3e.s +++ b/gas/testsuite/gas/sh/arch/sh3e.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh3e but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh3e.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh3e.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -30,7 +29,7 @@ sh3e: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -124,13 +123,14 @@ sh3e: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh4-nofpu.s b/gas/testsuite/gas/sh/arch/sh4-nofpu.s index fb225a1..32b58f9 100644 --- a/gas/testsuite/gas/sh/arch/sh4-nofpu.s +++ b/gas/testsuite/gas/sh/arch/sh4-nofpu.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4-nofpu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4-nofpu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4-nofpu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -30,7 +29,7 @@ sh4_nofpu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -128,14 +127,14 @@ sh4_nofpu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s b/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s index fc2877a..61f0bc6 100644 --- a/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s +++ b/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4-nommu-nofpu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4-nommu-nofpu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -42,7 +41,7 @@ sh4_nommu_nofpu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -131,14 +130,14 @@ sh4_nommu_nofpu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh4.s b/gas/testsuite/gas/sh/arch/sh4.s index 5b1c980..af135ce 100644 --- a/gas/testsuite/gas/sh/arch/sh4.s +++ b/gas/testsuite/gas/sh/arch/sh4.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4 but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -35,7 +34,7 @@ sh4: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -137,14 +136,14 @@ sh4: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh4a-nofpu.s b/gas/testsuite/gas/sh/arch/sh4a-nofpu.s index 202db6f..9522bb6 100644 --- a/gas/testsuite/gas/sh/arch/sh4a-nofpu.s +++ b/gas/testsuite/gas/sh/arch/sh4a-nofpu.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4a-nofpu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4a-nofpu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4a-nofpu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -37,7 +36,7 @@ sh4a_nofpu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -135,14 +134,14 @@ sh4a_nofpu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh4a.s b/gas/testsuite/gas/sh/arch/sh4a.s index c710ddc..950ed2d 100644 --- a/gas/testsuite/gas/sh/arch/sh4a.s +++ b/gas/testsuite/gas/sh/arch/sh4a.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4a but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4a.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4a.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -31,7 +30,7 @@ sh4a: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -138,7 +137,7 @@ sh4a: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} prefi @r4 ;!/* 0000nnnn11010011 prefi @<REG_N> */{"prefi",{A_IND_N},{HEX_0,REG_N,HEX_D,HEX_3}, arch_sh4a_nofpu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} @@ -146,7 +145,7 @@ sh4a: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/gas/testsuite/gas/sh/arch/sh4al-dsp.s b/gas/testsuite/gas/sh/arch/sh4al-dsp.s index 8d48962..6caaf2c 100644 --- a/gas/testsuite/gas/sh/arch/sh4al-dsp.s +++ b/gas/testsuite/gas/sh/arch/sh4al-dsp.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4al-dsp but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4al-dsp.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4al-dsp.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -66,7 +65,7 @@ sh4al_dsp: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -189,7 +188,7 @@ sh4al_dsp: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} prefi @r4 ;!/* 0000nnnn11010011 prefi @<REG_N> */{"prefi",{A_IND_N},{HEX_0,REG_N,HEX_D,HEX_3}, arch_sh4a_nofpu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} @@ -197,7 +196,7 @@ sh4al_dsp: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} setrc r4 ;!/* 0100nnnn00010100 setrc <REG_N> */{"setrc",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up} setrc #4 ;!/* 10000010i8*1.... setrc #<imm> */{"setrc",{A_IMM},{HEX_8,HEX_2,IMM0_8}, arch_sh_dsp_up} diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 869e48f..9313705 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,27 @@ +2015-02-25 Oleg Endo <olegendo@gcc.gnu.org> + + * ld-sh/arch/arch_expected.txt: Regenerate. + * ld-sh/arch/sh-dsp.s: Likewise. + * ld-sh/arch/sh.s: Likewise. + * ld-sh/arch/sh2.s: Likewise. + * ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s: Likewise. + * ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Likewise. + * ld-sh/arch/sh2a-nofpu.s: Likewise. + * ld-sh/arch/sh2a-or-sh3e.s: Likewise. + * ld-sh/arch/sh2a-or-sh4.s: Likewise. + * ld-sh/arch/sh2a.s: Likewise. + * ld-sh/arch/sh2e.s: Likewise. + * ld-sh/arch/sh3-dsp.s: Likewise. + * ld-sh/arch/sh3-nommu.s: Likewise. + * ld-sh/arch/sh3.s: Likewise. + * ld-sh/arch/sh3e.s: Likewise. + * ld-sh/arch/sh4-nofpu.s: Likewise. + * ld-sh/arch/sh4-nommu-nofpu.s: Likewise. + * ld-sh/arch/sh4.s: Likewise. + * ld-sh/arch/sh4a-nofpu.s: Likewise. + * ld-sh/arch/sh4a.s: Likewise. + * ld-sh/arch/sh4al-dsp.s: Likewise. + 2015-02-24 Nick Clifton <nickc@redhat.com> * ld-elf/extract-symbol-1sec.d: Expect to fail on the V850. diff --git a/ld/testsuite/ld-sh/arch/arch_expected.txt b/ld/testsuite/ld-sh/arch/arch_expected.txt index d11c43b..d4d471e 100644 --- a/ld/testsuite/ld-sh/arch/arch_expected.txt +++ b/ld/testsuite/ld-sh/arch/arch_expected.txt @@ -14,7 +14,7 @@ sh-dsp.o sh-dsp.o sh-dsp sh-dsp.o sh.o sh-dsp sh-dsp.o sh2.o sh-dsp sh-dsp.o sh2a-nofpu-or-sh3-nommu.o sh3-dsp -sh-dsp.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4al-dsp +sh-dsp.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh3-dsp sh-dsp.o sh2a-nofpu.o ERROR sh-dsp.o sh2a-or-sh3e.o ERROR sh-dsp.o sh2a-or-sh4.o ERROR @@ -35,7 +35,7 @@ sh.o sh-dsp.o sh-dsp sh.o sh.o sh sh.o sh2.o sh2 sh.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu -sh.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu +sh.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh3-nommu sh.o sh2a-nofpu.o sh2a-nofpu sh.o sh2a-or-sh3e.o sh2a-or-sh3e sh.o sh2a-or-sh4.o sh2a-or-sh4 @@ -56,7 +56,7 @@ sh2.o sh-dsp.o sh-dsp sh2.o sh.o sh2 sh2.o sh2.o sh2 sh2.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu -sh2.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu +sh2.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh3-nommu sh2.o sh2a-nofpu.o sh2a-nofpu sh2.o sh2a-or-sh3e.o sh2a-or-sh3e sh2.o sh2a-or-sh4.o sh2a-or-sh4 @@ -77,7 +77,7 @@ sh2a-nofpu-or-sh3-nommu.o sh-dsp.o sh3-dsp sh2a-nofpu-or-sh3-nommu.o sh.o sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu.o sh2.o sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu -sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu +sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu.o sh2a-nofpu sh2a-nofpu-or-sh3-nommu.o sh2a-or-sh3e.o sh2a-or-sh3e sh2a-nofpu-or-sh3-nommu.o sh2a-or-sh4.o sh2a-or-sh4 @@ -94,27 +94,27 @@ sh2a-nofpu-or-sh3-nommu.o sh4a-nofpu.o sh4a-nofpu sh2a-nofpu-or-sh3-nommu.o sh4a.o sh4a sh2a-nofpu-or-sh3-nommu.o sh4al-dsp.o sh4al-dsp sh2a-nofpu-or-sh3-nommu.o sh-unknown.o sh2a-nofpu-or-sh3-nommu -sh2a-nofpu-or-sh4-nommu-nofpu.o sh-dsp.o sh4al-dsp -sh2a-nofpu-or-sh4-nommu-nofpu.o sh.o sh2a-nofpu-or-sh4-nommu-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.o sh2.o sh2a-nofpu-or-sh4-nommu-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh4-nommu-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu +sh2a-nofpu-or-sh4-nommu-nofpu.o sh-dsp.o sh3-dsp +sh2a-nofpu-or-sh4-nommu-nofpu.o sh.o sh2a-nofpu-or-sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.o sh2.o sh2a-nofpu-or-sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu.o sh2a-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh3e.o sh2a-or-sh4 +sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh3e.o sh2a-or-sh3e sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh4.o sh2a-or-sh4 sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a.o sh2a -sh2a-nofpu-or-sh4-nommu-nofpu.o sh2e.o sh2a-or-sh4 -sh2a-nofpu-or-sh4-nommu-nofpu.o sh3-dsp.o sh4al-dsp -sh2a-nofpu-or-sh4-nommu-nofpu.o sh3-nommu.o sh4-nommu-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.o sh3.o sh4-nofpu -sh2a-nofpu-or-sh4-nommu-nofpu.o sh3e.o sh4 +sh2a-nofpu-or-sh4-nommu-nofpu.o sh2e.o sh2a-or-sh3e +sh2a-nofpu-or-sh4-nommu-nofpu.o sh3-dsp.o sh3-dsp +sh2a-nofpu-or-sh4-nommu-nofpu.o sh3-nommu.o sh3-nommu +sh2a-nofpu-or-sh4-nommu-nofpu.o sh3.o sh3 +sh2a-nofpu-or-sh4-nommu-nofpu.o sh3e.o sh3e sh2a-nofpu-or-sh4-nommu-nofpu.o sh4-nofpu.o sh4-nofpu sh2a-nofpu-or-sh4-nommu-nofpu.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh2a-nofpu-or-sh4-nommu-nofpu.o sh4.o sh4 sh2a-nofpu-or-sh4-nommu-nofpu.o sh4a-nofpu.o sh4a-nofpu sh2a-nofpu-or-sh4-nommu-nofpu.o sh4a.o sh4a sh2a-nofpu-or-sh4-nommu-nofpu.o sh4al-dsp.o sh4al-dsp -sh2a-nofpu-or-sh4-nommu-nofpu.o sh-unknown.o sh2a-nofpu-or-sh4-nommu-nofpu +sh2a-nofpu-or-sh4-nommu-nofpu.o sh-unknown.o sh2a-nofpu-or-sh3-nommu sh2a-nofpu.o sh-dsp.o ERROR sh2a-nofpu.o sh.o sh2a-nofpu sh2a-nofpu.o sh2.o sh2a-nofpu @@ -140,7 +140,7 @@ sh2a-or-sh3e.o sh-dsp.o ERROR sh2a-or-sh3e.o sh.o sh2a-or-sh3e sh2a-or-sh3e.o sh2.o sh2a-or-sh3e sh2a-or-sh3e.o sh2a-nofpu-or-sh3-nommu.o sh2a-or-sh3e -sh2a-or-sh3e.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh4 +sh2a-or-sh3e.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh3e sh2a-or-sh3e.o sh2a-nofpu.o sh2a sh2a-or-sh3e.o sh2a-or-sh3e.o sh2a-or-sh3e sh2a-or-sh3e.o sh2a-or-sh4.o sh2a-or-sh4 @@ -203,7 +203,7 @@ sh2e.o sh-dsp.o ERROR sh2e.o sh.o sh2e sh2e.o sh2.o sh2e sh2e.o sh2a-nofpu-or-sh3-nommu.o sh2a-or-sh3e -sh2e.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh4 +sh2e.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh3e sh2e.o sh2a-nofpu.o sh2a sh2e.o sh2a-or-sh3e.o sh2a-or-sh3e sh2e.o sh2a-or-sh4.o sh2a-or-sh4 @@ -224,7 +224,7 @@ sh3-dsp.o sh-dsp.o sh3-dsp sh3-dsp.o sh.o sh3-dsp sh3-dsp.o sh2.o sh3-dsp sh3-dsp.o sh2a-nofpu-or-sh3-nommu.o sh3-dsp -sh3-dsp.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4al-dsp +sh3-dsp.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh3-dsp sh3-dsp.o sh2a-nofpu.o ERROR sh3-dsp.o sh2a-or-sh3e.o ERROR sh3-dsp.o sh2a-or-sh4.o ERROR @@ -245,7 +245,7 @@ sh3-nommu.o sh-dsp.o sh3-dsp sh3-nommu.o sh.o sh3-nommu sh3-nommu.o sh2.o sh3-nommu sh3-nommu.o sh2a-nofpu-or-sh3-nommu.o sh3-nommu -sh3-nommu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4-nommu-nofpu +sh3-nommu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh3-nommu sh3-nommu.o sh2a-nofpu.o ERROR sh3-nommu.o sh2a-or-sh3e.o sh3e sh3-nommu.o sh2a-or-sh4.o sh4 @@ -266,7 +266,7 @@ sh3.o sh-dsp.o sh3-dsp sh3.o sh.o sh3 sh3.o sh2.o sh3 sh3.o sh2a-nofpu-or-sh3-nommu.o sh3 -sh3.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4-nofpu +sh3.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh3 sh3.o sh2a-nofpu.o ERROR sh3.o sh2a-or-sh3e.o sh3e sh3.o sh2a-or-sh4.o sh4 @@ -287,7 +287,7 @@ sh3e.o sh-dsp.o ERROR sh3e.o sh.o sh3e sh3e.o sh2.o sh3e sh3e.o sh2a-nofpu-or-sh3-nommu.o sh3e -sh3e.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4 +sh3e.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh3e sh3e.o sh2a-nofpu.o ERROR sh3e.o sh2a-or-sh3e.o sh3e sh3e.o sh2a-or-sh4.o sh4 @@ -434,7 +434,7 @@ sh-unknown.o sh-dsp.o sh-dsp sh-unknown.o sh.o sh sh-unknown.o sh2.o sh2 sh-unknown.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu -sh-unknown.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu +sh-unknown.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh3-nommu sh-unknown.o sh2a-nofpu.o sh2a-nofpu sh-unknown.o sh2a-or-sh3e.o sh2a-or-sh3e sh-unknown.o sh2a-or-sh4.o sh2a-or-sh4 diff --git a/ld/testsuite/ld-sh/arch/sh-dsp.s b/ld/testsuite/ld-sh/arch/sh-dsp.s index cd87a22..b26e898 100644 --- a/ld/testsuite/ld-sh/arch/sh-dsp.s +++ b/ld/testsuite/ld-sh/arch/sh-dsp.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh-dsp but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh-dsp.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh-dsp.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -136,7 +135,6 @@ sh_dsp: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -225,7 +223,6 @@ sh_dsp: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up} shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up} diff --git a/ld/testsuite/ld-sh/arch/sh.s b/ld/testsuite/ld-sh/arch/sh.s index 86de648..ce9a2a2 100644 --- a/ld/testsuite/ld-sh/arch/sh.s +++ b/ld/testsuite/ld-sh/arch/sh.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -24,7 +23,6 @@ sh: bt .+8 ;!/* 10001001i8p1.... bt <bdisp8> */{"bt",{A_BDISP8},{HEX_8,HEX_9,BRANCH_8}, arch_sh_up} bf .+8 ;!/* 10001011i8p1.... bf <bdisp8> */{"bf",{A_BDISP8},{HEX_8,HEX_B,BRANCH_8}, arch_sh_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -112,7 +110,6 @@ sh: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up} shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up} @@ -152,4 +149,4 @@ sh: xor.b #4,@(R0,GBR) ;!/* 11001110i8*1.... xor.b #<imm>,@(R0,GBR)*/{"xor.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_E,IMM0_8}, arch_sh_up} xtrct r5,r4 ;!/* 0010nnnnmmmm1101 xtrct <REG_M>,<REG_N>*/{"xtrct",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_D}, arch_sh_up} -! Instructions inherited from ancestors: +! Instructions inherited from ancestors: diff --git a/ld/testsuite/ld-sh/arch/sh2.s b/ld/testsuite/ld-sh/arch/sh2.s index 3659942..7f2e02a 100644 --- a/ld/testsuite/ld-sh/arch/sh2.s +++ b/ld/testsuite/ld-sh/arch/sh2.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2 but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -37,7 +36,6 @@ sh2: bt .+8 ;!/* 10001001i8p1.... bt <bdisp8> */{"bt",{A_BDISP8},{HEX_8,HEX_9,BRANCH_8}, arch_sh_up} bf .+8 ;!/* 10001011i8p1.... bf <bdisp8> */{"bf",{A_BDISP8},{HEX_8,HEX_B,BRANCH_8}, arch_sh_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -125,7 +123,6 @@ sh2: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up} shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up} diff --git a/ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s b/ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s index ce93bc9..cc29889 100644 --- a/ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s +++ b/ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s @@ -1,17 +1,17 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a-nofpu-or-sh3-nommu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a-nofpu-or-sh3-nommu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text sh2a_nofpu_or_sh3_nommu: ! Instructions introduced into sh2a-nofpu-or-sh3-nommu + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} @@ -32,7 +32,6 @@ sh2a_nofpu_or_sh3_nommu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -121,7 +120,6 @@ sh2a_nofpu_or_sh3_nommu: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up} shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up} diff --git a/ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s b/ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s index cc350c0..c702845 100644 --- a/ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s +++ b/ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s @@ -1,18 +1,16 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a-nofpu-or-sh4-nommu-nofpu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a-nofpu-or-sh4-nommu-nofpu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text sh2a_nofpu_or_sh4_nommu_nofpu: ! Instructions introduced into sh2a-nofpu-or-sh4-nommu-nofpu - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} ! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up} @@ -31,7 +29,6 @@ sh2a_nofpu_or_sh4_nommu_nofpu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -114,13 +111,13 @@ sh2a_nofpu_or_sh4_nommu_nofpu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh2a-nofpu.s b/ld/testsuite/ld-sh/arch/sh2a-nofpu.s index 878a5a3..6f4a17e 100644 --- a/ld/testsuite/ld-sh/arch/sh2a-nofpu.s +++ b/ld/testsuite/ld-sh/arch/sh2a-nofpu.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a-nofpu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a-nofpu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a-nofpu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -82,7 +81,6 @@ sh2a_nofpu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -165,14 +163,13 @@ sh2a_nofpu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh2a-or-sh3e.s b/ld/testsuite/ld-sh/arch/sh2a-or-sh3e.s index b7be336..25c8ae1 100644 --- a/ld/testsuite/ld-sh/arch/sh2a-or-sh3e.s +++ b/ld/testsuite/ld-sh/arch/sh2a-or-sh3e.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a-or-sh3e but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a-or-sh3e.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -31,7 +30,6 @@ sh2a_or_sh3e: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -118,13 +116,13 @@ sh2a_or_sh3e: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh2a-or-sh4.s b/ld/testsuite/ld-sh/arch/sh2a-or-sh4.s index 0200796..d3300ca 100644 --- a/ld/testsuite/ld-sh/arch/sh2a-or-sh4.s +++ b/ld/testsuite/ld-sh/arch/sh2a-or-sh4.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a-or-sh4 but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a-or-sh4.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -57,7 +56,6 @@ sh2a_or_sh4: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -144,14 +142,13 @@ sh2a_or_sh4: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh2a.s b/ld/testsuite/ld-sh/arch/sh2a.s index 04e10f0..370dbd4 100644 --- a/ld/testsuite/ld-sh/arch/sh2a.s +++ b/ld/testsuite/ld-sh/arch/sh2a.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2a but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2a.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2a.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -34,7 +33,6 @@ sh2a: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -134,14 +132,13 @@ sh2a: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh2e.s b/ld/testsuite/ld-sh/arch/sh2e.s index a62e3ab..e12732a 100644 --- a/ld/testsuite/ld-sh/arch/sh2e.s +++ b/ld/testsuite/ld-sh/arch/sh2e.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh2e but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh2e.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh2e.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -66,7 +65,6 @@ sh2e: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -155,7 +153,6 @@ sh2e: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up} shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up} diff --git a/ld/testsuite/ld-sh/arch/sh3-dsp.s b/ld/testsuite/ld-sh/arch/sh3-dsp.s index 7000596..acc26be 100644 --- a/ld/testsuite/ld-sh/arch/sh3-dsp.s +++ b/ld/testsuite/ld-sh/arch/sh3-dsp.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh3-dsp but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh3-dsp.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh3-dsp.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -30,7 +29,7 @@ sh3_dsp: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -140,13 +139,14 @@ sh3_dsp: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} setrc r4 ;!/* 0100nnnn00010100 setrc <REG_N> */{"setrc",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up} setrc #4 ;!/* 10000010i8*1.... setrc #<imm> */{"setrc",{A_IMM},{HEX_8,HEX_2,IMM0_8}, arch_sh_dsp_up} diff --git a/ld/testsuite/ld-sh/arch/sh3-nommu.s b/ld/testsuite/ld-sh/arch/sh3-nommu.s index bc6096e..3e8ff02 100644 --- a/ld/testsuite/ld-sh/arch/sh3-nommu.s +++ b/ld/testsuite/ld-sh/arch/sh3-nommu.s @@ -1,23 +1,24 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh3-nommu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh3-nommu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh3-nommu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text sh3_nommu: ! Instructions introduced into sh3-nommu + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} ldc r4,SSR ;!/* 0100nnnn00111110 ldc <REG_N>,SSR */{"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}, arch_sh3_nommu_up} ldc r4,SPC ;!/* 0100nnnn01001110 ldc <REG_N>,SPC */{"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}, arch_sh3_nommu_up} ldc r4,r1_bank ;!/* 0100nnnn1xxx1110 ldc <REG_N>,Rn_BANK */{"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}, arch_sh3_nommu_up} ldc.l @r4+,SSR ;!/* 0100nnnn00110111 ldc.l @<REG_N>+,SSR */{"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}, arch_sh3_nommu_up} ldc.l @r4+,SPC ;!/* 0100nnnn01000111 ldc.l @<REG_N>+,SPC */{"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}, arch_sh3_nommu_up} ldc.l @r4+,r1_bank ;!/* 0100nnnn1xxx0111 ldc.l @<REG_N>+,Rn_BANK */{"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}, arch_sh3_nommu_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} stc SSR,r4 ;!/* 0000nnnn00110010 stc SSR,<REG_N> */{"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}, arch_sh3_nommu_up} stc SPC,r4 ;!/* 0000nnnn01000010 stc SPC,<REG_N> */{"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}, arch_sh3_nommu_up} stc r1_bank,r4 ;!/* 0000nnnn1xxx0010 stc Rn_BANK,<REG_N> */{"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}, arch_sh3_nommu_up} @@ -42,7 +43,6 @@ sh3_nommu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -125,13 +125,13 @@ sh3_nommu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh3.s b/ld/testsuite/ld-sh/arch/sh3.s index 5e031c0..97ab939 100644 --- a/ld/testsuite/ld-sh/arch/sh3.s +++ b/ld/testsuite/ld-sh/arch/sh3.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh3 but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh3.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh3.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -31,7 +30,7 @@ sh3: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -120,13 +119,14 @@ sh3: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh3e.s b/ld/testsuite/ld-sh/arch/sh3e.s index 7076dfc..f5c8ab9 100644 --- a/ld/testsuite/ld-sh/arch/sh3e.s +++ b/ld/testsuite/ld-sh/arch/sh3e.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh3e but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh3e.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh3e.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -30,7 +29,7 @@ sh3e: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -124,13 +123,14 @@ sh3e: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh4-nofpu.s b/ld/testsuite/ld-sh/arch/sh4-nofpu.s index fb225a1..32b58f9 100644 --- a/ld/testsuite/ld-sh/arch/sh4-nofpu.s +++ b/ld/testsuite/ld-sh/arch/sh4-nofpu.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4-nofpu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4-nofpu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4-nofpu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -30,7 +29,7 @@ sh4_nofpu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -128,14 +127,14 @@ sh4_nofpu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh4-nommu-nofpu.s b/ld/testsuite/ld-sh/arch/sh4-nommu-nofpu.s index fc2877a..61f0bc6 100644 --- a/ld/testsuite/ld-sh/arch/sh4-nommu-nofpu.s +++ b/ld/testsuite/ld-sh/arch/sh4-nommu-nofpu.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4-nommu-nofpu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4-nommu-nofpu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -42,7 +41,7 @@ sh4_nommu_nofpu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -131,14 +130,14 @@ sh4_nommu_nofpu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh4.s b/ld/testsuite/ld-sh/arch/sh4.s index 5b1c980..af135ce 100644 --- a/ld/testsuite/ld-sh/arch/sh4.s +++ b/ld/testsuite/ld-sh/arch/sh4.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4 but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -35,7 +34,7 @@ sh4: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -137,14 +136,14 @@ sh4: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh4a-nofpu.s b/ld/testsuite/ld-sh/arch/sh4a-nofpu.s index 202db6f..9522bb6 100644 --- a/ld/testsuite/ld-sh/arch/sh4a-nofpu.s +++ b/ld/testsuite/ld-sh/arch/sh4a-nofpu.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4a-nofpu but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4a-nofpu.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4a-nofpu.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -37,7 +36,7 @@ sh4a_nofpu: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -135,14 +134,14 @@ sh4a_nofpu: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} rotl r4 ;!/* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up} rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh4a.s b/ld/testsuite/ld-sh/arch/sh4a.s index c710ddc..950ed2d 100644 --- a/ld/testsuite/ld-sh/arch/sh4a.s +++ b/ld/testsuite/ld-sh/arch/sh4a.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4a but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4a.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4a.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -31,7 +30,7 @@ sh4a: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -138,7 +137,7 @@ sh4a: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} prefi @r4 ;!/* 0000nnnn11010011 prefi @<REG_N> */{"prefi",{A_IND_N},{HEX_0,REG_N,HEX_D,HEX_3}, arch_sh4a_nofpu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} @@ -146,7 +145,7 @@ sh4a: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up} shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up} diff --git a/ld/testsuite/ld-sh/arch/sh4al-dsp.s b/ld/testsuite/ld-sh/arch/sh4al-dsp.s index 8d48962..6caaf2c 100644 --- a/ld/testsuite/ld-sh/arch/sh4al-dsp.s +++ b/ld/testsuite/ld-sh/arch/sh4al-dsp.s @@ -1,12 +1,11 @@ ! Generated file. DO NOT EDIT. ! -! This file was generated by gas/testsuite/gas/sh/arch/arch.exp . +! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl . ! This file should contain every instruction valid on ! architecture sh4al-dsp but no more. -! If the tests are failing because the expected results -! have changed then run 'make check' and copy the new file -! from <objdir>/gas/testsuite/sh4al-dsp.s -! to <srcdir>/gas/testsuite/gas/sh/arch/sh4al-dsp.s . +! If the tests are failing because the expected results have changed then run +! 'cat ../../../../../opcodes/sh-opc.h | perl sh-opc-gen-as.pl' +! in <srcdir>/gas/testsuite/gas/sh/arch to re-generate the files. ! Make sure there are no unexpected or missing instructions. .section .text @@ -66,7 +65,7 @@ sh4al_dsp: bf.s .+8 ;!/* 10001111i8p1.... bf.s <bdisp8> */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} bf/s .+8 ;!/* 10001111i8p1.... bf/s <bdisp8> */{"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}, arch_sh2_up} clrmac ;!/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up} - clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up} + clrs ;!/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up} clrt ;!/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up} cmp/eq #4,R0 ;!/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh_up} cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up} @@ -189,7 +188,7 @@ sh4al_dsp: or #4,R0 ;!/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh_up} or r5,r4 ;!/* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh_up} or.b #4,@(R0,GBR) ;!/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up} - pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up} + pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up} prefi @r4 ;!/* 0000nnnn11010011 prefi @<REG_N> */{"prefi",{A_IND_N},{HEX_0,REG_N,HEX_D,HEX_3}, arch_sh4a_nofpu_up} rotcl r4 ;!/* 0100nnnn00100100 rotcl <REG_N> */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}, arch_sh_up} rotcr r4 ;!/* 0100nnnn00100101 rotcr <REG_N> */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}, arch_sh_up} @@ -197,7 +196,7 @@ sh4al_dsp: rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up} rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up} rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up} - sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up} + sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up} sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up} setrc r4 ;!/* 0100nnnn00010100 setrc <REG_N> */{"setrc",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up} setrc #4 ;!/* 10000010i8*1.... setrc #<imm> */{"setrc",{A_IMM},{HEX_8,HEX_2,IMM0_8}, arch_sh_dsp_up} diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 90b4eaf..9cdca3c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2015-02-25 Oleg Endo <olegendo@gcc.gnu.org> + + * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of + arch_sh_up. + (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of + arch_sh2a_nofpu_or_sh4_nommu_nofpu_up. + 2015-02-23 Vinay <Vinay.G@kpit.com> * rl78-decode.opc (MOV): Added space between two operands for diff --git a/opcodes/sh-opc.h b/opcodes/sh-opc.h index ee235bd..d511cae 100644 --- a/opcodes/sh-opc.h +++ b/opcodes/sh-opc.h @@ -415,7 +415,7 @@ const sh_opcode_info sh_table[] = /* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}, arch_sh_up}, -/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh_up}, +/* 0000000001001000 clrs */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}, arch_sh3_nommu_up}, /* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh_up}, @@ -683,7 +683,7 @@ const sh_opcode_info sh_table[] = /* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh_up}, -/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up}, +/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up}, /* 0000nnnn11010011 prefi @<REG_N> */{"prefi",{A_IND_N},{HEX_0,REG_N,HEX_D,HEX_3}, arch_sh4a_nofpu_up}, @@ -702,7 +702,7 @@ const sh_opcode_info sh_table[] = /* 0000000010011000 setdmx */{"setdmx",{0},{HEX_0,HEX_0,HEX_9,HEX_8}, arch_sh4al_dsp_up}, /* 0000000011001000 setdmy */{"setdmy",{0},{HEX_0,HEX_0,HEX_C,HEX_8}, arch_sh4al_dsp_up}, -/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh_up}, +/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}, /* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}, /* 0100nnnn00010100 setrc <REG_N> */{"setrc",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up}, |