diff options
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-riscv.h | 4 | ||||
| -rw-r--r-- | include/ChangeLog | 6 | ||||
| -rw-r--r-- | include/dis-asm.h | 1 | ||||
| -rw-r--r-- | include/opcode/riscv.h | 6 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/disassemble.c | 5 | ||||
| -rw-r--r-- | opcodes/riscv-dis.c | 17 |
8 files changed, 49 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 73cadc7..a4e0767 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2018-12-06 Andrew Burgess <andrew.burgess@embecosm.com> + + * config/tc-riscv.h (FAKE_LABEL_NAME): Define as + RISCV_FAKE_LABEL_NAME. + (FAKE_LABEL_CHAR): Define as RISCV_FAKE_LABEL_CHAR. + 2018-12-05 Sam Tebbs <sam.tebbs@arm.com> * dw2gencfi.c (struct cie_entry): Add tc_cie_entry_extras invocation. diff --git a/gas/config/tc-riscv.h b/gas/config/tc-riscv.h index 5e59740..41a18be 100644 --- a/gas/config/tc-riscv.h +++ b/gas/config/tc-riscv.h @@ -38,10 +38,10 @@ struct expressionS; /* Symbols named FAKE_LABEL_NAME are emitted when generating DWARF, so make sure FAKE_LABEL_NAME is printable. It still must be distinct from any real label name. So, append a space, which other labels can't contain. */ -#define FAKE_LABEL_NAME ".L0 " +#define FAKE_LABEL_NAME RISCV_FAKE_LABEL_NAME /* Changing the special character in FAKE_LABEL_NAME requires changing FAKE_LABEL_CHAR too. */ -#define FAKE_LABEL_CHAR ' ' +#define FAKE_LABEL_CHAR RISCV_FAKE_LABEL_CHAR #define md_relax_frag(segment, fragp, stretch) \ riscv_relax_frag (segment, fragp, stretch) diff --git a/include/ChangeLog b/include/ChangeLog index 7375bac..b3fd56b 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,9 @@ +2018-12-06 Andrew Burgess <andrew.burgess@embecosm.com> + + * dis-asm.h (riscv_symbol_is_valid): Declare. + * opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define. + (RISCV_FAKE_LABEL_CHAR): Define. + 2018-12-03 Kito Cheng <kito@andestech.com> * opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to diff --git a/include/dis-asm.h b/include/dis-asm.h index 8462795..6a55f3c 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -302,6 +302,7 @@ extern void print_wasm32_disassembler_options (FILE *); extern bfd_boolean aarch64_symbol_is_valid (asymbol *, struct disassemble_info *); extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *); extern bfd_boolean csky_symbol_is_valid (asymbol *, struct disassemble_info *); +extern bfd_boolean riscv_symbol_is_valid (asymbol *, struct disassemble_info *); extern void disassemble_init_powerpc (struct disassemble_info *); extern void disassemble_init_s390 (struct disassemble_info *); extern void disassemble_init_wasm32 (struct disassemble_info *); diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h index 12cb4ca..d57f45b 100644 --- a/include/opcode/riscv.h +++ b/include/opcode/riscv.h @@ -270,6 +270,12 @@ static const char * const riscv_pred_succ[16] = #define NGPR 32 #define NFPR 32 +/* These fake label defines are use by both the assembler, and + libopcodes. The assembler uses this when it needs to generate a fake + label, and libopcodes uses it to hide the fake labels in its output. */ +#define RISCV_FAKE_LABEL_NAME ".L0 " +#define RISCV_FAKE_LABEL_CHAR ' ' + /* Replace bits MASK << SHIFT of STRUCT with the equivalent bits in VALUE << SHIFT. VALUE is evaluated exactly once. */ #define INSERT_BITS(STRUCT, VALUE, MASK, SHIFT) \ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index b04cf0e..753be9f 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2018-12-06 Andrew Burgess <andrew.burgess@embecosm.com> + + * disassembler.c (disassemble_init_for_target): Add RISC-V + initialisation. + * riscv-dis.c (riscv_symbol_is_valid): New function. + 2018-12-03 Kito Cheng <kito@andestech.com> * riscv-opc.c: Change the type of xlen, because type of diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 750d76a..7370bd1 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -656,6 +656,11 @@ disassemble_init_for_target (struct disassemble_info * info) disassemble_init_powerpc (info); break; #endif +#ifdef ARCH_riscv + case bfd_arch_riscv: + info->symbol_is_valid = riscv_symbol_is_valid; + break; +#endif #ifdef ARCH_wasm32 case bfd_arch_wasm32: disassemble_init_wasm32 (info); diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c index 9790820..f1bbfdb 100644 --- a/opcodes/riscv-dis.c +++ b/opcodes/riscv-dis.c @@ -518,6 +518,23 @@ print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info) return riscv_disassemble_insn (memaddr, insn, info); } +/* Prevent use of the fake labels that are generated as part of the DWARF + and for relaxable relocations in the assembler. */ + +bfd_boolean +riscv_symbol_is_valid (asymbol * sym, + struct disassemble_info * info ATTRIBUTE_UNUSED) +{ + const char * name; + + if (sym == NULL) + return FALSE; + + name = bfd_asymbol_name (sym); + + return (strcmp (name, RISCV_FAKE_LABEL_NAME) != 0); +} + void print_riscv_disassembler_options (FILE *stream) { |