diff options
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-aarch64.c | 6 | ||||
| -rw-r--r-- | include/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 2 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/aarch64-gen.c | 2 | ||||
| -rw-r--r-- | opcodes/aarch64-tbl.h | 2 |
7 files changed, 22 insertions, 7 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 1b31855..9ad388e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2021-07-01 Mike Frysinger <vapier@gentoo.org> + + * config/tc-aarch64.c (struct templates): Make opcode const. + (md_assemble): Likewise. + (fill_instruction_hash_table): Likewise. + 2021-06-24 Clément Chigot <clement.chigot@atos.net> * config/tc-ppc.c (md_assemble): Update ppc_current_csect diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 9ff2d68..2eaad63 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -5214,7 +5214,7 @@ output_inst (struct aarch64_inst *new_inst) struct templates { - aarch64_opcode *opcode; + const aarch64_opcode *opcode; struct templates *next; }; @@ -7272,7 +7272,7 @@ md_assemble (char *str) { char *p = str; templates *template; - aarch64_opcode *opcode; + const aarch64_opcode *opcode; aarch64_inst *inst_base; unsigned saved_cond; @@ -8768,7 +8768,7 @@ sysreg_hash_insert (htab_t table, const char *key, void *value) static void fill_instruction_hash_table (void) { - aarch64_opcode *opcode = aarch64_opcode_table; + const aarch64_opcode *opcode = aarch64_opcode_table; while (opcode->name != NULL) { diff --git a/include/ChangeLog b/include/ChangeLog index 06bc4c5..d8d6067 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,7 @@ +2021-07-01 Mike Frysinger <vapier@gentoo.org> + + * opcode/aarch64.h (aarch64_opcode_table): Mark const. + 2021-07-01 Richard Earnshaw <rearnsha@arm.com> PR gas/28031 diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index f43df79..2bbd593 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -826,7 +826,7 @@ struct aarch64_opcode typedef struct aarch64_opcode aarch64_opcode; /* Table describing all the AArch64 opcodes. */ -extern aarch64_opcode aarch64_opcode_table[]; +extern const aarch64_opcode aarch64_opcode_table[]; /* Opcode flags. */ #define F_ALIAS (1 << 0) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 20e0524..de90ac5 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2021-07-01 Mike Frysinger <vapier@gentoo.org> + + * aarch64-gen.c (aarch64_opcode_table): Add const. + * aarch64-tbl.h (aarch64_opcode_table): Likewise. + 2021-06-22 Andrew Burgess <andrew.burgess@embecosm.com> * cgen-dis.c (count_decodable_bits): Use __builtin_popcount when @@ -367,7 +372,7 @@ 2021-03-29 Jan Beulich <jbeulich@suse.com> * i386-gen.c (process_i386_opcode_modifier): New parameter - "space". + "space". (output_i386_opcode): New local variable "space". Adjust process_i386_opcode_modifier() invocation. (process_i386_opcodes): Adjust process_i386_opcode_modifier() diff --git a/opcodes/aarch64-gen.c b/opcodes/aarch64-gen.c index 356c5ef..d0581bc 100644 --- a/opcodes/aarch64-gen.c +++ b/opcodes/aarch64-gen.c @@ -84,7 +84,7 @@ new_opcode_node (void) 'aarch64_opcode_table' hard-coded in, e.g. print_find_next_opcode; therefore some amount of work needs to be done if the full support for multiple tables needs to be enabled. */ -static const struct aarch64_opcode *aarch64_opcode_tables[] = +static const struct aarch64_opcode * const aarch64_opcode_tables[] = {aarch64_opcode_table}; /* Use top 2 bits to indiate which table. */ diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 4192e54..17ea851 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2584,7 +2584,7 @@ static const aarch64_feature_set aarch64_feature_flagm = #define FLAGM_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, 0, FLAGM, OPS, QUALS, FLAGS, 0, 0, NULL } -struct aarch64_opcode aarch64_opcode_table[] = +const struct aarch64_opcode aarch64_opcode_table[] = { /* Add/subtract (with carry). */ CORE_INSN ("adc", 0x1a000000, 0x7fe0fc00, addsub_carry, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF), |